fd5e220fa6
This patch implements the MemDGNode class for DAG nodes that are candidates for memory dependencies. These nodes form a chain that is accessible by `getPrevNode()` and `getNextNode()`. It also implements a builder class that creates MemDGNode intervals from Instructions.
215 lines
7.3 KiB
C++
215 lines
7.3 KiB
C++
//===- DependencyGraphTest.cpp --------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/SandboxIR/Context.h"
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#include "llvm/SandboxIR/Function.h"
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#include "llvm/SandboxIR/Instruction.h"
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#include "llvm/Support/SourceMgr.h"
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#include "gmock/gmock-matchers.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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struct DependencyGraphTest : public testing::Test {
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LLVMContext C;
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std::unique_ptr<Module> M;
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void parseIR(LLVMContext &C, const char *IR) {
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SMDiagnostic Err;
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M = parseAssemblyString(IR, Err, C);
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if (!M)
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Err.print("DependencyGraphTest", errs());
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}
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};
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TEST_F(DependencyGraphTest, MemDGNode) {
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parseIR(C, R"IR(
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declare void @llvm.sideeffect()
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declare void @llvm.pseudoprobe(i64, i64, i32, i64)
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declare void @llvm.fake.use(...)
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declare void @bar()
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define void @foo(i8 %v1, ptr %ptr) {
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store i8 %v1, ptr %ptr
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%ld0 = load i8, ptr %ptr
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%add = add i8 %v1, %v1
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%stacksave = call ptr @llvm.stacksave()
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call void @llvm.stackrestore(ptr %stacksave)
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call void @llvm.sideeffect()
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call void @llvm.pseudoprobe(i64 42, i64 1, i32 0, i64 -1)
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call void @llvm.fake.use(ptr %ptr)
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call void @bar()
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ret void
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}
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)IR");
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llvm::Function *LLVMF = &*M->getFunction("foo");
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sandboxir::Context Ctx(C);
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auto *F = Ctx.createFunction(LLVMF);
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auto *BB = &*F->begin();
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auto It = BB->begin();
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auto *Store = cast<sandboxir::StoreInst>(&*It++);
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auto *Load = cast<sandboxir::LoadInst>(&*It++);
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auto *Add = cast<sandboxir::BinaryOperator>(&*It++);
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auto *StackSave = cast<sandboxir::CallInst>(&*It++);
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auto *StackRestore = cast<sandboxir::CallInst>(&*It++);
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auto *SideEffect = cast<sandboxir::CallInst>(&*It++);
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auto *PseudoProbe = cast<sandboxir::CallInst>(&*It++);
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auto *FakeUse = cast<sandboxir::CallInst>(&*It++);
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auto *Call = cast<sandboxir::CallInst>(&*It++);
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auto *Ret = cast<sandboxir::ReturnInst>(&*It++);
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sandboxir::DependencyGraph DAG;
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DAG.extend({&*BB->begin(), BB->getTerminator()});
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EXPECT_TRUE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(Store)));
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EXPECT_TRUE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(Load)));
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EXPECT_FALSE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(Add)));
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EXPECT_TRUE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(StackSave)));
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EXPECT_TRUE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(StackRestore)));
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EXPECT_FALSE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(SideEffect)));
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EXPECT_FALSE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(PseudoProbe)));
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EXPECT_TRUE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(FakeUse)));
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EXPECT_TRUE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(Call)));
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EXPECT_FALSE(isa<llvm::sandboxir::MemDGNode>(DAG.getNode(Ret)));
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}
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TEST_F(DependencyGraphTest, Basic) {
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parseIR(C, R"IR(
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define void @foo(ptr %ptr, i8 %v0, i8 %v1) {
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store i8 %v0, ptr %ptr
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store i8 %v1, ptr %ptr
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ret void
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}
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)IR");
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llvm::Function *LLVMF = &*M->getFunction("foo");
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sandboxir::Context Ctx(C);
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auto *F = Ctx.createFunction(LLVMF);
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auto *BB = &*F->begin();
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auto It = BB->begin();
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auto *S0 = cast<sandboxir::StoreInst>(&*It++);
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auto *S1 = cast<sandboxir::StoreInst>(&*It++);
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auto *Ret = cast<sandboxir::ReturnInst>(&*It++);
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sandboxir::DependencyGraph DAG;
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auto Span = DAG.extend({&*BB->begin(), BB->getTerminator()});
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// Check extend().
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EXPECT_EQ(Span.top(), &*BB->begin());
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EXPECT_EQ(Span.bottom(), BB->getTerminator());
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sandboxir::DGNode *N0 = DAG.getNode(S0);
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sandboxir::DGNode *N1 = DAG.getNode(S1);
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sandboxir::DGNode *N2 = DAG.getNode(Ret);
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// Check getInstruction().
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EXPECT_EQ(N0->getInstruction(), S0);
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EXPECT_EQ(N1->getInstruction(), S1);
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// Check hasMemPred()
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EXPECT_TRUE(N1->hasMemPred(N0));
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EXPECT_FALSE(N0->hasMemPred(N1));
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// Check memPreds().
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EXPECT_TRUE(N0->memPreds().empty());
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EXPECT_THAT(N1->memPreds(), testing::ElementsAre(N0));
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EXPECT_THAT(N2->memPreds(), testing::ElementsAre(N1));
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}
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TEST_F(DependencyGraphTest, MemDGNode_getPrevNode_getNextNode) {
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parseIR(C, R"IR(
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define void @foo(ptr %ptr, i8 %v0, i8 %v1) {
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store i8 %v0, ptr %ptr
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add i8 %v0, %v0
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store i8 %v1, ptr %ptr
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ret void
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}
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)IR");
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llvm::Function *LLVMF = &*M->getFunction("foo");
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sandboxir::Context Ctx(C);
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auto *F = Ctx.createFunction(LLVMF);
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auto *BB = &*F->begin();
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auto It = BB->begin();
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auto *S0 = cast<sandboxir::StoreInst>(&*It++);
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[[maybe_unused]] auto *Add = cast<sandboxir::BinaryOperator>(&*It++);
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auto *S1 = cast<sandboxir::StoreInst>(&*It++);
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[[maybe_unused]] auto *Ret = cast<sandboxir::ReturnInst>(&*It++);
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sandboxir::DependencyGraph DAG;
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DAG.extend({&*BB->begin(), BB->getTerminator()});
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auto *S0N = cast<sandboxir::MemDGNode>(DAG.getNode(S0));
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auto *S1N = cast<sandboxir::MemDGNode>(DAG.getNode(S1));
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EXPECT_EQ(S0N->getPrevNode(), nullptr);
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EXPECT_EQ(S0N->getNextNode(), S1N);
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EXPECT_EQ(S1N->getPrevNode(), S0N);
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EXPECT_EQ(S1N->getNextNode(), nullptr);
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}
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TEST_F(DependencyGraphTest, DGNodeRange) {
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parseIR(C, R"IR(
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define void @foo(ptr %ptr, i8 %v0, i8 %v1) {
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add i8 %v0, %v0
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store i8 %v0, ptr %ptr
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add i8 %v0, %v0
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store i8 %v1, ptr %ptr
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ret void
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}
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)IR");
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llvm::Function *LLVMF = &*M->getFunction("foo");
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sandboxir::Context Ctx(C);
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auto *F = Ctx.createFunction(LLVMF);
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auto *BB = &*F->begin();
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auto It = BB->begin();
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auto *Add0 = cast<sandboxir::BinaryOperator>(&*It++);
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auto *S0 = cast<sandboxir::StoreInst>(&*It++);
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auto *Add1 = cast<sandboxir::BinaryOperator>(&*It++);
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auto *S1 = cast<sandboxir::StoreInst>(&*It++);
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auto *Ret = cast<sandboxir::ReturnInst>(&*It++);
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sandboxir::DependencyGraph DAG;
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DAG.extend({&*BB->begin(), BB->getTerminator()});
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auto *S0N = cast<sandboxir::MemDGNode>(DAG.getNode(S0));
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auto *S1N = cast<sandboxir::MemDGNode>(DAG.getNode(S1));
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// Check empty range.
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EXPECT_THAT(sandboxir::MemDGNodeIntervalBuilder::makeEmpty(),
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testing::ElementsAre());
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// Returns the pointers in Range.
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auto getPtrVec = [](const auto &Range) {
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SmallVector<const sandboxir::DGNode *> Vec;
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for (const sandboxir::DGNode &N : Range)
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Vec.push_back(&N);
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return Vec;
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};
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// Both TopN and BotN are memory.
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EXPECT_THAT(
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getPtrVec(sandboxir::MemDGNodeIntervalBuilder::make({S0, S1}, DAG)),
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testing::ElementsAre(S0N, S1N));
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// Only TopN is memory.
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EXPECT_THAT(
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getPtrVec(sandboxir::MemDGNodeIntervalBuilder::make({S0, Ret}, DAG)),
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testing::ElementsAre(S0N, S1N));
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EXPECT_THAT(
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getPtrVec(sandboxir::MemDGNodeIntervalBuilder::make({S0, Add1}, DAG)),
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testing::ElementsAre(S0N));
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// Only BotN is memory.
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EXPECT_THAT(
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getPtrVec(sandboxir::MemDGNodeIntervalBuilder::make({Add0, S1}, DAG)),
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testing::ElementsAre(S0N, S1N));
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EXPECT_THAT(
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getPtrVec(sandboxir::MemDGNodeIntervalBuilder::make({Add0, S0}, DAG)),
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testing::ElementsAre(S0N));
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// Neither TopN or BotN is memory.
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EXPECT_THAT(
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getPtrVec(sandboxir::MemDGNodeIntervalBuilder::make({Add0, Ret}, DAG)),
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testing::ElementsAre(S0N, S1N));
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EXPECT_THAT(
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getPtrVec(sandboxir::MemDGNodeIntervalBuilder::make({Add0, Add0}, DAG)),
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testing::ElementsAre());
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}
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