95 lines
2.9 KiB
C++
95 lines
2.9 KiB
C++
//===----- RISCVZacasABIFix.cpp -------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass implements a fence insertion for an atomic cmpxchg in a case that
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// isn't easy to do with the current AtomicExpandPass hooks API.
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//
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//===----------------------------------------------------------------------===//
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#include "RISCV.h"
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#include "RISCVTargetMachine.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/InstVisitor.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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using namespace llvm;
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#define DEBUG_TYPE "riscv-zacas-abi-fix"
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#define PASS_NAME "RISC-V Zacas ABI fix"
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namespace {
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class RISCVZacasABIFix : public FunctionPass,
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public InstVisitor<RISCVZacasABIFix, bool> {
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const RISCVSubtarget *ST;
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public:
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static char ID;
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RISCVZacasABIFix() : FunctionPass(ID) {}
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bool runOnFunction(Function &F) override;
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StringRef getPassName() const override { return PASS_NAME; }
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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AU.addRequired<TargetPassConfig>();
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}
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bool visitInstruction(Instruction &I) { return false; }
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bool visitAtomicCmpXchgInst(AtomicCmpXchgInst &I);
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};
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} // end anonymous namespace
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// Insert a leading fence (needed for broadest atomics ABI compatibility)
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// only if the Zacas extension is enabled and the AtomicCmpXchgInst has a
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// SequentiallyConsistent failure ordering.
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bool RISCVZacasABIFix::visitAtomicCmpXchgInst(AtomicCmpXchgInst &I) {
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assert(ST->hasStdExtZacas() && "only necessary to run in presence of zacas");
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IRBuilder<> Builder(&I);
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if (I.getFailureOrdering() != AtomicOrdering::SequentiallyConsistent)
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return false;
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Builder.CreateFence(AtomicOrdering::SequentiallyConsistent);
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return true;
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}
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bool RISCVZacasABIFix::runOnFunction(Function &F) {
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auto &TPC = getAnalysis<TargetPassConfig>();
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auto &TM = TPC.getTM<RISCVTargetMachine>();
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ST = &TM.getSubtarget<RISCVSubtarget>(F);
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if (skipFunction(F) || !ST->hasStdExtZacas())
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return false;
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bool MadeChange = false;
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for (auto &BB : F)
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for (Instruction &I : llvm::make_early_inc_range(BB))
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MadeChange |= visit(I);
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return MadeChange;
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}
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INITIALIZE_PASS_BEGIN(RISCVZacasABIFix, DEBUG_TYPE, PASS_NAME, false, false)
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INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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INITIALIZE_PASS_END(RISCVZacasABIFix, DEBUG_TYPE, PASS_NAME, false, false)
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char RISCVZacasABIFix::ID = 0;
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FunctionPass *llvm::createRISCVZacasABIFixPass() {
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return new RISCVZacasABIFix();
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}
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