7c760b224b
Some opcodes in generic MIR represent calls to intrinsics, where the intrinsic ID is the first non-def operand to the instruction. These are now represented as a subclass of GenericMachineInstr, and the method MachineInstr::getIntrinsicID() is now moved to this subclass GIntrinsic. Some target-defined instructions behave like GMIR intrinsics, and have an Intrinsic::ID operand. But they should not be recognized as generic intrinsics, and should not use GIntrinsic::getIntrinsicID(). Separated these out by introducing a new AMDGPU::getIntrinsicID(). Reviewed By: arsenm, Pierre-vh Differential Revision: https://reviews.llvm.org/D155556 This restores commit baa3386edb11a2f9bcadda8cf58d56f3707c39fa. Originally reverted in d0f7850b01cf17e50a4f4b00e3b84dded94df6b8.
54 lines
1.8 KiB
C++
54 lines
1.8 KiB
C++
//===-- AMDGPUInstrInfo.cpp - Base class for AMD GPU InstrInfo ------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief Implementation of the TargetInstrInfo class that is common to all
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/// AMD GPUs.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUInstrInfo.h"
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#include "AMDGPU.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/Value.h"
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using namespace llvm;
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// Pin the vtable to this file.
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//void AMDGPUInstrInfo::anchor() {}
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AMDGPUInstrInfo::AMDGPUInstrInfo(const GCNSubtarget &ST) { }
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Intrinsic::ID AMDGPU::getIntrinsicID(const MachineInstr &I) {
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return I.getOperand(I.getNumExplicitDefs()).getIntrinsicID();
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}
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// TODO: Should largely merge with AMDGPUTTIImpl::isSourceOfDivergence.
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bool AMDGPUInstrInfo::isUniformMMO(const MachineMemOperand *MMO) {
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const Value *Ptr = MMO->getValue();
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// UndefValue means this is a load of a kernel input. These are uniform.
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// Sometimes LDS instructions have constant pointers.
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// If Ptr is null, then that means this mem operand contains a
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// PseudoSourceValue like GOT.
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if (!Ptr || isa<UndefValue>(Ptr) ||
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isa<Constant>(Ptr) || isa<GlobalValue>(Ptr))
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return true;
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if (MMO->getAddrSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT)
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return true;
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if (const Argument *Arg = dyn_cast<Argument>(Ptr))
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return AMDGPU::isArgPassedInSGPR(Arg);
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const Instruction *I = dyn_cast<Instruction>(Ptr);
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return I && I->getMetadata("amdgpu.uniform");
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}
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