b01c006f73
The renamable flag is useful during MachineCopyPropagation but renamable flag will be dropped after lowerCopy in some case. This patch introduces extra arguments to pass the renamable flag to copyPhysReg.
92 lines
3.4 KiB
C++
92 lines
3.4 KiB
C++
//===-- CSKYInstrInfo.h - CSKY Instruction Information --------*- C++ -*---===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the CSKY implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
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#define LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
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#include "MCTargetDesc/CSKYMCTargetDesc.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#define GET_INSTRINFO_HEADER
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#include "CSKYGenInstrInfo.inc"
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namespace llvm {
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class CSKYSubtarget;
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class CSKYInstrInfo : public CSKYGenInstrInfo {
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bool v2sf;
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bool v2df;
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bool v3sf;
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bool v3df;
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protected:
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const CSKYSubtarget &STI;
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public:
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explicit CSKYInstrInfo(CSKYSubtarget &STI);
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Register isLoadFromStackSlot(const MachineInstr &MI,
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int &FrameIndex) const override;
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Register isStoreToStackSlot(const MachineInstr &MI,
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int &FrameIndex) const override;
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI, Register SrcReg,
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bool IsKill, int FrameIndex,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI,
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Register VReg) const override;
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI, Register DestReg,
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int FrameIndex, const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI,
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Register VReg) const override;
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void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
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bool KillSrc, bool RenamableDest = false,
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bool RenamableSrc = false) const override;
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unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
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const DebugLoc &DL,
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int *BytesAdded = nullptr) const override;
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bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify = false) const override;
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unsigned removeBranch(MachineBasicBlock &MBB,
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int *BytesRemoved = nullptr) const override;
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bool
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reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
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MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;
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unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
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Register getGlobalBaseReg(MachineFunction &MF) const;
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// Materializes the given integer Val into DstReg.
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Register movImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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const DebugLoc &DL, uint64_t Val,
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MachineInstr::MIFlag Flag = MachineInstr::NoFlags) const;
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};
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_CSKY_CSKYINSTRINFO_H
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