b01c006f73
The renamable flag is useful during MachineCopyPropagation but renamable flag will be dropped after lowerCopy in some case. This patch introduces extra arguments to pass the renamable flag to copyPhysReg.
81 lines
2.9 KiB
C++
81 lines
2.9 KiB
C++
//=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file contains the WebAssembly implementation of the
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/// TargetInstrInfo class.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
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#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
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#include "WebAssemblyRegisterInfo.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#define GET_INSTRINFO_HEADER
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#include "WebAssemblyGenInstrInfo.inc"
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#define GET_INSTRINFO_OPERAND_ENUM
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#include "WebAssemblyGenInstrInfo.inc"
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namespace llvm {
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namespace WebAssembly {
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int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex);
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}
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class WebAssemblySubtarget;
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class WebAssemblyInstrInfo final : public WebAssemblyGenInstrInfo {
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const WebAssemblyRegisterInfo RI;
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public:
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explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI);
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const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; }
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bool isReallyTriviallyReMaterializable(const MachineInstr &MI) const override;
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void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
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bool KillSrc, bool RenamableDest = false,
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bool RenamableSrc = false) const override;
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MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
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unsigned OpIdx1,
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unsigned OpIdx2) const override;
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bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify = false) const override;
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unsigned removeBranch(MachineBasicBlock &MBB,
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int *BytesRemoved = nullptr) const override;
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unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
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const DebugLoc &DL,
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int *BytesAdded = nullptr) const override;
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bool
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reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
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ArrayRef<std::pair<int, const char *>>
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getSerializableTargetIndices() const override;
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const MachineOperand &getCalleeOperand(const MachineInstr &MI) const override;
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bool isExplicitTargetIndexDef(const MachineInstr &MI, int &Index,
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int64_t &Offset) const override;
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};
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} // end namespace llvm
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#endif
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