Akshat Oke 96c4f978d0

[AMDGPU][NewPM] Port SIOptimizeExecMasking to NPM (#123572)

2025-01-20 16:34:01 +05:30

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AArch64

[AArch64] Add more funnel shift test coverage. NFC

2025-01-19 18:27:41 +00:00

AMDGPU

[AMDGPU][NewPM] Port SIOptimizeExecMasking to NPM (#123572)

2025-01-20 16:34:01 +05:30

ARC

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ARM

[CodeGenPrepare] Replace undef use with poison [NFC] (#123111)

2025-01-16 08:17:55 +00:00

AVR

[AVR] Force relocations for non-encodable jumps (#121498)

2025-01-20 09:23:57 +08:00

BPF

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CSKY

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DirectX

[HLSL][SPIRV][DXIL] Implement WaveActiveSum intrinsic (#118580)

2025-01-16 10:35:23 -08:00

Generic

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Hexagon

[Hexagon] Omit calls to specialized {float,fix} routines (#117423)

2025-01-15 14:21:48 -06:00

Inputs

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Lanai

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LoongArch

[LoongArch] Add generation support for preld instruction (#118436)

2025-01-20 16:11:09 +08:00

M68k

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Mips

[Mips] Fix compiler crash when returning fp128 after calling a functi… (#117525)

2025-01-20 16:47:40 +08:00

MIR

[AMDGPU] Fix printing hasInitWholeWave in mir (#123232)

2025-01-17 03:00:02 -08:00

MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Improve support for {ex2,lg2}.approx (#120519)

2025-01-16 12:21:32 -08:00

PowerPC

[llvm] Mark scavenging spill-slots as *spilled* stack objects. (#122673)

2025-01-14 10:18:31 +02:00

RISCV

[RISCV] Consider only legally typed splats to be legal shuffles (#123415)

2025-01-17 19:13:04 -08:00

SPARC

[LegalizeIntegerTypes] Use forceExpandWideMUL in ExpandIntRes_XMULO. (#123432)

2025-01-18 08:37:03 -08:00

SPIRV

[SPIRV] add pre legalization instruction combine (#122839)

2025-01-17 14:46:14 -05:00

SystemZ

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Thumb

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Thumb2

Revert "[MachineLICM] Use RegisterClassInfo::getRegPressureSetLimit (#119826)"

2025-01-10 09:05:06 +01:00

VE

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WebAssembly

[WebAssembly] Add -wasm-use-legacy-eh option (#122158)

2025-01-09 22:36:10 -08:00

WinCFGuard

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WinEH

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X86

[X86] combinePTESTCC - fold PTESTC(PCMPEQ(X,0),-1) == PTESTZ(X,X) (#123466)

2025-01-19 13:09:17 +00:00

XCore

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Xtensa

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