f0415f2a45
Re-land D145441 with data layout upgrade code fixed to not break OpenMP. This reverts commit 3f2fbe92d0f40bcb46db7636db9ec3f7e7899b27. Differential Revision: https://reviews.llvm.org/D149776
30 lines
1.3 KiB
LLVM
30 lines
1.3 KiB
LLVM
; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=load-store-vectorizer -S -o - %s | FileCheck %s
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; RUN: opt -mtriple=amdgcn-amd-amdhsa -aa-pipeline=basic-aa -passes='function(load-store-vectorizer)' -S -o - %s | FileCheck %s
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target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
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; CHECK-LABEL: @interleave
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; CHECK: load <2 x double>, ptr addrspace(1) %{{.}}, align 8{{$}}
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; CHECK: store <2 x double> zeroinitializer
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; CHECK: store double %add
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define amdgpu_kernel void @interleave(ptr addrspace(1) nocapture %a, ptr addrspace(1) nocapture %b, ptr addrspace(1) nocapture readonly %c) #0 {
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entry:
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%a.idx.1 = getelementptr inbounds double, ptr addrspace(1) %a, i64 1
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%c.idx.1 = getelementptr inbounds double, ptr addrspace(1) %c, i64 1
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%ld.c = load double, ptr addrspace(1) %c, align 8
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store double 0.0, ptr addrspace(1) %a, align 8 ; Cannot alias invariant load
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%ld.c.idx.1 = load double, ptr addrspace(1) %c.idx.1, align 8, !invariant.load !0
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store double 0.0, ptr addrspace(1) %a.idx.1, align 8
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%add = fadd double %ld.c, %ld.c.idx.1
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store double %add, ptr addrspace(1) %b
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ret void
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}
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attributes #0 = { nounwind }
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!0 = !{}
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