87 lines
4.5 KiB
LLVM
87 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt < %s -passes=loop-vectorize -mtriple=x86_64-unknown-linux -S -mcpu=slm | FileCheck %s
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; REQUIRES: asserts
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; This test should not be vectorized in X86\SLM arch
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; Vectorizing the 64bit multiply in this case is wrong since
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; it can be done with a lower bit mode (notice that the sources is 16bit)
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; Also addq\subq (quad word) has a high cost on SLM arch.
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; this test has a bad performance (regression of -70%) if vectorized on SLM arch
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define i32 @no_vec(i32 %LastIndex, ptr nocapture readonly %InputData, i16 signext %lag, i16 signext %Scale) {
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; CHECK-LABEL: define i32 @no_vec
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; CHECK-SAME: (i32 [[LASTINDEX:%.*]], ptr nocapture readonly [[INPUTDATA:%.*]], i16 signext [[LAG:%.*]], i16 signext [[SCALE:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP17:%.*]] = icmp sgt i32 [[LASTINDEX]], 0
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; CHECK-NEXT: br i1 [[CMP17]], label [[FOR_BODY_LR_PH:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; CHECK: for.body.lr.ph:
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; CHECK-NEXT: [[CONV5:%.*]] = sext i16 [[SCALE]] to i64
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; CHECK-NEXT: [[SH_PROM:%.*]] = and i64 [[CONV5]], 4294967295
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; CHECK-NEXT: [[TMP0:%.*]] = sext i16 [[LAG]] to i64
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; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[LASTINDEX]] to i64
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.cond.cleanup.loopexit:
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; CHECK-NEXT: [[ADD7_LCSSA:%.*]] = phi i64 [ [[ADD7:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[CONV8:%.*]] = trunc i64 [[ADD7_LCSSA]] to i32
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; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
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; CHECK: for.cond.cleanup:
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; CHECK-NEXT: [[ACCUMULATOR_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[CONV8]], [[FOR_COND_CLEANUP_LOOPEXIT:%.*]] ]
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; CHECK-NEXT: ret i32 [[ACCUMULATOR_0_LCSSA]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[ACCUMULATOR_018:%.*]] = phi i64 [ 0, [[FOR_BODY_LR_PH]] ], [ [[ADD7]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[INPUTDATA]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr [[ARRAYIDX]], align 2
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; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[TMP1]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
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; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i16, ptr [[INPUTDATA]], i64 [[TMP2]]
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; CHECK-NEXT: [[TMP3:%.*]] = load i16, ptr [[ARRAYIDX3]], align 2
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; CHECK-NEXT: [[CONV4:%.*]] = sext i16 [[TMP3]] to i64
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; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV4]], [[CONV]]
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; CHECK-NEXT: [[SHR:%.*]] = ashr i64 [[MUL]], [[SH_PROM]]
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; CHECK-NEXT: [[ADD7]] = add i64 [[SHR]], [[ACCUMULATOR_018]]
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP_LOOPEXIT]], label [[FOR_BODY]]
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;
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entry:
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%cmp17 = icmp sgt i32 %LastIndex, 0
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br i1 %cmp17, label %for.body.lr.ph, label %for.cond.cleanup
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for.body.lr.ph: ; preds = %entry
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%conv5 = sext i16 %Scale to i64
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%sh_prom = and i64 %conv5, 4294967295
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%0 = sext i16 %lag to i64
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%wide.trip.count = zext i32 %LastIndex to i64
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br label %for.body
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for.cond.cleanup.loopexit: ; preds = %for.body
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%conv8 = trunc i64 %add7 to i32
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br label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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%Accumulator.0.lcssa = phi i32 [ 0, %entry ], [ %conv8, %for.cond.cleanup.loopexit ]
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ret i32 %Accumulator.0.lcssa
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for.body: ; preds = %for.body, %for.body.lr.ph
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%indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
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%Accumulator.018 = phi i64 [ 0, %for.body.lr.ph ], [ %add7, %for.body ]
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%arrayidx = getelementptr inbounds i16, ptr %InputData, i64 %indvars.iv
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%1 = load i16, ptr %arrayidx, align 2
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%conv = sext i16 %1 to i64
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%2 = add nsw i64 %indvars.iv, %0
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%arrayidx3 = getelementptr inbounds i16, ptr %InputData, i64 %2
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%3 = load i16, ptr %arrayidx3, align 2
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%conv4 = sext i16 %3 to i64
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%mul = mul nsw i64 %conv4, %conv
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%shr = ashr i64 %mul, %sh_prom
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%add7 = add i64 %shr, %Accumulator.018
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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