8df64ed777
In some cases, there might be a chain of uniform instructions producing the exit value. To generate correct code in all cases, consider the IV increment not uniform, if there are users outside the loop. Instead, let VPlan narrow the IV, if possible using the logic from 3ff1d01985752. Test case from #122602 verified with Alive2: https://alive2.llvm.org/ce/z/bA4EGj Fixes https://github.com/llvm/llvm-project/issues/122496. Fixes https://github.com/llvm/llvm-project/issues/122602.
98 lines
3.7 KiB
LLVM
98 lines
3.7 KiB
LLVM
; RUN: opt < %s -passes=loop-vectorize -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 -debug-only=loop-vectorize -S 2>&1 | FileCheck %s
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; REQUIRES: asserts
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; CHECK-LABEL: test
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; CHECK-DAG: LV: Found uniform instruction: %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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; CHECK-DAG: LV: Found uniform instruction: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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; CHECK-DAG: LV: Found uniform instruction: %exitcond = icmp eq i64 %indvars.iv, 1599
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define void @test(ptr noalias nocapture %a, ptr noalias nocapture readonly %b) #0 {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds float, ptr %b, i64 %indvars.iv
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%tmp0 = load float, ptr %arrayidx, align 4
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%add = fadd float %tmp0, 1.000000e+00
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%arrayidx5 = getelementptr inbounds float, ptr %a, i64 %indvars.iv
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store float %add, ptr %arrayidx5, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv, 1599
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret void
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}
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; CHECK-LABEL: foo
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; CHECK-DAG: LV: Found uniform instruction: %cond = icmp eq i64 %i.next, %n
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; CHECK-DAG: LV: Found uniform instruction: %tmp1 = getelementptr inbounds i32, ptr %a, i32 %tmp0
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; CHECK-NOT: LV: Found uniform instruction: %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
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define void @foo(ptr %a, i64 %n) {
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entry:
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br label %for.body
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for.body:
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%i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
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%tmp0 = trunc i64 %i to i32
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%tmp1 = getelementptr inbounds i32, ptr %a, i32 %tmp0
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store i32 %tmp0, ptr %tmp1, align 4
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%i.next = add nuw nsw i64 %i, 1
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%cond = icmp eq i64 %i.next, %n
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br i1 %cond, label %for.end, label %for.body
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for.end:
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ret void
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}
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; CHECK-LABEL: goo
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; Check %indvars.iv and %indvars.iv.next are uniform instructions even if they are used outside of loop.
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; CHECK-DAG: LV: Found uniform instruction: %exitcond = icmp eq i64 %indvars.iv, 1599
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define i64 @goo(ptr noalias nocapture %a, ptr noalias nocapture readonly %b) #0 {
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entry:
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br label %for.body
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds float, ptr %b, i64 %indvars.iv
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%tmp0 = load float, ptr %arrayidx, align 4
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%add = fadd float %tmp0, 1.000000e+00
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%arrayidx5 = getelementptr inbounds float, ptr %a, i64 %indvars.iv
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store float %add, ptr %arrayidx5, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv, 1599
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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%retval = add i64 %indvars.iv, %indvars.iv.next
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ret i64 %retval
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}
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; CHECK-LABEL: PR38786
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; Check that first order recurrence phis (%phi32 and %phi64) are not uniform.
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; CHECK-NOT: LV: Found uniform instruction: %phi
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define void @PR38786(ptr %y, ptr %x, i64 %n) {
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entry:
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br label %for.body
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for.body:
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%phi32 = phi i32 [ 0, %entry ], [ %i32next, %for.body ]
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%phi64 = phi i64 [ 0, %entry ], [ %i64next, %for.body ]
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%i32next = add i32 %phi32, 1
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%i64next = zext i32 %i32next to i64
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%xip = getelementptr inbounds double, ptr %x, i64 %i64next
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%yip = getelementptr inbounds double, ptr %y, i64 %phi64
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%xi = load double, ptr %xip, align 8
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store double %xi, ptr %yip, align 8
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%cmp = icmp slt i64 %i64next, %n
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br i1 %cmp, label %for.body, label %for.end
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for.end:
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ret void
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}
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