43c1c59f73
With this patch we track aligned barriers in AAExecutionDomain and also delete unnecessary barriers there. This allows us to eliminate barriers across blocks, across functions, and in the presence of complex accesses that do not force a barrier. Further, we can use the collected information to enable store-load forwarding in a threaded environment (follow up patch). Differential Revision: https://reviews.llvm.org/D140463
47 lines
1.6 KiB
LLVM
47 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs
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; RUN: opt < %s -S -passes=openmp-opt | FileCheck %s --check-prefix=MODULE
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; RUN: opt < %s -S -passes=openmp-opt-cgscc | FileCheck %s --check-prefix=CGSCC
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target triple = "nvptx64-nvidia-cuda"
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declare noalias ptr @alloc()
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define internal i32 @nblist() {
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%1 = call ptr @alloc()
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call fastcc void @rec(ptr %1, i64 0)
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ret i32 0
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}
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define fastcc void @rec(ptr %0, i64 %1) {
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%3 = getelementptr i32, ptr %0, i64 %1
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store i32 0, ptr %3, align 4
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call fastcc void @rec(ptr %0, i64 0)
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ret void
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}
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!llvm.module.flags = !{!0, !1}
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!0 = !{i32 7, !"openmp", i32 50}
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!1 = !{i32 7, !"openmp-device", i32 50}
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; MODULE-LABEL: define {{[^@]+}}@rec
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; MODULE-SAME: (ptr [[TMP0:%.*]], i64 [[TMP1:%.*]]) {
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; MODULE-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[TMP0]], i64 [[TMP1]]
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; MODULE-NEXT: store i32 0, ptr [[TMP3]], align 4
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; MODULE-NEXT: call fastcc void @rec(ptr [[TMP0]], i64 0)
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; MODULE-NEXT: ret void
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;
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;
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; CGSCC-LABEL: define {{[^@]+}}@nblist() {
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; CGSCC-NEXT: [[TMP1:%.*]] = call ptr @alloc()
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; CGSCC-NEXT: call fastcc void @rec(ptr [[TMP1]], i64 0)
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; CGSCC-NEXT: ret i32 0
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;
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;
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; CGSCC-LABEL: define {{[^@]+}}@rec
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; CGSCC-SAME: (ptr nocapture writeonly [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
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; CGSCC-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[TMP0]], i64 [[TMP1]]
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; CGSCC-NEXT: store i32 0, ptr [[TMP3]], align 4
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; CGSCC-NEXT: call fastcc void @rec(ptr nocapture writeonly [[TMP0]], i64 0) #[[ATTR1:[0-9]+]]
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; CGSCC-NEXT: ret void
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;
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