llvm-project/llvm/test/CodeGen/X86/fp80-strict-vec-cmp.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s

define <1 x i1> @test_oeq_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_oeq_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setnp %cl
; CHECK-NEXT:    sete %al
; CHECK-NEXT:    andb %cl, %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oeq", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ogt_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ogt_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    seta %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ogt", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_oge_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_oge_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setae %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oge", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_olt_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_olt_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm0, %xmm1
; CHECK-NEXT:    seta %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"olt", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ole_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ole_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm0, %xmm1
; CHECK-NEXT:    setae %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ole", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_one_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_one_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setne %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"one", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ord_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ord_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setnp %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ord", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ueq_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ueq_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setnp %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ord", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ugt_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ugt_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm0, %xmm1
; CHECK-NEXT:    setb %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ugt", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_uge_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_uge_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm0, %xmm1
; CHECK-NEXT:    setbe %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"uge", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ult_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ult_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setb %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ult", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ule_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ule_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setbe %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ule", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_une_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_une_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setp %cl
; CHECK-NEXT:    setne %al
; CHECK-NEXT:    orb %cl, %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"une", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_uno_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_uno_q_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vucomisd %xmm1, %xmm0
; CHECK-NEXT:    setp %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %a, <1 x double> %b, metadata !"uno", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_oeq_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_oeq_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setnp %cl
; CHECK-NEXT:    sete %al
; CHECK-NEXT:    andb %cl, %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oeq", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ogt_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ogt_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    seta %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ogt", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_oge_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_oge_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setae %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"oge", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_olt_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_olt_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm0, %xmm1
; CHECK-NEXT:    seta %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"olt", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ole_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ole_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm0, %xmm1
; CHECK-NEXT:    setae %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ole", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_one_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_one_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setne %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"one", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ord_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ord_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setnp %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ord", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ueq_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ueq_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setnp %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ord", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ugt_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ugt_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm0, %xmm1
; CHECK-NEXT:    setb %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ugt", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_uge_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_uge_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm0, %xmm1
; CHECK-NEXT:    setbe %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"uge", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ult_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ult_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setb %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ult", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_ule_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_ule_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setbe %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"ule", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_une_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_une_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setp %cl
; CHECK-NEXT:    setne %al
; CHECK-NEXT:    orb %cl, %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"une", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

define <1 x i1> @test_uno_s_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_uno_s_v1f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vcomisd %xmm1, %xmm0
; CHECK-NEXT:    setp %al
; CHECK-NEXT:    retq
  %cond = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %a, <1 x double> %b, metadata !"uno", metadata !"fpexcept.strict")
  ret <1 x i1> %cond
}

declare <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double>, <1 x double>, metadata, metadata)
declare <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double>, <1 x double>, metadata, metadata)