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llvm-project/llvm/lib/Target/AArch64
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Guillaume Chatelet dc3367970e [SelectionDAG] Handle bzero/memset libcalls globally instead of per target 
Differential Revision: https://reviews.llvm.org/D127279
2022-06-09 08:34:55 +00:00
..
AsmParser
[MC] Add 'G' to augmentation string for MTE instrumented functions
2022-06-08 12:36:32 -07:00
Disassembler
[MCDisassembler] Disambiguate Size parameter in tryAddingSymbolicOperand()
2022-05-25 13:44:32 -07:00
GISel
[CodeGen][AArch64] Add support for LDAPR
2022-05-31 21:40:50 +00:00
MCTargetDesc
[MC] [Win64EH] Wrap the epilog instructions in a struct. NFC.
2022-06-01 11:25:48 +03:00
TargetInfo
Fix shlib builds for all lib/Target/*/TargetInfo libs
2021-10-08 15:21:13 -07:00
Utils
[SVE][CodeGen] Use splice instruction when lowering VECTOR_SPLICE
2022-01-11 11:58:17 +00:00
AArch64.h
[CodeGen] Async unwind - add a pass to fix CFI information
2022-04-11 13:27:26 +01:00
AArch64.td
[CodeGen][AArch64] Add support for LDAPR
2022-05-31 21:40:50 +00:00
AArch64A53Fix835769.cpp
Fix warnings about variables that are set but only used in debug mode
2022-04-06 10:01:46 +03:00
AArch64A57FPLoadBalancing.cpp
…
AArch64AdvSIMDScalarPass.cpp
[llvm] Use range-based for loops (NFC)
2021-12-11 11:29:12 -08:00
AArch64AsmPrinter.cpp
[MC] Add 'G' to augmentation string for MTE instrumented functions
2022-06-08 12:36:32 -07:00
AArch64BranchTargets.cpp
…
AArch64CallingConvention.cpp
…
AArch64CallingConvention.h
…
AArch64CallingConvention.td
AArch64: don't claim to preserve registers used by prologue code
2022-01-10 12:27:04 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
…
AArch64CollectLOH.cpp
[AArch64][LOH] Don't ignore regmasks in bundles by iterating over instrs.
2022-04-12 10:34:54 -07:00
AArch64Combine.td
[AArch64][GlobalISel] Add undef combines to postlegalizer combiner.
2022-05-05 09:22:08 -07:00
AArch64CompressJumpTables.cpp
…
AArch64CondBrTuning.cpp
[llvm] Use range-based for loops (NFC)
2021-11-28 10:04:54 -08:00
AArch64ConditionalCompares.cpp
[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
2022-03-16 20:25:42 +08:00
AArch64ConditionOptimizer.cpp
…
AArch64DeadRegisterDefinitionsPass.cpp
…
AArch64ExpandImm.cpp
[llvm] Use range-based for loops (NFC)
2021-12-11 11:29:12 -08:00
AArch64ExpandImm.h
…
AArch64ExpandPseudoInsts.cpp
Reland "[llvm][AArch64] Insert "bti j" after call to setjmp"
2022-03-23 11:43:43 +00:00
AArch64FalkorHWPFFix.cpp
[Target] use getSubtarget<> instead of static_cast<>(getSubtarget())
2022-05-26 11:22:41 -07:00
AArch64FastISel.cpp
[Target] use getSubtarget<> instead of static_cast<>(getSubtarget())
2022-05-26 11:22:41 -07:00
AArch64FrameLowering.cpp
[MC] Add 'G' to augmentation string for MTE instrumented functions
2022-06-08 12:36:32 -07:00
AArch64FrameLowering.h
[AArch64] Add support for -fzero-call-used-regs
2022-05-19 16:58:28 -07:00
AArch64GenRegisterBankInfo.def
…
AArch64InstrAtomics.td
[CodeGen][AArch64] Add support for LDAPR
2022-05-31 21:40:50 +00:00
AArch64InstrFormats.td
[AArch64] Remove references to Streaming SVE from target features.
2022-05-31 16:25:01 +02:00
AArch64InstrGISel.td
…
AArch64InstrInfo.cpp
[llvm] Convert for_each to range-based for loops (NFC)
2022-06-05 12:07:14 -07:00
AArch64InstrInfo.h
[AArch64] Async unwind - function epilogues
2022-04-12 16:50:50 +01:00
AArch64InstrInfo.td
[MC] Add 'G' to augmentation string for MTE instrumented functions
2022-06-08 12:36:32 -07:00
AArch64ISelDAGToDAG.cpp
[AArch64] Remove isDef32
2022-06-07 18:57:59 +01:00
AArch64ISelLowering.cpp
[SVE] Fix incorrect code generation for bitcasts of unpacked vector types.
2022-06-08 10:30:07 +01:00
AArch64ISelLowering.h
[AArch64] Remove isDef32
2022-06-07 18:57:59 +01:00
AArch64LoadStoreOptimizer.cpp
[Target] use getSubtarget<> instead of static_cast<>(getSubtarget())
2022-05-26 11:22:41 -07:00
AArch64LowerHomogeneousPrologEpilog.cpp
[llvm] Use llvm::is_contained (NFC)
2021-10-14 22:44:09 -07:00
AArch64MachineFunctionInfo.cpp
[MC] Add 'G' to augmentation string for MTE instrumented functions
2022-06-08 12:36:32 -07:00
AArch64MachineFunctionInfo.h
[MC] Add 'G' to augmentation string for MTE instrumented functions
2022-06-08 12:36:32 -07:00
AArch64MachineScheduler.cpp
[AArch64] Order STP Q's by ascending address
2022-05-23 09:50:44 +01:00
AArch64MachineScheduler.h
[AArch64] Order STP Q's by ascending address
2022-05-23 09:50:44 +01:00
AArch64MacroFusion.cpp
[AArch64] Split fuse-literals feature
2022-04-11 05:27:11 +00:00
AArch64MacroFusion.h
…
AArch64MCInstLower.cpp
…
AArch64MCInstLower.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
AArch64MIPeepholeOpt.cpp
[AArch64] Remove ToBeRemoved from AArch64MIPeepholeOpt
2022-06-08 17:26:07 +01:00
AArch64PBQPRegAlloc.cpp
…
AArch64PBQPRegAlloc.h
…
AArch64PerfectShuffle.h
[AArch64] Teach perfect shuffles tables about D-lane movs
2022-05-17 18:16:45 +01:00
AArch64PfmCounters.td
…
AArch64PromoteConstant.cpp
…
AArch64RedundantCopyElimination.cpp
…
AArch64RegisterBanks.td
…
AArch64RegisterInfo.cpp
[AArch64] Add support for -fzero-call-used-regs
2022-05-19 16:58:28 -07:00
AArch64RegisterInfo.h
[AArch64] Add support for -fzero-call-used-regs
2022-05-19 16:58:28 -07:00
AArch64RegisterInfo.td
[AArch64] Add support for -fzero-call-used-regs
2022-05-19 16:58:28 -07:00
AArch64SchedA53.td
…
AArch64SchedA55.td
Partially revert "[SchedModels][CortexA55] Add ASIMD integer instructions"
2022-02-28 10:58:52 +00:00
AArch64SchedA57.td
[AArch64] Rename CPY to DUP. NFC
2022-01-05 20:02:39 +00:00
AArch64SchedA57WriteRes.td
…
AArch64SchedA64FX.td
[AArch64] Remove references to Streaming SVE from target features.
2022-05-31 16:25:01 +02:00
AArch64SchedAmpere1.td
[AArch64] Support for Ampere1 core
2022-05-03 15:54:02 +01:00
AArch64SchedCyclone.td
…
AArch64SchedExynosM3.td
[AArch64] Rename CPY to DUP. NFC
2022-01-05 20:02:39 +00:00
AArch64SchedExynosM4.td
[AArch64] Rename CPY to DUP. NFC
2022-01-05 20:02:39 +00:00
AArch64SchedExynosM5.td
[AArch64] Rename CPY to DUP. NFC
2022-01-05 20:02:39 +00:00
AArch64SchedFalkor.td
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AArch64SchedFalkorDetails.td
[AArch64] Rename CPY to DUP. NFC
2022-01-05 20:02:39 +00:00
AArch64SchedKryo.td
…
AArch64SchedKryoDetails.td
…
AArch64SchedPredAmpere.td
[AArch64] Support for Ampere1 core
2022-05-03 15:54:02 +01:00
AArch64SchedPredExynos.td
[AArch64][SchedModels] Handle virtual registers in FP/NEON predicates
2022-02-17 13:41:05 +03:00
AArch64SchedPredicates.td
[AArch64] Support for Ampere1 core
2022-05-03 15:54:02 +01:00
AArch64SchedThunderX2T99.td
[AArch64] Rename CPY to DUP. NFC
2022-01-05 20:02:39 +00:00
AArch64SchedThunderX3T110.td
[AArch64] Rename CPY to DUP. NFC
2022-01-05 20:02:39 +00:00
AArch64SchedThunderX.td
…
AArch64SchedTSV110.td
…
AArch64Schedule.td
…
AArch64SelectionDAGInfo.cpp
[SelectionDAG] Handle bzero/memset libcalls globally instead of per target
2022-06-09 08:34:55 +00:00
AArch64SelectionDAGInfo.h
[AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS
2022-01-31 20:56:27 +00:00
AArch64SIMDInstrOpt.cpp
[llvm] Use nullptr instead of 0 (NFC)
2021-12-28 08:52:25 -08:00
AArch64SLSHardening.cpp
[NFC][CodeGen] Rename some functions in MachineInstr.h and remove duplicated comments
2022-03-16 20:25:42 +08:00
AArch64SMEInstrInfo.td
[AArch64][SME] Add rdsvl instruction
2022-02-28 23:14:50 +00:00
AArch64SpeculationHardening.cpp
[NFC] Use Register instead of unsigned
2022-01-19 20:17:04 +08:00
AArch64StackTagging.cpp
Remove unneeded cl::ZeroOrMore for cl::opt options
2022-06-04 00:10:42 -07:00
AArch64StackTaggingPreRA.cpp
Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options
2022-06-05 00:31:44 -07:00
AArch64StorePairSuppress.cpp
…
AArch64Subtarget.cpp
[AArch64] Add -aarch64-insert-extract-base-cost
2022-05-05 10:35:45 +00:00
AArch64Subtarget.h
[AArch64] Add -aarch64-insert-extract-base-cost
2022-05-05 10:35:45 +00:00
AArch64SVEInstrInfo.td
[SVE] Remove custom lowering of scalable vector MGATHER & MSCATTER operations.
2022-06-02 11:19:52 +01:00
AArch64SystemOperands.td
[AArch64] Make PMMIR_EL1 read-only.
2022-04-05 11:09:56 +01:00
AArch64TargetMachine.cpp
Give option to use isCopyInstr to determine which MI is
2022-05-26 18:43:16 +00:00
AArch64TargetMachine.h
mark getTargetTransformInfo and getTargetIRAnalysis as const
2022-02-25 14:30:44 -05:00
AArch64TargetObjectFile.cpp
[Target] Remove redundant member initialization (NFC)
2022-01-06 22:01:44 -08:00
AArch64TargetObjectFile.h
[Target] Remove unused forward declarations (NFC)
2022-01-02 10:20:15 -08:00
AArch64TargetTransformInfo.cpp
Revert "Revert "[AArch64] Set maximum VF with shouldMaximizeVectorBandwidth""
2022-05-23 16:15:45 +01:00
AArch64TargetTransformInfo.h
Revert "Revert "[AArch64] Set maximum VF with shouldMaximizeVectorBandwidth""
2022-05-23 16:15:45 +01:00
CMakeLists.txt
[AArch64] Order STP Q's by ascending address
2022-05-23 09:50:44 +01:00
SMEInstrFormats.td
[AArch64][SME]Tied up ZA operand for accumulate instructions
2022-05-20 10:42:10 +01:00
SVEInstrFormats.td
[AArch64] Remove references to Streaming SVE from target features.
2022-05-31 16:25:01 +02:00
SVEIntrinsicOpts.cpp
[Aarch64] Remove redundant declaration initializeSVEIntrinsicOptsPass (NFC)
2022-01-01 09:14:25 -08:00