pico-ice-video/ice/spram.sv

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Systemverilog
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module spram
(
input wire clk,
input wire [3:0] we,
input wire [13:0] addr,
input wire [15:0] data_in,
output wire [15:0] data_out
);
`ifdef VERILATOR
reg [15:0] mem[16384];
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reg [15:0] data_out_r;
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always_ff @(posedge clk) begin
integer i;
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for (i = 0; i < 4; i = i + 1) begin
if (we[i]) begin
mem[addr][(3+4*i)+:4] <= data_in[(3+4*i)+:4];
end
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end
data_out_r <= mem[addr];
end
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assign data_out = data_out_r;
`else
SP256K bb_spram_inst(.AD(addr), .DI(data_in), .MASKWE(we), .WE(|we), .CS('1), .CK(clk), .STDBY('0), .SLEEP('0), .PWROFF_N('1), .DO(data_out));
`endif
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endmodule