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Update radiant project file

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shylie 2024-10-17 11:16:40 -04:00
parent c499787a5b
commit d6a63afc19
4 changed files with 116 additions and 36 deletions
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2
ice/mandelbrot/.ng_run_manager.ini
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@ -1,6 +1,6 @@
[Runmanager]
Geometry=@ByteArray(\x1\xd9\xd0\xcb\0\x3\0\0\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9\0\0\0\0\0\0\0\0\n\0\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9)
headerState=@ByteArray(\0\0\0\xff\0\0\0\0\0\0\0\x1\0\0\0\x1\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x15\0\xf0\x1f\0\0\0\t\0\0\0\xe\0\0\0\x64\0\0\0\xf\0\0\0\x64\0\0\0\f\0\0\0\x64\0\0\0\r\0\0\0\x64\0\0\0\x12\0\0\0\x64\0\0\0\x13\0\0\0\x64\0\0\0\x10\0\0\0\x64\0\0\0\x11\0\0\0\x64\0\0\0\x14\0\0\0\x64\0\0\x5\xf\0\0\0\x15\x1\x1\0\x1\0\0\0\0\0\0\0\0\0\0\0\0\x64\xff\xff\xff\xff\0\0\0\x84\0\0\0\0\0\0\0\x15\0\0\0\xc3\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\x3\xe8\0\0\0\0\x64)
headerState=@ByteArray(\0\0\0\xff\0\0\0\0\0\0\0\x1\0\0\0\x1\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x15\0\xf0\x1f\0\0\0\t\0\0\0\x11\0\0\0\x64\0\0\0\xe\0\0\0\x64\0\0\0\xf\0\0\0\x64\0\0\0\f\0\0\0\x64\0\0\0\r\0\0\0\x64\0\0\0\x14\0\0\0\x64\0\0\0\x12\0\0\0\x64\0\0\0\x13\0\0\0\x64\0\0\0\x10\0\0\0\x64\0\0\x5\xf\0\0\0\x15\x1\x1\0\x1\0\0\0\0\0\0\0\0\0\0\0\0\x64\xff\xff\xff\xff\0\0\0\x84\0\0\0\0\0\0\0\x15\0\0\0\xc3\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\x3\xe8\0\0\0\0\x64)
[impl_1%3CStrategy1%3E]
isChecked=false

35
ice/mandelbrot/.recovery
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@ -1,35 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<RadiantProject version="4.2" radiant="2024.1.0.34.2" title="mandelbrot" device="iCE40UP5K-SG48I" performance_grade="High-Performance_1.2V" family_int="ice40tp" device_int="itpa08" package_int="SG48" operation_int="IND" speed_int="6" default_implementation="impl_1">
<Options/>
<Implementation title="impl_1" dir="impl_1" description="impl_1" synthesis="synplify" default_strategy="Strategy1">
<Options def_top="top" top="top"/>
<Source name="source/impl_1/top.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog" top_module="top"/>
</Source>
<Source name="../ram.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../coords.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="source/impl_1/renderer.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="source/impl_1/multiplier.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../spram.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../spram_big.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC">
<Options/>
</Source>
<Source name="../constraints.sdc" type="Pre-Synthesis Constraints File" type_short="SDC">
<Options/>
</Source>
</Implementation>
<Strategy name="Strategy1" file="mandelbrot1.sty"/>
</RadiantProject>

3
ice/mandelbrot/mandelbrot.rdf
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@ -21,6 +21,9 @@
<Source name="../spram.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../spram_big.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC">
<Options/>
</Source>

112
ice/mandelbrot/mandelbrot_tcr.dir/pn241017111618.tcr Normal file
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@ -0,0 +1,112 @@
#Start recording tcl command: 10/16/2024 11:13:38
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run Synthesis -impl impl_1 -forceAll
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Map -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Synthesis -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spram_big.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Synthesis -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
#Stop recording: 10/17/2024 11:16:18