Update radiant project file

2024-10-09 16:27:48 -04:00 · 2024-10-09 16:27:48 -04:00 · dcc4a8215d
commit dcc4a8215d
parent e78a070b83
1 changed files with 3 additions and 0 deletions
--- a/ice/mandelbrot/mandelbrot.rdf
+++ b/ice/mandelbrot/mandelbrot.rdf
@ -18,6 +18,9 @@
        <Source name="source/impl_1/multiplier.sv" type="Verilog" type_short="Verilog">
            <Options VerilogStandard="System Verilog"/>
        </Source>
+        <Source name="../spram.sv" type="Verilog" type_short="Verilog">
+            <Options VerilogStandard="System Verilog"/>
+        </Source>
        <Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC">
            <Options/>
        </Source>