57 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			57 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| .pio_version 0
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| 
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| .program fpga
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| .fifo rx
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| 
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| set x, 8
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| 
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| .wrap_target
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| 
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| in x, 4
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| in null, 4
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| push
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| 
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| in pins, 8 [1]
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| push
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| 
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| in x, 4
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| in null, 4
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| push
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| 
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| in pins, 8 [1]
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| push
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| 
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| .wrap
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| 
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| % c-sdk {
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| #include <hardware/dma.h>
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| 
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| #ifndef DMA_CHANNEL
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| #define DMA_CHANNEL 0
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| #endif//DMA_CHANNEL
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| 
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| static uint8_t frame_buffer[2][FRAME_WIDTH * FRAME_HEIGHT * 16 / 8] = { };
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| static bool current_frame = false;
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| 
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| static inline void fpga_program_init(PIO pio, uint sm, uint offset, uint pin_base, float div)
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| {
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|     {
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|         pio_sm_config c = fpga_program_get_default_config(offset);
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|         sm_config_set_in_pins(&c, pin_base);
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|         pio_sm_set_consecutive_pindirs(pio, sm, pin_base, 8, false);
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| 
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|         sm_config_set_in_shift(&c, false, false, 8);
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| 
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|         pio_sm_init(pio, sm, offset, &c);
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|     }
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|     {
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|         dma_channel_config c = dma_channel_get_default_config(DMA_CHANNEL);
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|         channel_config_set_read_increment(&c, false);
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|         channel_config_set_write_increment(&c, true);
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|         channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
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|         channel_config_set_dreq(&c, pio_get_dreq(pio, sm, false));
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| 
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|         dma_channel_configure(DMA_CHANNEL, &c, NULL, &pio->rxf[sm], FRAME_WIDTH * FRAME_HEIGHT * 2 + 1, false);
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|     }
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| }
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| %} |