139 lines
9.2 KiB
TeX
139 lines
9.2 KiB
TeX
<?xml version="1.0" encoding="UTF-8"?>
|
|
<!DOCTYPE strategy>
|
|
<Strategy version="1.0" predefined="0" description="" label="Strategy1">
|
|
<Property name="PROP_BD_EdfHardtimer" value="Enable" time="0"/>
|
|
<Property name="PROP_BD_EdfInBusNameConv" value="None" time="0"/>
|
|
<Property name="PROP_BD_EdfInLibPath" value="" time="0"/>
|
|
<Property name="PROP_BD_EdfInRemLoc" value="Off" time="0"/>
|
|
<Property name="PROP_BD_EdfMemPath" value="" time="0"/>
|
|
<Property name="PROP_BD_ParSearchPath" value="" time="0"/>
|
|
<Property name="PROP_BIT_CmdLineArgs" value="" time="0"/>
|
|
<Property name="PROP_BIT_INITEBR0" value="True" time="0"/>
|
|
<Property name="PROP_BIT_INITEBR1" value="True" time="0"/>
|
|
<Property name="PROP_BIT_INITEBR2" value="True" time="0"/>
|
|
<Property name="PROP_BIT_INITEBR3" value="True" time="0"/>
|
|
<Property name="PROP_BIT_NVCMSecurity" value="False" time="0"/>
|
|
<Property name="PROP_BIT_NoHeader" value="False" time="0"/>
|
|
<Property name="PROP_BIT_NoPullup" value="False" time="0"/>
|
|
<Property name="PROP_BIT_OSCFREQ" value="Slow" time="0"/>
|
|
<Property name="PROP_BIT_OutFormatBitGen" value="bin" time="0"/>
|
|
<Property name="PROP_BIT_RunDRCBitGen" value="True" time="0"/>
|
|
<Property name="PROP_BIT_SPILowPower" value="False" time="0"/>
|
|
<Property name="PROP_BIT_WarmBoot" value="False" time="0"/>
|
|
<Property name="PROP_CPE_IPDebugMode" value="False" time="0"/>
|
|
<Property name="PROP_IOTIMING_AllSpeed" value="False" time="0"/>
|
|
<Property name="PROP_LST_AllowDUPMod" value="False" time="0"/>
|
|
<Property name="PROP_LST_AllowMixedAssignments" value="False" time="0"/>
|
|
<Property name="PROP_LST_CarryChain" value="True" time="0"/>
|
|
<Property name="PROP_LST_CarryChainLength" value="0" time="0"/>
|
|
<Property name="PROP_LST_CmdLineArgs" value="" time="0"/>
|
|
<Property name="PROP_LST_DSPStyle" value="DSP" time="0"/>
|
|
<Property name="PROP_LST_DSPUtil" value="100" time="0"/>
|
|
<Property name="PROP_LST_DecodeUnreachableStates" value="False" time="0"/>
|
|
<Property name="PROP_LST_EBRUtil" value="100" time="0"/>
|
|
<Property name="PROP_LST_EdfFrequency" value="200" time="0"/>
|
|
<Property name="PROP_LST_EdfInLibPath" value="" time="0"/>
|
|
<Property name="PROP_LST_EdfInRemLoc" value="Off" time="0"/>
|
|
<Property name="PROP_LST_EdfMemPath" value="" time="0"/>
|
|
<Property name="PROP_LST_FIXGATEDCLKS" value="True" time="0"/>
|
|
<Property name="PROP_LST_FSMEncodeStyle" value="Auto" time="0"/>
|
|
<Property name="PROP_LST_IOInsertion" value="True" time="0"/>
|
|
<Property name="PROP_LST_IgnoreSDCError" value="False" time="0"/>
|
|
<Property name="PROP_LST_InterFileDump" value="False" time="0"/>
|
|
<Property name="PROP_LST_LoopLimit" value="1950" time="0"/>
|
|
<Property name="PROP_LST_MaxFanout" value="1000" time="0"/>
|
|
<Property name="PROP_LST_OptimizeGoal" value="Area" time="0"/>
|
|
<Property name="PROP_LST_PropagatConst" value="True" time="0"/>
|
|
<Property name="PROP_LST_RAMStyle" value="Auto" time="0"/>
|
|
<Property name="PROP_LST_ROMStyle" value="Auto" time="0"/>
|
|
<Property name="PROP_LST_RWCheckOnRam" value="False" time="0"/>
|
|
<Property name="PROP_LST_RemoveDupRegs" value="True" time="0"/>
|
|
<Property name="PROP_LST_ReportTrimmedUserNets" value="False" time="0"/>
|
|
<Property name="PROP_LST_ResolvedMixedDrivers" value="False" time="0"/>
|
|
<Property name="PROP_LST_ResourceShare" value="True" time="0"/>
|
|
<Property name="PROP_LST_UseIOReg" value="Auto" time="0"/>
|
|
<Property name="PROP_LST_VHDL2008" value="False" time="0"/>
|
|
<Property name="PROP_MAPSTA_AnalysisOption" value="Standard Setup and Hold Analysis" time="0"/>
|
|
<Property name="PROP_MAPSTA_CmdLineArgs" value="" time="0"/>
|
|
<Property name="PROP_MAPSTA_EndPtNumber" value="10" time="0"/>
|
|
<Property name="PROP_MAPSTA_NPerEnd" value="1" time="0"/>
|
|
<Property name="PROP_MAPSTA_NumPathsPerClock" value="10" time="0"/>
|
|
<Property name="PROP_MAPSTA_ReportFormat" value="Lattice Standard" time="0"/>
|
|
<Property name="PROP_MAPSTA_SpeedForHoldAnalysis" value="m" time="0"/>
|
|
<Property name="PROP_MAPSTA_SpeedForSetupAnalysis" value="default" time="0"/>
|
|
<Property name="PROP_MAPSTA_UnconstrainedPathsNumber" value="10" time="0"/>
|
|
<Property name="PROP_MAP_IgnoreSDCErr" value="False" time="0"/>
|
|
<Property name="PROP_MAP_MapModArgs" value="" time="0"/>
|
|
<Property name="PROP_MAP_SigCrossRef" value="False" time="0"/>
|
|
<Property name="PROP_MAP_SymCrossRef" value="False" time="0"/>
|
|
<Property name="PROP_PARSTA_AnalysisOption" value="Standard Setup and Hold Analysis" time="0"/>
|
|
<Property name="PROP_PARSTA_CmdLineArgs" value="" time="0"/>
|
|
<Property name="PROP_PARSTA_EndPtNumber" value="10" time="0"/>
|
|
<Property name="PROP_PARSTA_NPerEnd" value="1" time="0"/>
|
|
<Property name="PROP_PARSTA_NumPathsPerClock" value="10" time="0"/>
|
|
<Property name="PROP_PARSTA_ReportFormat" value="Lattice Standard" time="0"/>
|
|
<Property name="PROP_PARSTA_SpeedForHoldAnalysis" value="m" time="0"/>
|
|
<Property name="PROP_PARSTA_SpeedForSetupAnalysis" value="default" time="0"/>
|
|
<Property name="PROP_PARSTA_UnconstrainedPathsNumber" value="10" time="0"/>
|
|
<Property name="PROP_PAR_DisableAutoHldTiming" value="False" time="0"/>
|
|
<Property name="PROP_PAR_DisableTDParDes" value="False" time="0"/>
|
|
<Property name="PROP_PAR_ImposeHoldTimeCorrect" value="False" time="0"/>
|
|
<Property name="PROP_PAR_NumOfHostMachineCores" value="1" time="0"/>
|
|
<Property name="PROP_PAR_PARModArgs" value="" time="0"/>
|
|
<Property name="PROP_PAR_PackLogicUtil" value="" time="0"/>
|
|
<Property name="PROP_PAR_ParMultiNodeList" value="" time="0"/>
|
|
<Property name="PROP_PAR_ParRunPlaceOnly" value="False" time="0"/>
|
|
<Property name="PROP_PAR_PlcIterParDes" value="1" time="0"/>
|
|
<Property name="PROP_PAR_PlcStCostTblParDes" value="1" time="0"/>
|
|
<Property name="PROP_PAR_PriHldCorrectOverSetup" value="False" time="0"/>
|
|
<Property name="PROP_PAR_SaveBestRsltParDes" value="1" time="0"/>
|
|
<Property name="PROP_PAR_SpdGradeHoldOpt" value="m" time="0"/>
|
|
<Property name="PROP_PAR_SpdGradeSetupOpt" value="Default" time="0"/>
|
|
<Property name="PROP_PAR_StopZero" value="False" time="0"/>
|
|
<Property name="PROP_PAR_parPathBased" value="On" time="0"/>
|
|
<Property name="PROP_POSTSYN_CmdLineArgs" value="" time="0"/>
|
|
<Property name="PROP_POSTSYN_ExtModuleFiles" value="" time="0"/>
|
|
<Property name="PROP_POSTSYN_IgnoreSDCErr" value="False" time="0"/>
|
|
<Property name="PROP_SYNSTA_AnalysisOption" value="Standard Setup and Hold Analysis" time="0"/>
|
|
<Property name="PROP_SYNSTA_CmdLineArgs" value="" time="0"/>
|
|
<Property name="PROP_SYNSTA_EndPtNumber" value="10" time="0"/>
|
|
<Property name="PROP_SYNSTA_NPerEnd" value="1" time="0"/>
|
|
<Property name="PROP_SYNSTA_NumPathsPerClock" value="10" time="0"/>
|
|
<Property name="PROP_SYNSTA_ReportFormat" value="Lattice Standard" time="0"/>
|
|
<Property name="PROP_SYNSTA_UnconstrainedPathsNumber" value="10" time="0"/>
|
|
<Property name="PROP_SYN_ClockConversion" value="False" time="0"/>
|
|
<Property name="PROP_SYN_CmdLineArgs" value="" time="0"/>
|
|
<Property name="PROP_SYN_EdfAllowDUPMod" value="False" time="0"/>
|
|
<Property name="PROP_SYN_EdfArea" value="False" time="0"/>
|
|
<Property name="PROP_SYN_EdfArrangeVHDLFiles" value="True" time="0"/>
|
|
<Property name="PROP_SYN_EdfDefEnumEncode" value="Default" time="0"/>
|
|
<Property name="PROP_SYN_EdfFanout" value="1000" time="0"/>
|
|
<Property name="PROP_SYN_EdfFrequency" value="200" time="0"/>
|
|
<Property name="PROP_SYN_EdfInsertIO" value="False" time="0"/>
|
|
<Property name="PROP_SYN_EdfNumCritPath" value="" time="0"/>
|
|
<Property name="PROP_SYN_EdfNumStartEnd" value="" time="0"/>
|
|
<Property name="PROP_SYN_EdfOutNetForm" value="None" time="0"/>
|
|
<Property name="PROP_SYN_EdfPushTirstates" value="True" time="0"/>
|
|
<Property name="PROP_SYN_EdfResSharing" value="True" time="0"/>
|
|
<Property name="PROP_SYN_EdfRunRetiming" value="Pipelining Only" time="0"/>
|
|
<Property name="PROP_SYN_EdfSymFSM" value="True" time="0"/>
|
|
<Property name="PROP_SYN_EdfUnconsClk" value="False" time="0"/>
|
|
<Property name="PROP_SYN_ExportSetting" value="Yes" time="0"/>
|
|
<Property name="PROP_SYN_FDCFiles" value="" time="0"/>
|
|
<Property name="PROP_SYN_LibPath" value="" time="0"/>
|
|
<Property name="PROP_SYN_RamRWCheck" value="False" time="0"/>
|
|
<Property name="PROP_SYN_ResolvedMixedDrivers" value="False" time="0"/>
|
|
<Property name="PROP_SYN_ResynthesizeAll" value="True" time="0"/>
|
|
<Property name="PROP_SYN_UpdateCompilePtTimData" value="False" time="0"/>
|
|
<Property name="PROP_SYN_VHDL2008" value="False" time="0"/>
|
|
<Property name="PROP_TIM_MaxDelSimDes" value="" time="0"/>
|
|
<Property name="PROP_TIM_MinSpeedGrade" value="False" time="0"/>
|
|
<Property name="PROP_TIM_ModPreSimDes" value="" time="0"/>
|
|
<Property name="PROP_TIM_NegStupHldTim" value="True" time="0"/>
|
|
<Property name="PROP_TIM_TimSimGenPUR" value="True" time="0"/>
|
|
<Property name="PROP_TIM_TimSimGenX" value="False" time="0"/>
|
|
<Property name="PROP_TIM_TimSimHierSep" value="" time="0"/>
|
|
<Property name="PROP_TIM_TrgtSpeedGrade" value="High-Performance_1.2V" time="0"/>
|
|
<Property name="PROP_TMCHK_EnableCheck" value="True" time="0"/>
|
|
</Strategy>
|