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9298939816
Commit Graph

392 Commits

Author SHA1 Message Date
Christophe Riccio
9298939816 length becomes a static function #565 2016-11-01 08:44:14 +01:00
Christophe Riccio
1c85265f97 Added Visual C++ 15 detection, Added Clang 4.0 detection, Refactored GLM_COMPILER_VC values 2016-10-12 21:40:03 +02:00
Christophe Riccio
19a6d64e8c Fixed Visual C++ constexpr build error #555, #556 2016-10-10 22:03:57 +02:00
Christophe Riccio
f5f8620056 Added pure test 2016-09-25 10:29:08 +02:00
Christophe Riccio
b719a9f6cc Added test for GCC 2016-09-18 19:30:51 +02:00
Christophe Riccio
8c960dc647 Alignof is a C++11 feature 2016-09-18 19:30:30 +02:00
Christophe Riccio
d8e30c5fde Improved core_type_aligned test 2016-09-18 19:30:14 +02:00
Christophe Riccio
24532ecbf1 Added aligned storage tests #548 2016-09-18 19:30:00 +02:00
Christophe Riccio
a609a0fea6 - Added more information to build messages 2016-09-02 00:30:37 +02:00
Christophe Riccio
10dc67e2b5 - Added GLM_FORCE_UNRESTRICTED_GENTYPE allowing non basic genType #543 2016-09-01 23:32:12 +02:00
Christophe Riccio
f71171d49b Fixed 32-bits build #528 #529, fixed VC 32 bits crash 2016-08-07 12:43:38 +02:00
Christophe Riccio
dc89797275 - Added quaternion version of isnan and isinf #521 2016-07-17 01:02:30 +02:00
Christophe Riccio
6271aa1530 Merged 0.9.7 branch, Factorized GLM_COMPILER_LLVM and GLM_COMPILER_APPLE_CLANG into GLM_COMPILER_CLANG 2016-07-16 00:54:05 +02:00
Christophe Riccio
76fce77337 - Updated list of compiler versions detected 2016-07-15 23:49:20 +02:00
Christophe Riccio
6e9b524be1 Fixed matrix functions using SIMD code on unaligned types #518 2016-07-14 15:21:45 +02:00
Christophe Riccio
0e1e181484 Clean up 2016-06-10 23:14:17 +02:00
Christophe Riccio
fd4ada5843 Support aligned *vec* even when SIMD isn't enabled 2016-06-02 00:33:55 +02:00
Christophe Riccio
41984e42ab Added GTC_type_aligned with aligned *vec* types 2016-06-01 00:43:35 +02:00
Christophe Riccio
688756b3e2 SIMD matrix functions optimizations 2016-05-30 18:01:06 +02:00
Christophe Riccio
52f8ecd973 Added AVX optimizations and equal tests 2016-05-30 14:23:58 +02:00
Christophe Riccio
9ed2a9601b Adde vec4 swizzle operators SIMD optimizations 2016-05-30 02:00:32 +02:00
Christophe Riccio
b9199a2c1a Refactoring of swizzle operators, preparing for vec4 swizzle SIMD optimizations 2016-05-30 01:39:16 +02:00
Christophe Riccio
28cb770d14 SIMD common functions optimizations 2016-05-29 19:14:39 +02:00
Christophe Riccio
42d86b8955 Fixed exponential low level API 2016-05-29 03:14:19 +02:00
Christophe Riccio
20cf68679c SIMD sqrt optimizations including lowp 2016-05-29 02:57:53 +02:00
Christophe Riccio
7fe2f5fe65 Renamed instruction set flags 2016-05-28 19:26:59 +02:00
Christophe Riccio
d33e3df02a Fixed SIMD code path selection 2016-05-28 18:24:39 +02:00
Christophe Riccio
ab159770b3 mad optimizations, fixed build 2016-05-28 17:12:48 +02:00
Christophe Riccio
fdec412ff7 Added FMA SIMD optimization 2016-05-28 12:31:43 +02:00
Christophe Riccio
a9fefc7300 Added vec4 SIMD contructor specialization 2016-05-28 01:33:29 +02:00
Christophe Riccio
f577611328 Added bitwise inverse SIMD optimization. Factorized bitwise optimization code 2016-05-27 23:03:38 +02:00
Christophe Riccio
4797ea9540 Added specialized SSE2 and AVX bool mix 2016-05-26 02:47:43 +02:00
Christophe Riccio
72c741d8ea Fixed sign with signed integer function on non-x86 architecture 2016-05-24 13:29:18 +02:00
Christophe Riccio
757fe39587 Removed simd precision qualifier. All precision qualifiers may generate SIMD instructions, precision may affect the generated instructions accordingly 2016-05-22 17:12:32 +02:00
Christophe Riccio
93612791cd Removed Apple specific check for LLVM versions 2016-05-04 18:46:59 +02:00
Christophe Riccio
affd5f3ba0 Fixed CUDA compiler error in type_vec4.inl #504 2016-05-04 16:35:57 +02:00
Christophe Riccio
1f71f6fb3a Improved SIMD and swizzle operators interactions with GCC and Clang, Added raw SIMD API. 2016-05-03 23:57:41 +02:00
Christophe Riccio
be8d6c9ccc Fixed test 2016-05-01 01:40:06 +02:00
Christophe Riccio
fa6f5cdcbb Fixed warning 2016-05-01 01:35:54 +02:00
Christophe Riccio
2f9fc55d88 More experiments to improve SIMD support 2016-05-01 01:12:22 +02:00
Christophe Riccio
234d7d4ba9 Simplify code removing GLM_FORCE_SIZE_FUNC, GLM_META_PROG_HELPERS, GLM_STATIC_CONST_MEMBERS and 'type' type trait. Added experiments for GTX_type_trait 2016-03-13 12:56:26 +01:00
Christophe Riccio
c853df1638 Added uround to GTC_integer, fast round on positive values 2016-03-10 21:17:46 +01:00
Paul Konstantin Gerke
239cf70ade Fixed: outerProduct was defined incorrectly for unmatched vecX types. E.g. outerProduct(vec2, vec4) did not succeed because the matrix return types were wrong. The computing function seemed fine. I used https://en.wikipedia.org/wiki/Outer_product as reference on what the number of columns/rows ''should'' be and fixed it so that it matches the description from wikipedia 
Added: tests for outerProduct with unmatched vector dimensions (actually testing all combinations now)
 2016-03-05 23:51:20 +01:00
Angelica Wrangler
72a8ba473d Merge pull request #475 from MrApplejuice/master 
Fixed: outerProduct defintions and operator signatures for mat2x4 and vec4 #475
 2016-03-05 23:18:21 +01:00
Joonas Sarajärvi
bc09ecf898 setup: detect GCC 6.0 2016-02-15 20:27:10 +01:00
Joonas Sarajärvi
f0acbbd4ac setup: detect GCC 6.0 2016-02-04 19:42:25 +02:00
Paul Konstantin Gerke
fb309e0eff Fixed: outerProduct was defined incorrectly for unmatched vecX types. E.g. outerProduct(vec2, vec4) did not succeed because the matrix return types were wrong. The computing function seemed fine. I used https://en.wikipedia.org/wiki/Outer_product as reference on what the number of columns/rows ''should'' be and fixed it so that it matches the description from wikipedia 
Added: tests for outerProduct with unmatched vector dimensions (actually testing all combinations now)
 2016-01-24 21:14:25 +01:00
humbletim
5d46e5186d remove extraneous test block 2016-01-03 18:30:29 +01:00
Adrian Krupa
c9400562ec Fixed build 2016-01-03 18:25:45 +01:00
humbletim
52c9f124e3 Fixed ldexp and frexp compilation errors 2016-01-03 18:20:13 +01:00