63 lines
2.5 KiB
Plaintext
63 lines
2.5 KiB
Plaintext
#once
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#subruledef operand
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{
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#{immediate: i5} => 0b000 @ immediate
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r{register: u5} => 0b001 @ register
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[r{register: u5}++] => 0b010 @ register
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[r{register: u5}--] => 0b011 @ register
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[r{register: u5}] => 0b100 @ register
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[r{register: u5} + {offset: u2}] => 0b1 @ offset @ register
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}
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#subruledef crflags
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{
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. => 0b0000
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.l => 0b0010
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.le => 0b0100
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.e => 0b0110
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.ge => 0b1000
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.g => 0b1010
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.ne => 0b1100
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.r => 0b0001
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.rl => 0b0011
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.rle => 0b0101
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.re => 0b0111
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.rge => 0b1001
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.re => 0b1011
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.rne => 0b1101
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}
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#ruledef
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{
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CNST{flags: crflags} {dst: operand}, #{imm: i16} => imm @ flags @ 0b0000 @ dst
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CMPR{flags: crflags} {dst: operand}, {a: operand} => 0x00 @ a @ flags @ 0b0001 @ dst
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BWNG{flags: crflags} {dst: operand}, {a: operand} => 0x01 @ a @ flags @ 0b0001 @ dst
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ARNG{flags: crflags} {dst: operand}, {a: operand} => 0x02 @ a @ flags @ 0b0001 @ dst
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LONG{flags: crflags} {dst: operand}, {a: operand} => 0x03 @ a @ flags @ 0b0001 @ dst
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BWOR{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b0010 @ dst
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BAND{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b0011 @ dst
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BXOR{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b0100 @ dst
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URSH{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b0101 @ dst
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SRSH{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b0110 @ dst
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ZLSH{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b0111 @ dst
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CLSH{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b1000 @ dst
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ADDI{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b1001 @ dst
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SUBT{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b1010 @ dst
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MULL{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b1011 @ dst
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MULS{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b1100 @ dst
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MULU{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b1101 @ dst
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DIVI{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b1110 @ dst
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MODU{flags: crflags} {dst: operand}, {a: operand}, {b: operand} => b @ a @ flags @ 0b1111 @ dst
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}
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#bankdef mem
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{
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#bits 16
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#addr 0
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#size 0x10000
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#outp 0
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}
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#bank mem
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