[RISCV] Mark More Relocs as Relaxable (#151422)
Since this code was last reviewed, more relaxations have been added to the psABI for existing standard relocations that LLVM didn't have marked as relaxable. This change ensures that LLVM marks the following relocations (and their respective fixups) as relaxable: - `R_RISCV_JAL` - `R_RISCV_GOT_HI20` - `R_RISCV_TPREL_HI20` - `R_RISCV_TLSDESC_HI20` This also updates the linker relaxation test to use `-NEXT` to check all the output lines. There are lots more emitted relocations, not only due to JAL being relaxable, but branches are now also marked linker relaxable because they can be turned into `b<cc>; jal` during assembly relaxation, which may also be marked relaxable.
This commit is contained in:
Sam Elliott
GitHub
parent
f4a7f70717
commit
4e3699b4c6
@ -12,7 +12,7 @@ _start:
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// BOLT removes this nop so the label difference is initially 8 but should be
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// 4 after BOLT processes it.
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nop
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beq x0, x0, _test_end
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li x0, _test_end-.
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_test_end:
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ret
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.size _start, .-_start
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@ -823,9 +823,10 @@ static bool relaxableFixupNeedsRelocation(const MCFixupKind Kind) {
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default:
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break;
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case RISCV::fixup_riscv_rvc_jump:
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case RISCV::fixup_riscv_branch:
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case RISCV::fixup_riscv_rvc_branch:
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case RISCV::fixup_riscv_qc_e_branch:
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case RISCV::fixup_riscv_rvc_imm:
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case RISCV::fixup_riscv_jal:
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return false;
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}
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return true;
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@ -344,8 +344,11 @@ void RISCVMCCodeEmitter::expandLongCondBr(const MCInst &MI,
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// Drop any fixup added so we can add the correct one.
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Fixups.resize(FixupStartIndex);
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if (SrcSymbol.isExpr())
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if (SrcSymbol.isExpr()) {
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addFixup(Fixups, Offset, SrcSymbol.getExpr(), RISCV::fixup_riscv_jal);
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if (STI.hasFeature(RISCV::FeatureRelax))
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Fixups.back().setLinkerRelaxable();
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}
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}
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// Expand PseudoLongQC_(E_)Bxxx to an inverted conditional branch and an
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@ -392,8 +395,11 @@ void RISCVMCCodeEmitter::expandQCLongCondBrImm(const MCInst &MI,
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support::endian::write(CB, JBinary, llvm::endianness::little);
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// Drop any fixup added so we can add the correct one.
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Fixups.resize(FixupStartIndex);
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if (SrcSymbol.isExpr())
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if (SrcSymbol.isExpr()) {
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addFixup(Fixups, Offset, SrcSymbol.getExpr(), RISCV::fixup_riscv_jal);
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if (STI.hasFeature(RISCV::FeatureRelax))
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Fixups.back().setLinkerRelaxable();
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}
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}
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void RISCVMCCodeEmitter::encodeInstruction(const MCInst &MI,
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@ -602,8 +608,8 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
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// The actual emission of `R_RISCV_RELAX` will be handled in
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// `RISCVAsmBackend::applyFixup`.
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bool RelaxCandidate = false;
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auto AsmRelaxToLinkerRelaxableWithFeature = [&](unsigned Feature) -> void {
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if (!STI.hasFeature(RISCV::FeatureExactAssembly) && STI.hasFeature(Feature))
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auto AsmRelaxToLinkerRelaxable = [&]() -> void {
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if (!STI.hasFeature(RISCV::FeatureExactAssembly))
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RelaxCandidate = true;
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};
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@ -658,9 +664,6 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
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llvm_unreachable("VK_TPREL_LO used with unexpected instruction format");
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RelaxCandidate = true;
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break;
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case ELF::R_RISCV_TPREL_HI20:
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RelaxCandidate = true;
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break;
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case ELF::R_RISCV_CALL_PLT:
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FixupKind = RISCV::fixup_riscv_call_plt;
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RelaxCandidate = true;
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@ -669,32 +672,40 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
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FixupKind = RISCV::fixup_riscv_qc_abs20_u;
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RelaxCandidate = true;
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break;
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case ELF::R_RISCV_GOT_HI20:
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case ELF::R_RISCV_TPREL_HI20:
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case ELF::R_RISCV_TLSDESC_HI20:
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RelaxCandidate = true;
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break;
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}
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} else if (Kind == MCExpr::SymbolRef || Kind == MCExpr::Binary) {
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// FIXME: Sub kind binary exprs have chance of underflow.
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if (MIFrm == RISCVII::InstFormatJ) {
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FixupKind = RISCV::fixup_riscv_jal;
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AsmRelaxToLinkerRelaxableWithFeature(RISCV::FeatureVendorXqcilb);
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RelaxCandidate = true;
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} else if (MIFrm == RISCVII::InstFormatB) {
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FixupKind = RISCV::fixup_riscv_branch;
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// This might be assembler relaxed to `b<cc>; jal` but we cannot relax
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// the `jal` again in the assembler.
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// Relaxes to B<cc>; JAL, with fixup_riscv_jal
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AsmRelaxToLinkerRelaxable();
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} else if (MIFrm == RISCVII::InstFormatCJ) {
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FixupKind = RISCV::fixup_riscv_rvc_jump;
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AsmRelaxToLinkerRelaxableWithFeature(RISCV::FeatureVendorXqcilb);
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// Relaxes to JAL with fixup_riscv_jal
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AsmRelaxToLinkerRelaxable();
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} else if (MIFrm == RISCVII::InstFormatCB) {
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FixupKind = RISCV::fixup_riscv_rvc_branch;
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// This might be assembler relaxed to `b<cc>; jal` but we cannot relax
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// the `jal` again in the assembler.
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// Relaxes to B<cc>; JAL, with fixup_riscv_jal
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AsmRelaxToLinkerRelaxable();
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} else if (MIFrm == RISCVII::InstFormatCI) {
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FixupKind = RISCV::fixup_riscv_rvc_imm;
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AsmRelaxToLinkerRelaxableWithFeature(RISCV::FeatureVendorXqcili);
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// Relaxes to `QC.E.LI` with fixup_riscv_qc_e_32
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if (STI.hasFeature(RISCV::FeatureVendorXqcili))
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AsmRelaxToLinkerRelaxable();
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} else if (MIFrm == RISCVII::InstFormatI) {
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FixupKind = RISCV::fixup_riscv_12_i;
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} else if (MIFrm == RISCVII::InstFormatQC_EB) {
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FixupKind = RISCV::fixup_riscv_qc_e_branch;
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// This might be assembler relaxed to `qc.e.b<cc>; jal` but we cannot
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// relax the `jal` again in the assembler.
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// Relaxes to QC.E.B<cc>I; JAL, with fixup_riscv_jal
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AsmRelaxToLinkerRelaxable();
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} else if (MIFrm == RISCVII::InstFormatQC_EAI) {
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FixupKind = RISCV::fixup_riscv_qc_e_32;
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RelaxCandidate = true;
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@ -1,32 +1,44 @@
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;; With +relax, J below needs a relocation to ensure the target is correct
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;; after linker relaxation. See https://github.com/ClangBuiltLinux/linux/issues/1965
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; RUN: llc -mtriple=riscv64 -mattr=-relax -filetype=obj < %s \
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; RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefixes=CHECK,NORELAX
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; RUN: llc -mtriple=riscv64 -mattr=+relax -filetype=obj < %s \
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; RUN: | llvm-objdump -d -r - | FileCheck %s --check-prefixes=CHECK,RELAX
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;; With +relax, All `j` instructions below need a relocation to ensure the target is correct
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;; after linker relaxation. See https://github.com/ClangBuiltLinux/linux/issues/1965
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; CHECK: j {{.*}}
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; RELAX-NEXT: R_RISCV_JAL {{.*}}
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; RELAX-NOT: R_RISCV_RELAX
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; CHECK-NEXT: auipc ra, 0x0
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; CHECK-NEXT: R_RISCV_CALL_PLT f
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; RELAX-NEXT: R_RISCV_RELAX *ABS*
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; CHECK-NEXT: jalr ra
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; CHECK-NEXT: j {{.*}}
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; RELAX-NEXT: R_RISCV_JAL {{.*}}
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; RELAX-NOT: R_RISCV_RELAX
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; CHECK-NEXT: j {{.*}}
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; RELAX-NEXT: R_RISCV_JAL .L0
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; RELAX-NEXT: R_RISCV_JAL {{.*}}
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; RELAX-NEXT: R_RISCV_RELAX *ABS*
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; NORELAX-NEXT: li a0, 0x0
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; RELAX-EMPTY:
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define dso_local noundef signext i32 @main() local_unnamed_addr #0 {
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entry:
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callbr void asm sideeffect ".option push\0A.option norelax\0Aj $0\0A.option pop\0A", "!i"()
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to label %asm.fallthrough [label %label]
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callbr void asm sideeffect "
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.option push
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.option norelax
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j $0
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.option pop",
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"!i"() to label %asm.fallthrough [label %label]
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asm.fallthrough: ; preds = %entry
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tail call void @f()
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callbr void asm sideeffect ".option push\0A.option norelax\0Aj $0\0A.option pop\0A", "!i"()
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to label %asm.fallthrough [label %label]
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callbr void asm sideeffect "
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.option push
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.option norelax
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j $0
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.option pop",
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"!i"() to label %asm.fallthrough [label %label]
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br label %label
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label: ; preds = %asm.fallthrough, %entry
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@ -10,10 +10,13 @@
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## This is linker-relaxable to avoid resolving the following fixups
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call relax
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# CHECK-RELOC: R_RISCV_CALL_PLT
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# CHECK-RELOC-NEXT: R_RISCV_RELAX
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jal zero, .LBB0+16
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# CHECK-INSTR: jal zero, 0x10
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# CHECK-RELOC: R_RISCV_JAL
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# CHECK-RELOC-NEXT: R_RISCV_JAL
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# CHECK-RELOC-NEXT: R_RISCV_RELAX
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beq a0, a1, .LBB1+32
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# CHECK-INSTR: beq a0, a1, 0x20
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@ -24,11 +27,12 @@ c.j .+32
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c.j .LBB2+4
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# CHECK-INSTR: c.j 0x22
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# CHECK-RELOC-NEXT: R_RISCV_RVC_JUMP
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# CHECK-RELOC-NEXT: R_RISCV_RVC_JUMP
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c.beqz a0, .-2
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# CHECK-INSTR: c.beqz a0, 0x12
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call relax
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# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT
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# CHECK-RELOC-NEXT: R_RISCV_CALL_PLT
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# CHECK-RELOC-NEXT: R_RISCV_RELAX
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.LBB2:
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@ -2,19 +2,25 @@
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# RUN: | FileCheck -check-prefix=INSTR %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=RELOC-RELAX %s
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# Check prefixes:
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# RELOC - Check the relocation in the object.
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# RELOC-RELAX - Check the relocation in the object with relaxations
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# INSTR - Check the instruction is handled properly by the ASMPrinter
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.long foo
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# RELOC: R_RISCV_32 foo
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# RELOC-RELAX: R_RISCV_32 foo
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.quad foo
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# RELOC: R_RISCV_64 foo
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# RELOC-RELAX: R_RISCV_64 foo
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lui t1, %hi(foo)
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# RELOC: R_RISCV_HI20 foo 0x0
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# RELOC
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# INSTR: lui t1, %hi(foo)
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lui t1, %hi(foo+4)
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@ -137,8 +137,14 @@ data2:
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add a0, a0, a1
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## Branches crossing the linker-relaxable R_RISCV_ALIGN need relocations.
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# RELAX-RELOC-NOT: .rela.text3 {
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# C-OR-ZCA-EXT-RELAX-RELOC-NOT: .rela.text3 {
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# RELAX-RELOC: .rela.text3 {
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# RELAX-RELOC-NEXT: 0x0 R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x6
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# RELAX-RELOC-NEXT: 0xE R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x12 R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: }
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# C-OR-ZCA-EXT-RELAX-RELOC: .rela.text3 {
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.section .text3, "ax"
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bnez t1, 1f
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bnez t2, 2f
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@ -153,9 +159,11 @@ data2:
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# RELAX-RELOC: .rela.text3a {
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# RELAX-RELOC-NEXT: 0x0 R_RISCV_CALL_PLT foo 0x0
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# RELAX-RELOC-NEXT: 0x0 R_RISCV_RELAX - 0x0
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# RELAX-RELOC-NEXT: 0x8 R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0xC R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x10 R_RISCV_ALIGN - 0x6
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# RELAX-RELOC-NEXT: 0x16 R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x1A R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: }
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# C-OR-ZCA-EXT-NORELAX-RELOC: .rela.text3a
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# C-OR-ZCA-EXT-RELAX-RELOC: .rela.text3a
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@ -171,8 +179,13 @@ bnez t1, 2b
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## .text3 with a call at the end
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# RELAX-RELOC: .rela.text3b {
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# RELAX-RELOC-NEXT: 0x10 R_RISCV_CALL_PLT foo 0x0
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# RELAX-RELOC-NEXT: 0x10 R_RISCV_RELAX - 0x0
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# RELAX-RELOC-NEXT: 0x0 R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x4 R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x8 R_RISCV_ALIGN - 0x6
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# RELAX-RELOC-NEXT: 0xE R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x12 R_RISCV_BRANCH .Ltmp[[#]] 0x0
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# RELAX-RELOC-NEXT: 0x16 R_RISCV_CALL_PLT foo 0x0
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# RELAX-RELOC-NEXT: 0x16 R_RISCV_RELAX - 0x0
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# RELAX-RELOC-NEXT: }
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.section .text3b, "ax"
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bnez t1, 1f
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@ -3,7 +3,7 @@
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c < %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax < %s \
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
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# RUN: | llvm-readobj -r - | FileCheck -check-prefixes=RELOC,RELAX %s
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# Check prefixes:
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# RELOC - Check the relocation in the object.
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@ -11,10 +11,12 @@
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c.jal foo
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# A compressed jump (c.j) to an unresolved symbol will be relaxed to a (jal).
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# RELOC: R_RISCV_JAL
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# RELAX-NEXT: R_RISCV_RELAX
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# INSTR: c.jal foo
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c.bnez a0, foo
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# A compressed branch (c.bnez) to an unresolved symbol will be relaxed to a (bnez).
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# The (bnez) to an unresolved symbol will in turn be relaxed to (beqz; jal)
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# RELOC-NEXT: R_RISCV_JAL
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# RELAX-NEXT: R_RISCV_RELAX
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# INSTR: c.bnez a0, foo
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@ -8,49 +8,57 @@
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# RUN: | llvm-readobj -r - | FileCheck -check-prefix=NORELAX-RELOC %s
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.long foo
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# NORELAX-RELOC: R_RISCV_32 foo 0x0
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# RELAX-RELOC: R_RISCV_32 foo 0x0
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call foo
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# NORELAX-RELOC: R_RISCV_CALL_PLT foo 0x0
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# NORELAX-RELOC-NEXT: R_RISCV_CALL_PLT foo 0x0
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# NORELAX-RELOC-NOT: R_RISCV_RELAX
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# RELAX-RELOC: R_RISCV_CALL_PLT foo 0x0
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# RELAX-RELOC: R_RISCV_RELAX - 0x0
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# RELAX-RELOC-NEXT: R_RISCV_CALL_PLT foo 0x0
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# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
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jal foo
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# NORELAX-RELOC-NEXT: R_RISCV_JAL foo 0x0
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# NORELAX-RELOC-NOT: R_RISCV_RELAX
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# RELAX-RELOC-NEXT: R_RISCV_JAL foo 0x0
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# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
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lui t1, %hi(foo)
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# NORELAX-RELOC: R_RISCV_HI20 foo 0x0
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# NORELAX-RELOC-NEXT: R_RISCV_HI20 foo 0x0
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# NORELAX-RELOC-NOT: R_RISCV_RELAX
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# RELAX-RELOC: R_RISCV_HI20 foo 0x0
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# RELAX-RELOC: R_RISCV_RELAX - 0x0
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# RELAX-RELOC-NEXT: R_RISCV_HI20 foo 0x0
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# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
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addi t1, t1, %lo(foo)
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# NORELAX-RELOC: R_RISCV_LO12_I foo 0x0
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# NORELAX-RELOC-NEXT: R_RISCV_LO12_I foo 0x0
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# NORELAX-RELOC-NOT: R_RISCV_RELAX
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# RELAX-RELOC: R_RISCV_LO12_I foo 0x0
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# RELAX-RELOC: R_RISCV_RELAX - 0x0
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# RELAX-RELOC-NEXT: R_RISCV_LO12_I foo 0x0
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# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
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sb t1, %lo(foo)(a2)
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# NORELAX-RELOC: R_RISCV_LO12_S foo 0x0
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# NORELAX-RELOC-NEXT: R_RISCV_LO12_S foo 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_LO12_S foo 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_LO12_S foo 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
1:
|
||||
auipc t1, %pcrel_hi(foo)
|
||||
# NORELAX-RELOC: R_RISCV_PCREL_HI20 foo 0x0
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_PCREL_HI20 foo 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_PCREL_HI20 foo 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_PCREL_HI20 foo 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
addi t1, t1, %pcrel_lo(1b)
|
||||
# NORELAX-RELOC: R_RISCV_PCREL_LO12_I .Ltmp0 0x0
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_PCREL_LO12_I .Ltmp0 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_PCREL_LO12_I .Ltmp0 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_PCREL_LO12_I .Ltmp0 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
sb t1, %pcrel_lo(1b)(a2)
|
||||
# NORELAX-RELOC: R_RISCV_PCREL_LO12_S .Ltmp0 0x0
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_PCREL_LO12_S .Ltmp0 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_PCREL_LO12_S .Ltmp0 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_PCREL_LO12_S .Ltmp0 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
|
||||
# Check behaviour when a locally defined symbol is referenced.
|
||||
@ -63,64 +71,88 @@ call bar
|
||||
# NORELAX-RELOC-NOT: R_RISCV_CALL
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC-NEXT: R_RISCV_CALL_PLT bar 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
jal bar
|
||||
# NORELAX-RELOC-NOT: R_RISCV_JAL
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC-NEXT: R_RISCV_JAL bar 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
beq s1, s1, bar
|
||||
# NORELAX-RELOC-NOT: R_RISCV_BRANCH
|
||||
# RELAX-RELOC-NEXT: R_RISCV_BRANCH bar 0x0
|
||||
|
||||
lui t1, %hi(bar)
|
||||
# NORELAX-RELOC: R_RISCV_HI20 bar 0x0
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_HI20 bar 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_HI20 bar 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_HI20 bar 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
addi t1, t1, %lo(bar)
|
||||
# NORELAX-RELOC: R_RISCV_LO12_I bar 0x0
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_LO12_I bar 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_LO12_I bar 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_LO12_I bar 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
sb t1, %lo(bar)(a2)
|
||||
# NORELAX-RELOC: R_RISCV_LO12_S bar 0x0
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_LO12_S bar 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_LO12_S bar 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_LO12_S bar 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
2:
|
||||
auipc t1, %pcrel_hi(bar)
|
||||
# NORELAX-RELOC-NOT: R_RISCV_PCREL_HI20
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_PCREL_HI20 bar 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_PCREL_HI20 bar 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
addi t1, t1, %pcrel_lo(2b)
|
||||
# NORELAX-RELOC-NOT: R_RISCV_PCREL_LO12_I
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_PCREL_LO12_I .Ltmp1 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_PCREL_LO12_I .Ltmp1 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
sb t1, %pcrel_lo(2b)(a2)
|
||||
# NORELAX-RELOC-NOT: R_RISCV_PCREL_LO12_S
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC: R_RISCV_PCREL_LO12_S .Ltmp1 0x0
|
||||
# RELAX-RELOC: R_RISCV_RELAX - 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_PCREL_LO12_S .Ltmp1 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
auipc t1, %got_pcrel_hi(bar)
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_GOT_HI20 bar 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC-NEXT: R_RISCV_GOT_HI20 bar 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
lui t1, %tprel_hi(baz)
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_TPREL_HI20 baz 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC-NEXT: R_RISCV_TPREL_HI20 baz 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
auipc t1, %tlsdesc_hi(baz)
|
||||
# NORELAX-RELOC-NEXT: R_RISCV_TLSDESC_HI20 baz 0x0
|
||||
# NORELAX-RELOC-NOT: R_RISCV_RELAX
|
||||
# RELAX-RELOC-NEXT: R_RISCV_TLSDESC_HI20 baz 0x0
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
## %hi/%lo on an absolute symbol (not yet defined) leads to relocations when relaxation is enabled.
|
||||
lui t2, %hi(abs)
|
||||
# NORELAX-RELOC-NOT: R_RISCV_
|
||||
# RELAX-RELOC: R_RISCV_HI20 - 0x12345
|
||||
# RELAX-RELOC-NEXT: R_RISCV_HI20 - 0x12345
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
addi t2, t2, %lo(abs)
|
||||
# NORELAX-RELOC-NOT: R_RISCV_
|
||||
# RELAX-RELOC: R_RISCV_LO12_I - 0x12345
|
||||
# RELAX-RELOC-NEXT: R_RISCV_LO12_I - 0x12345
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
.set abs, 0x12345
|
||||
|
||||
lui t3, %hi(abs)
|
||||
# RELAX-RELOC: R_RISCV_HI20 - 0x12345
|
||||
# RELAX-RELOC-NEXT: R_RISCV_HI20 - 0x12345
|
||||
# RELAX-RELOC-NEXT: R_RISCV_RELAX - 0x0
|
||||
|
||||
# Check that a relocation is not emitted for a symbol difference which has
|
||||
|
||||
@ -1,8 +1,8 @@
|
||||
# RUN: llvm-mc -filetype=obj -triple=riscv64 %s \
|
||||
# RUN: | llvm-objdump -d -M no-aliases - \
|
||||
# RUN: | llvm-objdump -dr -M no-aliases - \
|
||||
# RUN: | FileCheck --check-prefix=CHECK-INST %s
|
||||
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+c %s \
|
||||
# RUN: | llvm-objdump -d -M no-aliases - \
|
||||
# RUN: | llvm-objdump -dr -M no-aliases - \
|
||||
# RUN: | FileCheck --check-prefix=CHECK-INST-C %s
|
||||
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+relax %s \
|
||||
# RUN: | llvm-objdump -dr -M no-aliases - \
|
||||
@ -21,9 +21,11 @@ test:
|
||||
# CHECK-INST-RELAX: beq a0, a1, 0x8
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L1
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: beq a0, a1, 0x8
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L1
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
bne a0, a1, .L1
|
||||
call relax
|
||||
.fill 1300-2, 4, 0
|
||||
@ -35,8 +37,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0x28b2
|
||||
# CHECK-INST-RELAX: bne a0, a1, 0x1464
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L2
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: bne a0, a1, 0x1462
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L2
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
beq a0, a1, .L2
|
||||
.fill 1300, 4, 0
|
||||
.L2:
|
||||
@ -47,8 +53,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0x3d0c
|
||||
# CHECK-INST-RELAX: bge a0, a1, 0x28c0
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L3
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: bge a0, a1, 0x28bc
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L3
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
blt a0, a1, .L3
|
||||
.fill 1300, 4, 0
|
||||
.L3:
|
||||
@ -59,8 +69,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0x5166
|
||||
# CHECK-INST-RELAX: blt a0, a1, 0x3d1c
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L4
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: blt a0, a1, 0x3d16
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L4
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
bge a0, a1, .L4
|
||||
.fill 1300, 4, 0
|
||||
.L4:
|
||||
@ -71,8 +85,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0x65c0
|
||||
# CHECK-INST-RELAX: bgeu a0, a1, 0x5178
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L5
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: bgeu a0, a1, 0x5170
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L5
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
bltu a0, a1, .L5
|
||||
.fill 1300, 4, 0
|
||||
.L5:
|
||||
@ -83,8 +101,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0x7a1a
|
||||
# CHECK-INST-RELAX: bltu a0, a1, 0x65d4
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L6
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: bltu a0, a1, 0x65ca
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L6
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
bgeu a0, a1, .L6
|
||||
.fill 1300, 4, 0
|
||||
.L6:
|
||||
@ -95,8 +117,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0x8e72
|
||||
# CHECK-INST-RELAX: bne a0, zero, 0x7a30
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L7
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: c.bnez a0, 0x7a22
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L7
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
beqz a0, .L7
|
||||
.fill 1300, 4, 0
|
||||
.L7:
|
||||
@ -107,8 +133,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0xa2ca
|
||||
# CHECK-INST-RELAX: bne zero, a0, 0x8e8c
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L8
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: c.bnez a0, 0x8e7a
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L8
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
beq x0, a0, .L8
|
||||
.fill 1300, 4, 0
|
||||
.L8:
|
||||
@ -119,8 +149,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0xb722
|
||||
# CHECK-INST-RELAX: beq a0, zero, 0xa2e8
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L9
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: c.beqz a0, 0xa2d2
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L9
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
bnez a0, .L9
|
||||
.fill 1300, 4, 0
|
||||
.L9:
|
||||
@ -131,8 +165,12 @@ test:
|
||||
# CHECK-INST-C-NEXT: jal zero, 0xcb7c
|
||||
# CHECK-INST-RELAX: beq a6, zero, 0xb744
|
||||
# CHECK-INST-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-RELAX-NEXT: R_RISCV_JAL .L10
|
||||
# CHECK_INST-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
# CHECK-INST-C-RELAX: beq a6, zero, 0xb72c
|
||||
# CHECK-INST-C-RELAX-NEXT: jal zero, {{.*}}
|
||||
# CHECK-INST-C-RELAX-NEXT: R_RISCV_JAL .L10
|
||||
# CHECK_INST-C-RELAX-NEXT: R_RISCV_RELAX *ABS*
|
||||
bnez x16, .L10
|
||||
.fill 1300, 4, 0
|
||||
.L10:
|
||||
|
||||
@ -39,6 +39,7 @@ call bar
|
||||
|
||||
.dword .L2-.L1
|
||||
# CHECK-RELOC-NEXT: R_RISCV_JAL
|
||||
# CHECK-RELOC-NEXT: R_RISCV_RELAX
|
||||
jal zero, .L1
|
||||
# CHECK-RELOC-NEXT: R_RISCV_BRANCH
|
||||
beq s1, s1, .L1
|
||||
|
||||
@ -1,6 +1,10 @@
|
||||
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s --defsym RV32=1 | llvm-objdump -dr -M no-aliases - | FileCheck %s --check-prefixes=INST,RV32
|
||||
# RUN: llvm-mc -filetype=obj -triple riscv64 < %s | llvm-objdump -dr -M no-aliases - | FileCheck %s --check-prefixes=INST,RV64
|
||||
|
||||
# RUN: llvm-mc -filetype=obj -triple riscv32 < %s --mattr=+relax --defsym RV32=1 | llvm-objdump -dr -M no-aliases - | FileCheck %s --check-prefixes=INST,RELAX,RV32
|
||||
# RUN: llvm-mc -filetype=obj -triple riscv64 < %s --mattr=+relax | llvm-objdump -dr -M no-aliases - | FileCheck %s --check-prefixes=INST,RELAX,RV64
|
||||
|
||||
|
||||
# RUN: not llvm-mc -triple riscv32 < %s --defsym RV32=1 --defsym ERR=1 2>&1 | FileCheck %s --check-prefixes=ERR
|
||||
# RUN: not llvm-mc -triple riscv64 < %s --defsym ERR=1 2>&1 | FileCheck %s --check-prefixes=ERR
|
||||
|
||||
@ -10,9 +14,11 @@ start: # @start
|
||||
auipc a0, %tlsdesc_hi(a-4)
|
||||
# INST: auipc a0, 0x0
|
||||
# INST-NEXT: R_RISCV_TLSDESC_HI20 a-0x4
|
||||
# RELAX-NEXT: R_RISCV_RELAX
|
||||
auipc a0, %tlsdesc_hi(unspecified)
|
||||
# INST-NEXT: auipc a0, 0x0
|
||||
# INST-NEXT: R_RISCV_TLSDESC_HI20 unspecified
|
||||
# RELAX-NEXT: R_RISCV_RELAX
|
||||
.ifdef RV32
|
||||
lw a1, %tlsdesc_load_lo(.Ltlsdesc_hi0)(a0)
|
||||
# RV32: lw a1, 0x0(a0)
|
||||
|
||||
@ -61,9 +61,9 @@ mid_jump_over_fixed:
|
||||
.space 0x1000
|
||||
# CHECK-NEXT: ...
|
||||
j mid_jump_over_fixed
|
||||
# CHECK-NEXT: jal zero, 0x24 <mid_jump_over_fixed>
|
||||
# CHECK-NOT: R_RISCV_JAL
|
||||
# CHECK-NOT: R_RISCV_RELAX
|
||||
# CHECK-NEXT: jal zero, 0x1026 <mid_jump_over_fixed+0x1002>
|
||||
# CHECK-NEXT: R_RISCV_JAL mid_jump_over_fixed
|
||||
# CHECK-NEXT: R_RISCV_RELAX *ABS*
|
||||
ret
|
||||
# CHECK-NEXT: c.jr ra
|
||||
|
||||
@ -79,6 +79,6 @@ mid_jump_over_relaxable:
|
||||
j mid_jump_over_relaxable
|
||||
# CHECK-NEXT: jal zero, 0x2034 <mid_jump_over_relaxable+0x1008>
|
||||
# CHECK-NEXT: R_RISCV_JAL mid_jump_over_relaxable
|
||||
# CHECK-NOT: R_RISCV_RELAX
|
||||
# CHECK-NEXT: R_RISCV_RELAX
|
||||
ret
|
||||
# CHECK-NEXT: c.jr ra
|
||||
|
||||
@ -91,12 +91,14 @@ qc.e.bgeui s2, 24, same_section
|
||||
# OBJ: qc.beqi t1, 0xa, 0x42 <same_section_extern+0x16>
|
||||
# OBJ-NEXT: j 0x3e <same_section_extern+0x12>
|
||||
# OBJ-NEXT: R_RISCV_JAL undef{{$}}
|
||||
# OBJ-NEXT: R_RISCV_RELAX *ABS*{{$}}
|
||||
qc.bnei t1, 10, undef
|
||||
|
||||
# ASM: qc.e.bgeui s0, 40, undef
|
||||
# OBJ-NEXT: qc.e.bltui s0, 0x28, 0x4c <same_section_extern+0x20>
|
||||
# OBJ-NEXT: j 0x48 <same_section_extern+0x1c>
|
||||
# OBJ-NEXT: R_RISCV_JAL undef{{$}}
|
||||
# OBJ-NEXT: R_RISCV_RELAX *ABS*{{$}}
|
||||
qc.e.bgeui s0, 40, undef
|
||||
|
||||
.section .text.second, "ax", @progbits
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user