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TableGen: Emit subtarget generated methods as final (#177781)

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Matt Arsenault 2026-01-24 20:27:29 +01:00 committed by GitHub
parent 2f1b1f3a54
commit 51d58657b8
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GPG Key ID: B5690EEEBB952194
3 changed files with 11 additions and 11 deletions
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2
llvm/test/TableGen/MacroFusion.td
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@ -268,7 +268,7 @@ def TestFirstSameRegFusion: Fusion<"test-first-same-reg-fusion", "HasTestFirstSa
// CHECK-SUBTARGET: { "test-single-fusion", "Test SingleFusion", Test::TestSingleFusion
// Check that we have generated `getMacroFusions()` function.
// CHECK-SUBTARGET: std::vector<MacroFusionPredTy> getMacroFusions() const override;
// CHECK-SUBTARGET: std::vector<MacroFusionPredTy> getMacroFusions() const final;
// CHECK-SUBTARGET: std::vector<MacroFusionPredTy> TestGenSubtargetInfo::getMacroFusions() const {
// CHECK-SUBTARGET-NEXT: std::vector<MacroFusionPredTy> Fusions;

2
llvm/test/TableGen/ResolveSchedClass.td
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@ -80,7 +80,7 @@ def ProcessorA: ProcessorModel<"ProcessorA", SchedModel_A, []>;
// CHECK: unsigned resolveVariantSchedClass(unsigned SchedClass,
// CHECK-NEXT: const MCInst *MI, const MCInstrInfo *MCII,
// CHECK-NEXT: unsigned CPUID) const override {
// CHECK-NEXT: unsigned CPUID) const final {
// CHECK-NEXT: return TestTarget_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);
// CHECK-NEXT: }

18
llvm/utils/TableGen/SubtargetEmitter.cpp
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@ -2009,17 +2009,17 @@ void SubtargetEmitter::emitGenMCSubtargetInfo(raw_ostream &OS) {
<< " WPR, WL, RA, IS, OC, FP) { }\n\n"
<< " unsigned resolveVariantSchedClass(unsigned SchedClass,\n"
<< " const MCInst *MI, const MCInstrInfo *MCII,\n"
<< " unsigned CPUID) const override {\n"
<< " unsigned CPUID) const final {\n"
<< " return " << Target << "_MC"
<< "::resolveVariantSchedClassImpl(SchedClass, MI, MCII, *this, CPUID);\n";
OS << " }\n";
if (TGT.getHwModes().getNumModeIds() > 1) {
OS << " unsigned getHwModeSet() const override;\n";
OS << " unsigned getHwModeSet() const final;\n";
OS << " unsigned getHwMode(enum HwModeType type = HwMode_Default) const "
"override;\n";
"final;\n";
}
if (Target == "AArch64")
OS << " bool isCPUStringValid(StringRef CPU) const override {\n"
OS << " bool isCPUStringValid(StringRef CPU) const final {\n"
<< " CPU = AArch64::resolveCPUAlias(CPU);\n"
<< " return MCSubtargetInfo::isCPUStringValid(CPU);\n"
<< " }\n";
@ -2137,10 +2137,10 @@ void SubtargetEmitter::emitHeader(raw_ostream &OS) {
<< "public:\n"
<< " unsigned resolveSchedClass(unsigned SchedClass, "
<< " const MachineInstr *DefMI,"
<< " const TargetSchedModel *SchedModel) const override;\n"
<< " const TargetSchedModel *SchedModel) const final;\n"
<< " unsigned resolveVariantSchedClass(unsigned SchedClass,"
<< " const MCInst *MI, const MCInstrInfo *MCII,"
<< " unsigned CPUID) const override;\n"
<< " unsigned CPUID) const final;\n"
<< " DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID)"
<< " const;\n";
@ -2163,13 +2163,13 @@ void SubtargetEmitter::emitHeader(raw_ostream &OS) {
}
OS << " };\n";
OS << " unsigned getHwModeSet() const override;\n";
OS << " unsigned getHwModeSet() const final;\n";
OS << " unsigned getHwMode(enum HwModeType type = HwMode_Default) const "
"override;\n";
"final;\n";
}
if (TGT.hasMacroFusion())
OS << " std::vector<MacroFusionPredTy> getMacroFusions() const "
"override;\n";
"final;\n";
STIPredicateExpander PE(Target);
PE.setByRef(false);