[Thumb2] mve-vmovimm.ll - regenerate with missing check prefixes (#183019)
Add prefixes to discriminate between -mattr=+mve and -mattr=+mve.fp to add missing check coverage Fixes update_llc_test_checks warnings and simplifies regeneration for an upcoming patch
This commit is contained in:
Simon Pilgrim
GitHub
parent
9d762ad279
commit
cfaa67bb62
@ -1,7 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKLE
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKLE
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; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKBE
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECKLE,CHECKLE-MVE
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECKLE,CHECKLE-MVEFP
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; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECKBE
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define arm_aapcs_vfpcc <16 x i8> @mov_int8_1() {
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; CHECK-LABEL: mov_int8_1:
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@ -1080,6 +1080,39 @@ entry:
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}
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define arm_aapcs_vfpcc <4 x float> @fadd_float_1(<4 x float> %a) {
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; CHECKLE-MVE-LABEL: fadd_float_1:
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; CHECKLE-MVE: @ %bb.0: @ %entry
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; CHECKLE-MVE-NEXT: .save {r4, lr}
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; CHECKLE-MVE-NEXT: push {r4, lr}
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; CHECKLE-MVE-NEXT: .vsave {d8, d9}
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; CHECKLE-MVE-NEXT: vpush {d8, d9}
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; CHECKLE-MVE-NEXT: vmov q4, q0
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; CHECKLE-MVE-NEXT: mov.w r1, #1065353216
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; CHECKLE-MVE-NEXT: vmov r4, r0, d9
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: vmov s19, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: mov.w r1, #1065353216
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: vmov s18, r0
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; CHECKLE-MVE-NEXT: mov.w r1, #1065353216
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; CHECKLE-MVE-NEXT: vmov r4, r0, d8
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: vmov s17, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: mov.w r1, #1065353216
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: vmov s16, r0
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; CHECKLE-MVE-NEXT: vmov q0, q4
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; CHECKLE-MVE-NEXT: vpop {d8, d9}
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; CHECKLE-MVE-NEXT: pop {r4, pc}
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;
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; CHECKLE-MVEFP-LABEL: fadd_float_1:
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; CHECKLE-MVEFP: @ %bb.0: @ %entry
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; CHECKLE-MVEFP-NEXT: vmov.f32 q1, #1.000000e+00
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; CHECKLE-MVEFP-NEXT: vadd.f32 q0, q0, q1
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; CHECKLE-MVEFP-NEXT: bx lr
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;
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; CHECKBE-LABEL: fadd_float_1:
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; CHECKBE: @ %bb.0: @ %entry
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; CHECKBE-NEXT: vmov.f32 q1, #1.000000e+00
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@ -1104,6 +1137,41 @@ entry:
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}
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define arm_aapcs_vfpcc <4 x float> @fadd_float_m3(<4 x float> %a) {
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; CHECKLE-MVE-LABEL: fadd_float_m3:
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; CHECKLE-MVE: @ %bb.0: @ %entry
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; CHECKLE-MVE-NEXT: .save {r4, r5, r7, lr}
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; CHECKLE-MVE-NEXT: push {r4, r5, r7, lr}
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; CHECKLE-MVE-NEXT: .vsave {d8, d9}
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; CHECKLE-MVE-NEXT: vpush {d8, d9}
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; CHECKLE-MVE-NEXT: vmov q4, q0
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; CHECKLE-MVE-NEXT: movs r5, #0
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; CHECKLE-MVE-NEXT: vmov r4, r0, d9
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; CHECKLE-MVE-NEXT: movt r5, #49216
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; CHECKLE-MVE-NEXT: mov r1, r5
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: vmov s19, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: mov r1, r5
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: vmov s18, r0
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; CHECKLE-MVE-NEXT: mov r1, r5
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; CHECKLE-MVE-NEXT: vmov r4, r0, d8
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: vmov s17, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: mov r1, r5
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: vmov s16, r0
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; CHECKLE-MVE-NEXT: vmov q0, q4
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; CHECKLE-MVE-NEXT: vpop {d8, d9}
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; CHECKLE-MVE-NEXT: pop {r4, r5, r7, pc}
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;
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; CHECKLE-MVEFP-LABEL: fadd_float_m3:
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; CHECKLE-MVEFP: @ %bb.0: @ %entry
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; CHECKLE-MVEFP-NEXT: vmov.f32 q1, #-3.000000e+00
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; CHECKLE-MVEFP-NEXT: vadd.f32 q0, q0, q1
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; CHECKLE-MVEFP-NEXT: bx lr
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;
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; CHECKBE-LABEL: fadd_float_m3:
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; CHECKBE: @ %bb.0: @ %entry
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; CHECKBE-NEXT: vmov.f32 q1, #-3.000000e+00
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@ -1126,6 +1194,104 @@ entry:
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}
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define arm_aapcs_vfpcc <8 x half> @fadd_float16_1(<8 x half> %a) {
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; CHECKLE-MVE-LABEL: fadd_float16_1:
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; CHECKLE-MVE: @ %bb.0: @ %entry
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; CHECKLE-MVE-NEXT: .save {r4, lr}
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; CHECKLE-MVE-NEXT: push {r4, lr}
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; CHECKLE-MVE-NEXT: .vsave {d8, d9, d10, d11, d12, d13}
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; CHECKLE-MVE-NEXT: vpush {d8, d9, d10, d11, d12, d13}
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q0[0]
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; CHECKLE-MVE-NEXT: vmov q4, q0
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: vmov.i16 q6, #0x3c00
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[0]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[0], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[1]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[1]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[1], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[2]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[2]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[2], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[3]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[3]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[3], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[4]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[4]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[4], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[5]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[5]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[5], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[6]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[6]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[6], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[7]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[7]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[7], r0
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; CHECKLE-MVE-NEXT: vmov q0, q5
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; CHECKLE-MVE-NEXT: vpop {d8, d9, d10, d11, d12, d13}
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; CHECKLE-MVE-NEXT: pop {r4, pc}
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;
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; CHECKLE-MVEFP-LABEL: fadd_float16_1:
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; CHECKLE-MVEFP: @ %bb.0: @ %entry
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; CHECKLE-MVEFP-NEXT: vmov.i16 q1, #0x3c00
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; CHECKLE-MVEFP-NEXT: vadd.f16 q0, q0, q1
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; CHECKLE-MVEFP-NEXT: bx lr
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;
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; CHECKBE-LABEL: fadd_float16_1:
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; CHECKBE: @ %bb.0: @ %entry
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; CHECKBE-NEXT: vmov.i16 q1, #0x3c00
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@ -1148,6 +1314,104 @@ entry:
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}
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define arm_aapcs_vfpcc <8 x half> @fadd_float16_m3(<8 x half> %a) {
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; CHECKLE-MVE-LABEL: fadd_float16_m3:
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; CHECKLE-MVE: @ %bb.0: @ %entry
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; CHECKLE-MVE-NEXT: .save {r4, lr}
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; CHECKLE-MVE-NEXT: push {r4, lr}
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; CHECKLE-MVE-NEXT: .vsave {d8, d9, d10, d11, d12, d13}
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; CHECKLE-MVE-NEXT: vpush {d8, d9, d10, d11, d12, d13}
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q0[0]
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; CHECKLE-MVE-NEXT: vmov q4, q0
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: vmov.i16 q6, #0xc200
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[0]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[0], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[1]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[1]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[1], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[2]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[2]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[2], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[3]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[3]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[3], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[4]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[4]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[4], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[5]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[5]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[5], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[6]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[6]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[6], r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q4[7]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r4, r0
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; CHECKLE-MVE-NEXT: vmov.u16 r0, q6[7]
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; CHECKLE-MVE-NEXT: bl __aeabi_h2f
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; CHECKLE-MVE-NEXT: mov r1, r0
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; CHECKLE-MVE-NEXT: mov r0, r4
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; CHECKLE-MVE-NEXT: bl __aeabi_fadd
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; CHECKLE-MVE-NEXT: bl __aeabi_f2h
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; CHECKLE-MVE-NEXT: vmov.16 q5[7], r0
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; CHECKLE-MVE-NEXT: vmov q0, q5
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; CHECKLE-MVE-NEXT: vpop {d8, d9, d10, d11, d12, d13}
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; CHECKLE-MVE-NEXT: pop {r4, pc}
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;
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; CHECKLE-MVEFP-LABEL: fadd_float16_m3:
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; CHECKLE-MVEFP: @ %bb.0: @ %entry
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; CHECKLE-MVEFP-NEXT: vmov.i16 q1, #0xc200
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; CHECKLE-MVEFP-NEXT: vadd.f16 q0, q0, q1
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; CHECKLE-MVEFP-NEXT: bx lr
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;
|
||||
; CHECKBE-LABEL: fadd_float16_m3:
|
||||
; CHECKBE: @ %bb.0: @ %entry
|
||||
; CHECKBE-NEXT: vmov.i16 q1, #0xc200
|
||||
|
||||
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Reference in New Issue
Block a user