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[AMDGPU] Handle S_WAIT_XCNT in SIInstrInfo::isWaitcnt (#187726)

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This affects the behavior of SIPreEmitPeephole and
AMDGPULowerVGPREncoding.
This commit is contained in:
Jay Foad 2026-03-23 10:19:43 +00:00 committed by GitHub
parent 94b222bec7
commit e3c287ffc5
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3 changed files with 101 additions and 0 deletions
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1
llvm/lib/Target/AMDGPU/SIInstrInfo.h
View File

@ -1199,6 +1199,7 @@ public:
case AMDGPU::S_WAIT_EXPCNT:
case AMDGPU::S_WAIT_DSCNT:
case AMDGPU::S_WAIT_KMCNT:
case AMDGPU::S_WAIT_XCNT:
case AMDGPU::S_WAIT_IDLE:
return true;
default:

60
llvm/test/CodeGen/AMDGPU/insert-skips-gfx1250.mir Normal file
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@ -0,0 +1,60 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -run-pass si-pre-emit-peephole -verify-machineinstrs %s -o - | FileCheck %s
---
name: skip_wait_xcnt
body: |
; CHECK-LABEL: name: skip_wait_xcnt
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: V_NOP_e32 implicit $exec
; CHECK-NEXT: S_WAIT_XCNT 0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: S_ENDPGM 0
bb.0:
successors: %bb.1, %bb.2
S_CBRANCH_EXECZ %bb.2, implicit $exec
bb.1:
successors: %bb.2
V_NOP_e32 implicit $exec
S_WAIT_XCNT 0
bb.2:
S_ENDPGM 0
...
---
name: skip_wait_asynccnt
body: |
; CHECK-LABEL: name: skip_wait_asynccnt
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: V_NOP_e32 implicit $exec
; CHECK-NEXT: S_WAIT_ASYNCCNT 0, implicit $asynccnt, implicit-def $asynccnt
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: S_ENDPGM 0
bb.0:
successors: %bb.1, %bb.2
S_CBRANCH_EXECZ %bb.2, implicit $exec
bb.1:
successors: %bb.2
V_NOP_e32 implicit $exec
S_WAIT_ASYNCCNT 0, implicit $asynccnt, implicit-def $asynccnt
bb.2:
S_ENDPGM 0
...

40
llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
View File

@ -84,3 +84,43 @@ body: |
$vgpr260 = V_AND_B32_e32 496, $vgpr260, implicit $exec
S_ENDPGM 0
...
---
name: xcnt
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr10, $vgpr257
; CHECK-LABEL: name: xcnt
; CHECK: liveins: $vgpr10, $vgpr257
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
; CHECK-NEXT: S_SET_VGPR_MSB 65, implicit-def $mode
; CHECK-NEXT: S_WAIT_XCNT 0
; CHECK-NEXT: $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
; CHECK-NEXT: S_ENDPGM 0
$vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
S_WAIT_XCNT 0
$vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
S_ENDPGM 0
...
---
name: asynccnt
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr10, $vgpr257
; CHECK-LABEL: name: asynccnt
; CHECK: liveins: $vgpr10, $vgpr257
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
; CHECK-NEXT: S_WAIT_ASYNCCNT 0, implicit $asynccnt, implicit-def $asynccnt
; CHECK-NEXT: S_SET_VGPR_MSB 65, implicit-def $mode
; CHECK-NEXT: $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
; CHECK-NEXT: S_ENDPGM 0
$vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
S_WAIT_ASYNCCNT 0, implicit $asynccnt, implicit-def $asynccnt
$vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
S_ENDPGM 0
...