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[X86] Don't request 0x90 nop filling in p2align directives (#110134)

Browse Source 
As of rev ea222be0d, LLVMs assembler will actually try to honour the
"fill value" part of p2align directives. X86 printed these as 0x90, which
isn't actually what it wanted: we want multi-byte nops for .text
padding. Compiling via a textual assembly file produces single-byte
nop padding since ea222be0d but the built-in assembler will produce
multi-byte nops. This divergent behaviour is undesirable.

To fix: don't set the byte padding field for x86, which allows the
assembler to pick multi-byte nops. Test that we get the same multi-byte
padding when compiled via textual assembly or directly to object file.
Added same-align-bytes-with-llasm-llobj.ll to that effect, updated
numerous other tests to not contain check-lines for the explicit padding.
This commit is contained in:
Jeremy Morse 2024-10-02 11:14:05 +01:00 committed by GitHub
parent bdd40e39a4
commit e6bf48d110
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
217 changed files with 1419 additions and 1382 deletions
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4
clang/test/CodeGen/align-loops.c
View File

@ -5,8 +5,8 @@
// RUN: %clang_cc1 -triple=x86_64 -S %s -falign-loops=32 -O -o - | FileCheck %s --check-prefixes=CHECK,CHECK_32
// CHECK-LABEL: foo:
// CHECK_8: .p2align 3, 0x90
// CHECK_32: .p2align 5, 0x90
// CHECK_8: .p2align 3
// CHECK_32: .p2align 5
void bar(void);
void foo(void) {

8
llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
View File

@ -43,8 +43,6 @@ X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(const Triple &T) {
AssemblerDialect = AsmWriterFlavor;
TextAlignFillValue = 0x90;
if (!is64Bit)
Data64bitsDirective = nullptr; // we can't emit a 64-bit unit
@ -93,8 +91,6 @@ X86ELFMCAsmInfo::X86ELFMCAsmInfo(const Triple &T) {
AssemblerDialect = AsmWriterFlavor;
TextAlignFillValue = 0x90;
// Debug Information
SupportsDebugInformation = true;
@ -132,8 +128,6 @@ X86MCAsmInfoMicrosoft::X86MCAsmInfoMicrosoft(const Triple &Triple) {
AssemblerDialect = AsmWriterFlavor;
TextAlignFillValue = 0x90;
AllowAtInName = true;
}
@ -167,7 +161,5 @@ X86MCAsmInfoGNUCOFF::X86MCAsmInfoGNUCOFF(const Triple &Triple) {
AssemblerDialect = AsmWriterFlavor;
TextAlignFillValue = 0x90;
AllowAtInName = true;
}

2
llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll
View File

@ -7,7 +7,7 @@ define i32 @foo(i32 %t, i32 %C) {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: decl %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %cond_true
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: incl %eax

34
llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
View File

@ -27,7 +27,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: js .LBB0_14
; CHECK-NEXT: # %bb.12:
; CHECK-NEXT: xorl %r8d, %r8d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_13: # %a25b
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb %r8b, %r8b
@ -38,7 +38,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: jne .LBB0_1
; CHECK-NEXT: # %bb.15:
; CHECK-NEXT: xorl %r8d, %r8d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_16: # %a25b140
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb %r8b, %r8b
@ -56,7 +56,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: movb $1, %r10b
; CHECK-NEXT: jmp .LBB0_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_9: # %b1606
; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1
; CHECK-NEXT: testb %r9b, %r9b
@ -83,7 +83,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1
; CHECK-NEXT: testq %rdx, %rdx
; CHECK-NEXT: js .LBB0_18
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_36: # %a30b
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -93,7 +93,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1
; CHECK-NEXT: testb %r10b, %r10b
; CHECK-NEXT: jne .LBB0_4
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_19: # %a30b294
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -115,7 +115,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1
; CHECK-NEXT: testb %r8b, %r8b
; CHECK-NEXT: jne .LBB0_8
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_33: # %a74b
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -128,7 +128,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1
; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: js .LBB0_9
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_35: # %a97b
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -142,7 +142,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: testb %r9b, %r9b
; CHECK-NEXT: jne .LBB0_35
; CHECK-NEXT: jmp .LBB0_9
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_21: # %b377
; CHECK-NEXT: # in Loop: Header=BB0_20 Depth=2
; CHECK-NEXT: testb %r9b, %r9b
@ -153,7 +153,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # Child Loop BB0_37 Depth 3
; CHECK-NEXT: testq %rsi, %rsi
; CHECK-NEXT: js .LBB0_21
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_37: # %a35b
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # Parent Loop BB0_20 Depth=2
@ -161,7 +161,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: testb %r9b, %r9b
; CHECK-NEXT: je .LBB0_37
; CHECK-NEXT: jmp .LBB0_21
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_27: # %b1016
; CHECK-NEXT: # in Loop: Header=BB0_25 Depth=2
; CHECK-NEXT: testq %rsi, %rsi
@ -173,7 +173,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # Child Loop BB0_28 Depth 3
; CHECK-NEXT: testq %rdx, %rdx
; CHECK-NEXT: js .LBB0_26
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_38: # %a53b
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # Parent Loop BB0_25 Depth=2
@ -184,7 +184,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # in Loop: Header=BB0_25 Depth=2
; CHECK-NEXT: testb %r10b, %r10b
; CHECK-NEXT: jne .LBB0_27
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_28: # %a53b1019
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # Parent Loop BB0_25 Depth=2
@ -192,7 +192,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: testq %rdx, %rdx
; CHECK-NEXT: jle .LBB0_28
; CHECK-NEXT: jmp .LBB0_27
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_31: # %b1263
; CHECK-NEXT: # in Loop: Header=BB0_29 Depth=2
; CHECK-NEXT: testq %rdx, %rdx
@ -204,7 +204,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # Child Loop BB0_32 Depth 3
; CHECK-NEXT: testq %rsi, %rsi
; CHECK-NEXT: js .LBB0_30
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_39: # %a63b
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # Parent Loop BB0_29 Depth=2
@ -215,7 +215,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # in Loop: Header=BB0_29 Depth=2
; CHECK-NEXT: testq %rsi, %rsi
; CHECK-NEXT: jle .LBB0_31
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_32: # %a63b1266
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # Parent Loop BB0_29 Depth=2
@ -223,7 +223,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: testq %rsi, %rsi
; CHECK-NEXT: jle .LBB0_32
; CHECK-NEXT: jmp .LBB0_31
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_24: # %b712
; CHECK-NEXT: # in Loop: Header=BB0_22 Depth=2
; CHECK-NEXT: testb %r9b, %r9b
@ -234,7 +234,7 @@ define dso_local void @foo(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5)
; CHECK-NEXT: # Child Loop BB0_23 Depth 3
; CHECK-NEXT: testq %rdx, %rdx
; CHECK-NEXT: js .LBB0_24
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_23: # %a45b
; CHECK-NEXT: # Parent Loop BB0_3 Depth=1
; CHECK-NEXT: # Parent Loop BB0_22 Depth=2

2
llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
View File

@ -15,7 +15,7 @@ define void @foo(ptr %buf, i32 %size, i32 %col, ptr %p) nounwind {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-NEXT: addl $8, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_2: ## %bb
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl (%esi), %edi

2
llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
View File

@ -9,7 +9,7 @@ define signext i16 @f(ptr %bp, ptr %ss) {
; CHECK-NEXT: .cfi_offset %esi, -8
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %cond_next127
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl (%eax), %edx

2
llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll
View File

@ -6,7 +6,7 @@ define signext i16 @t(ptr %qmatrix, ptr %dct, ptr %acBaseTable, ptr %acExtTabl
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %cond_next127
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %eax, %edx

2
llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll
View File

@ -14,7 +14,7 @@ define float @foo(ptr %x, ptr %y, i32 %c) nounwind {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: xorl %esi, %esi
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_3: # %bb18
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: xorps %xmm1, %xmm1

6
llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
View File

@ -16,7 +16,7 @@ define fastcc void @mp_sqrt(i32 %n, i32 %radix, ptr %in, ptr %out, ptr %tmp1, pt
; CHECK-NEXT: movb $1, %cl
; CHECK-NEXT: movl $1, %ebx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %bb.i5
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %ecx, %eax
@ -37,7 +37,7 @@ define fastcc void @mp_sqrt(i32 %n, i32 %radix, ptr %in, ptr %out, ptr %tmp1, pt
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: xorpd %xmm1, %xmm1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_7: # %bb.i28.i
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cvttsd2si %xmm1, %edi
@ -85,7 +85,7 @@ define fastcc void @mp_sqrt(i32 %n, i32 %radix, ptr %in, ptr %out, ptr %tmp1, pt
; CHECK-NEXT: popl %ebx
; CHECK-NEXT: popl %ebp
; CHECK-NEXT: retl
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_9: # %bb.i.i
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: jmp .LBB0_9

6
llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll
View File

@ -16,13 +16,13 @@ define void @t(ptr %depth, ptr %bop, i32 %mode) nounwind {
; CHECK-NEXT: ## %bb.1: ## %entry
; CHECK-NEXT: cmpl $1, %edx
; CHECK-NEXT: jne LBB0_10
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_2: ## %bb2898.us
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: jmp LBB0_2
; CHECK-NEXT: LBB0_3: ## %bb13086.preheader
; CHECK-NEXT: movb $1, %al
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_4: ## %bb13088
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb %al, %al
@ -31,7 +31,7 @@ define void @t(ptr %depth, ptr %bop, i32 %mode) nounwind {
; CHECK-NEXT: ## in Loop: Header=BB0_4 Depth=1
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: jmp LBB0_7
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_5: ## in Loop: Header=BB0_4 Depth=1
; CHECK-NEXT: movl $65535, %ecx ## imm = 0xFFFF
; CHECK-NEXT: LBB0_7: ## %bb13107

2
llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll
View File

@ -10,7 +10,7 @@ define i32 @main() nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: movl $10271, %ebx # imm = 0x281F
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %forbody
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl $.str, %edi

2
llvm/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
View File

@ -11,7 +11,7 @@ define ptr @test(ptr %Q, ptr %L) nounwind {
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: jmp LBB0_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_1: ## %bb
; CHECK-NEXT: ## in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT: incl %eax

2
llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
View File

@ -20,7 +20,7 @@ define ptr @t(ptr %desc, i64 %p) nounwind ssp {
; CHECK-NEXT: movq %rdi, %r14
; CHECK-NEXT: orq $2097152, %rbx ## imm = 0x200000
; CHECK-NEXT: andl $15728640, %ebx ## imm = 0xF00000
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_1: ## %bb4
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: xorl %eax, %eax

2
llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll
View File

@ -8,7 +8,7 @@ define i64 @test(ptr %tmp13) nounwind {
; CHECK-NEXT: movl (%rdi), %ecx
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: shrl %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %while.cond
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb $1, %cl

2
llvm/test/CodeGen/X86/2009-08-12-badswitch.ll
View File

@ -123,7 +123,7 @@ define internal fastcc i32 @foo(i64 %bar) nounwind ssp {
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: popq %rcx
; CHECK-NEXT: retq
; CHECK-NEXT: .p2align 2, 0x90
; CHECK-NEXT: .p2align 2
; CHECK-NEXT: .data_region jt32
; CHECK-NEXT: .set L0_0_set_3, LBB0_3-LJTI0_0
; CHECK-NEXT: .set L0_0_set_4, LBB0_4-LJTI0_0

8
llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll
View File

@ -4,7 +4,7 @@
define i32 @test_01(ptr %p, i64 %len, i32 %x) {
; CHECK-LABEL: test_01:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_1: ## %loop
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: subq $1, %rsi
@ -44,7 +44,7 @@ failure: ; preds = %backedge
define i32 @test_01a(ptr %p, i64 %len, i32 %x) {
; CHECK-LABEL: test_01a:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB1_1: ## %loop
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: subq $1, %rsi
@ -84,7 +84,7 @@ failure: ; preds = %backedge
define i32 @test_02(ptr %p, i64 %len, i32 %x) {
; CHECK-LABEL: test_02:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB2_1: ## %loop
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: subq $1, %rsi
@ -126,7 +126,7 @@ failure: ; preds = %backedge
define i32 @test_03(ptr %p, i64 %len, i32 %x) {
; CHECK-LABEL: test_03:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB3_1: ## %loop
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: subq $1, %rsi

8
llvm/test/CodeGen/X86/AMX/amx-across-func.ll
View File

@ -235,7 +235,7 @@ define dso_local i32 @test_loop(i32 %0) nounwind {
; CHECK-NEXT: movl $32, %r15d
; CHECK-NEXT: movw $8, %r12w
; CHECK-NEXT: movl $buf+2048, %r13d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_2: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: tileloadd (%r14,%r15), %tmm0
; CHECK-NEXT: movabsq $64, %rax
@ -300,7 +300,7 @@ define dso_local i32 @test_loop(i32 %0) nounwind {
; IPRA-NEXT: movl $32, %esi
; IPRA-NEXT: movw $8, %di
; IPRA-NEXT: movl $buf+2048, %r8d
; IPRA-NEXT: .p2align 4, 0x90
; IPRA-NEXT: .p2align 4
; IPRA-NEXT: .LBB2_2: # =>This Inner Loop Header: Depth=1
; IPRA-NEXT: tileloadd (%rdx,%rsi), %tmm0
; IPRA-NEXT: callq foo
@ -494,7 +494,7 @@ define dso_local void @test_loop2(i32 %0) nounwind {
; CHECK-NEXT: movl $32, %r15d
; CHECK-NEXT: movw $8, %bp
; CHECK-NEXT: movl $buf+2048, %r12d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: callq foo
@ -535,7 +535,7 @@ define dso_local void @test_loop2(i32 %0) nounwind {
; IPRA-NEXT: movl $32, %ecx
; IPRA-NEXT: movw $8, %dx
; IPRA-NEXT: movl $buf+2048, %esi
; IPRA-NEXT: .p2align 4, 0x90
; IPRA-NEXT: .p2align 4
; IPRA-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
; IPRA-NEXT: callq foo
; IPRA-NEXT: testl %edi, %edi

4
llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
View File

@ -241,7 +241,7 @@ define dso_local void @test5(i16 signext %0, i16 signext %1) nounwind {
; CHECK-NEXT: movl $32, %edx
; CHECK-NEXT: leal -1(%rsi), %r8d
; CHECK-NEXT: jmp .LBB4_1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB4_3: # %if.false
; CHECK-NEXT: # in Loop: Header=BB4_1 Depth=1
; CHECK-NEXT: movl %r8d, %esi
@ -301,7 +301,7 @@ define dso_local void @test6(i16 signext %0) nounwind {
; CHECK-NEXT: movl $32, %edx
; CHECK-NEXT: xorl %esi, %esi
; CHECK-NEXT: jmp .LBB5_1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB5_3: # %if.false
; CHECK-NEXT: # in Loop: Header=BB5_1 Depth=1
; CHECK-NEXT: decl %esi

8
llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
View File

@ -32,7 +32,7 @@ define dso_local void @test1(ptr%buf) nounwind {
; CHECK-NEXT: movq %rdi, %rbx
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: movl $32, %r15d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %loop.header
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movabsq $64, %rax
@ -92,7 +92,7 @@ define dso_local void @test1(ptr%buf) nounwind {
; EGPR-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
; EGPR-NEXT: xorl %r14d, %r14d # encoding: [0x45,0x31,0xf6]
; EGPR-NEXT: movl $32, %r15d # encoding: [0x41,0xbf,0x20,0x00,0x00,0x00]
; EGPR-NEXT: .p2align 4, 0x90
; EGPR-NEXT: .p2align 4
; EGPR-NEXT: .LBB0_2: # %loop.header
; EGPR-NEXT: # =>This Inner Loop Header: Depth=1
; EGPR-NEXT: movabsq $64, %rax # encoding: [0x48,0xb8,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
@ -179,7 +179,7 @@ define dso_local void @test2(ptr%buf) nounwind {
; CHECK-NEXT: movq %rdi, %rbx
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: movl $32, %r15d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_2: # %loop.header
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: tilezero %tmm0
@ -231,7 +231,7 @@ define dso_local void @test2(ptr%buf) nounwind {
; EGPR-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
; EGPR-NEXT: xorl %r14d, %r14d # encoding: [0x45,0x31,0xf6]
; EGPR-NEXT: movl $32, %r15d # encoding: [0x41,0xbf,0x20,0x00,0x00,0x00]
; EGPR-NEXT: .p2align 4, 0x90
; EGPR-NEXT: .p2align 4
; EGPR-NEXT: .LBB1_2: # %loop.header
; EGPR-NEXT: # =>This Inner Loop Header: Depth=1
; EGPR-NEXT: tilezero %tmm0 # encoding: [0xc4,0xe2,0x7b,0x49,0xc0]

4
llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
View File

@ -244,7 +244,7 @@ define dso_local void @test3(ptr%buf) nounwind {
; CHECK-NEXT: movq %rdi, %rbx
; CHECK-NEXT: movl $32, %r14d
; CHECK-NEXT: xorl %r15d, %r15d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_2: # %loop.header
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: tilestored %tmm0, (%rbx,%r14)
@ -299,7 +299,7 @@ define dso_local void @test3(ptr%buf) nounwind {
; EGPR-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
; EGPR-NEXT: movl $32, %r14d # encoding: [0x41,0xbe,0x20,0x00,0x00,0x00]
; EGPR-NEXT: xorl %r15d, %r15d # encoding: [0x45,0x31,0xff]
; EGPR-NEXT: .p2align 4, 0x90
; EGPR-NEXT: .p2align 4
; EGPR-NEXT: .LBB1_2: # %loop.header
; EGPR-NEXT: # =>This Inner Loop Header: Depth=1
; EGPR-NEXT: tilestored %tmm0, (%rbx,%r14) # EVEX TO VEX Compression encoding: [0xc4,0xa2,0x7a,0x4b,0x04,0x33]

4
llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll
View File

@ -85,7 +85,7 @@ define void @PR90954(ptr %0, ptr %1, i32 %2) nounwind {
; CHECK-NEXT: xorl %ebx, %ebx
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: jmp .LBB1_1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_5: # in Loop: Header=BB1_1 Depth=1
; CHECK-NEXT: incq %r14
; CHECK-NEXT: addl %edx, %ebx
@ -96,7 +96,7 @@ define void @PR90954(ptr %0, ptr %1, i32 %2) nounwind {
; CHECK-NEXT: xorl %r12d, %r12d
; CHECK-NEXT: xorl %r13d, %r13d
; CHECK-NEXT: jmp .LBB1_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_4: # in Loop: Header=BB1_2 Depth=2
; CHECK-NEXT: tilestored %tmm1, (%r15,%rax)
; CHECK-NEXT: incq %r13

2
llvm/test/CodeGen/X86/MachineSink-Issue98477.ll
View File

@ -13,7 +13,7 @@ define i32 @main(i1 %tobool.not, i32 %0) {
; CHECK-NEXT: .LBB0_1: # %j.preheader
; CHECK-NEXT: xorl %r9d, %r9d
; CHECK-NEXT: jmp .LBB0_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_5: # %if.then4
; CHECK-NEXT: # in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT: movl $1, %eax

82
llvm/test/CodeGen/X86/MergeConsecutiveStores.ll
View File

@ -17,7 +17,7 @@ define void @merge_const_store(i32 %count, ptr nocapture %p) nounwind uwtable no
; X86-NEXT: jle .LBB0_3
; X86-NEXT: # %bb.1: # %.lr.ph.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_2: # %.lr.ph
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl $67305985, (%ecx) # imm = 0x4030201
@ -34,7 +34,7 @@ define void @merge_const_store(i32 %count, ptr nocapture %p) nounwind uwtable no
; X64-NEXT: jle .LBB0_3
; X64-NEXT: # %bb.1: # %.lr.ph.preheader
; X64-NEXT: movabsq $578437695752307201, %rax # imm = 0x807060504030201
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB0_2: # %.lr.ph
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movq %rax, (%rsi)
@ -81,7 +81,7 @@ define void @merge_const_store_no_vec(i32 %count, ptr nocapture %p) noimplicitfl
; X86-NEXT: jle .LBB1_3
; X86-NEXT: # %bb.1: # %.lr.ph.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB1_2: # %.lr.ph
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl $0, (%ecx)
@ -102,7 +102,7 @@ define void @merge_const_store_no_vec(i32 %count, ptr nocapture %p) noimplicitfl
; X64: # %bb.0:
; X64-NEXT: testl %edi, %edi
; X64-NEXT: jle .LBB1_2
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB1_1: # %.lr.ph
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movq $0, (%rsi)
@ -153,7 +153,7 @@ define void @merge_const_store_vec(i32 %count, ptr nocapture %p) nounwind uwtabl
; X86-NEXT: # %bb.1: # %.lr.ph.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: vxorps %xmm0, %xmm0, %xmm0
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB2_2: # %.lr.ph
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: vmovups %ymm0, (%ecx)
@ -170,7 +170,7 @@ define void @merge_const_store_vec(i32 %count, ptr nocapture %p) nounwind uwtabl
; X64-NEXT: jle .LBB2_3
; X64-NEXT: # %bb.1: # %.lr.ph.preheader
; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB2_2: # %.lr.ph
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: vmovups %ymm0, (%rsi)
@ -219,7 +219,7 @@ define void @merge_nonconst_store(i32 %count, i8 %zz, ptr nocapture %p) nounwind
; X86-BWON-NEXT: # %bb.1: # %.lr.ph.preheader
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BWON-NEXT: movzbl {{[0-9]+}}(%esp), %edx
; X86-BWON-NEXT: .p2align 4, 0x90
; X86-BWON-NEXT: .p2align 4
; X86-BWON-NEXT: .LBB3_2: # %.lr.ph
; X86-BWON-NEXT: # =>This Inner Loop Header: Depth=1
; X86-BWON-NEXT: movl $67305985, (%ecx) # imm = 0x4030201
@ -240,7 +240,7 @@ define void @merge_nonconst_store(i32 %count, i8 %zz, ptr nocapture %p) nounwind
; X86-BWOFF-NEXT: # %bb.1: # %.lr.ph.preheader
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BWOFF-NEXT: movb {{[0-9]+}}(%esp), %dl
; X86-BWOFF-NEXT: .p2align 4, 0x90
; X86-BWOFF-NEXT: .p2align 4
; X86-BWOFF-NEXT: .LBB3_2: # %.lr.ph
; X86-BWOFF-NEXT: # =>This Inner Loop Header: Depth=1
; X86-BWOFF-NEXT: movl $67305985, (%ecx) # imm = 0x4030201
@ -257,7 +257,7 @@ define void @merge_nonconst_store(i32 %count, i8 %zz, ptr nocapture %p) nounwind
; X64: # %bb.0:
; X64-NEXT: testl %edi, %edi
; X64-NEXT: jle .LBB3_2
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB3_1: # %.lr.ph
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movl $67305985, (%rdx) # imm = 0x4030201
@ -310,7 +310,7 @@ define void @merge_loads_i16(i32 %count, ptr noalias nocapture %q, ptr noalias n
; X86-BWON-NEXT: # %bb.1: # %.lr.ph
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWON-NEXT: .p2align 4, 0x90
; X86-BWON-NEXT: .p2align 4
; X86-BWON-NEXT: .LBB4_2: # =>This Inner Loop Header: Depth=1
; X86-BWON-NEXT: movzwl (%edx), %esi
; X86-BWON-NEXT: movw %si, (%ecx)
@ -333,7 +333,7 @@ define void @merge_loads_i16(i32 %count, ptr noalias nocapture %q, ptr noalias n
; X86-BWOFF-NEXT: # %bb.1: # %.lr.ph
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWOFF-NEXT: .p2align 4, 0x90
; X86-BWOFF-NEXT: .p2align 4
; X86-BWOFF-NEXT: .LBB4_2: # =>This Inner Loop Header: Depth=1
; X86-BWOFF-NEXT: movw (%edx), %si
; X86-BWOFF-NEXT: movw %si, (%ecx)
@ -349,7 +349,7 @@ define void @merge_loads_i16(i32 %count, ptr noalias nocapture %q, ptr noalias n
; X64-BWON: # %bb.0:
; X64-BWON-NEXT: testl %edi, %edi
; X64-BWON-NEXT: jle .LBB4_2
; X64-BWON-NEXT: .p2align 4, 0x90
; X64-BWON-NEXT: .p2align 4
; X64-BWON-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
; X64-BWON-NEXT: movzwl (%rsi), %eax
; X64-BWON-NEXT: movw %ax, (%rdx)
@ -363,7 +363,7 @@ define void @merge_loads_i16(i32 %count, ptr noalias nocapture %q, ptr noalias n
; X64-BWOFF: # %bb.0:
; X64-BWOFF-NEXT: testl %edi, %edi
; X64-BWOFF-NEXT: jle .LBB4_2
; X64-BWOFF-NEXT: .p2align 4, 0x90
; X64-BWOFF-NEXT: .p2align 4
; X64-BWOFF-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
; X64-BWOFF-NEXT: movw (%rsi), %ax
; X64-BWOFF-NEXT: movw %ax, (%rdx)
@ -411,7 +411,7 @@ define void @no_merge_loads(i32 %count, ptr noalias nocapture %q, ptr noalias no
; X86-BWON-NEXT: # %bb.1: # %.lr.ph
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWON-NEXT: .p2align 4, 0x90
; X86-BWON-NEXT: .p2align 4
; X86-BWON-NEXT: .LBB5_2: # %a4
; X86-BWON-NEXT: # =>This Inner Loop Header: Depth=1
; X86-BWON-NEXT: movzbl (%edx), %ebx
@ -437,7 +437,7 @@ define void @no_merge_loads(i32 %count, ptr noalias nocapture %q, ptr noalias no
; X86-BWOFF-NEXT: # %bb.1: # %.lr.ph
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWOFF-NEXT: .p2align 4, 0x90
; X86-BWOFF-NEXT: .p2align 4
; X86-BWOFF-NEXT: .LBB5_2: # %a4
; X86-BWOFF-NEXT: # =>This Inner Loop Header: Depth=1
; X86-BWOFF-NEXT: movb (%edx), %bl
@ -456,7 +456,7 @@ define void @no_merge_loads(i32 %count, ptr noalias nocapture %q, ptr noalias no
; X64-BWON: # %bb.0:
; X64-BWON-NEXT: testl %edi, %edi
; X64-BWON-NEXT: jle .LBB5_2
; X64-BWON-NEXT: .p2align 4, 0x90
; X64-BWON-NEXT: .p2align 4
; X64-BWON-NEXT: .LBB5_1: # %a4
; X64-BWON-NEXT: # =>This Inner Loop Header: Depth=1
; X64-BWON-NEXT: movzbl (%rsi), %eax
@ -473,7 +473,7 @@ define void @no_merge_loads(i32 %count, ptr noalias nocapture %q, ptr noalias no
; X64-BWOFF: # %bb.0:
; X64-BWOFF-NEXT: testl %edi, %edi
; X64-BWOFF-NEXT: jle .LBB5_2
; X64-BWOFF-NEXT: .p2align 4, 0x90
; X64-BWOFF-NEXT: .p2align 4
; X64-BWOFF-NEXT: .LBB5_1: # %a4
; X64-BWOFF-NEXT: # =>This Inner Loop Header: Depth=1
; X64-BWOFF-NEXT: movb (%rsi), %al
@ -526,7 +526,7 @@ define void @merge_loads_integer(i32 %count, ptr noalias nocapture %q, ptr noali
; X86-NEXT: # %bb.1: # %.lr.ph
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB6_2: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl (%edx), %esi
; X86-NEXT: movl 4(%edx), %edi
@ -546,7 +546,7 @@ define void @merge_loads_integer(i32 %count, ptr noalias nocapture %q, ptr noali
; X64: # %bb.0:
; X64-NEXT: testl %edi, %edi
; X64-NEXT: jle .LBB6_2
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB6_1: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movq (%rsi), %rax
; X64-NEXT: movq %rax, (%rdx)
@ -590,7 +590,7 @@ define void @merge_loads_vector(i32 %count, ptr noalias nocapture %q, ptr noalia
; X86-NEXT: # %bb.1: # %.lr.ph
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB7_2: # %block4
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: vmovups (%edx), %xmm0
@ -605,7 +605,7 @@ define void @merge_loads_vector(i32 %count, ptr noalias nocapture %q, ptr noalia
; X64: # %bb.0:
; X64-NEXT: testl %edi, %edi
; X64-NEXT: jle .LBB7_2
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB7_1: # %block4
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: vmovups (%rsi), %xmm0
@ -659,7 +659,7 @@ define void @merge_loads_no_align(i32 %count, ptr noalias nocapture %q, ptr noal
; X86-NEXT: # %bb.1: # %.lr.ph
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB8_2: # %block4
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: vmovups (%edx), %xmm0
@ -674,7 +674,7 @@ define void @merge_loads_no_align(i32 %count, ptr noalias nocapture %q, ptr noal
; X64: # %bb.0:
; X64-NEXT: testl %edi, %edi
; X64-NEXT: jle .LBB8_2
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB8_1: # %block4
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: vmovups (%rsi), %xmm0
@ -737,7 +737,7 @@ define void @MergeLoadStoreBaseIndexOffset(ptr %a, ptr %b, ptr %c, i32 %n) {
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-BWON-NEXT: .p2align 4, 0x90
; X86-BWON-NEXT: .p2align 4
; X86-BWON-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
; X86-BWON-NEXT: movl (%edi,%eax,8), %ebx
; X86-BWON-NEXT: movzwl (%edx,%ebx), %ebx
@ -770,7 +770,7 @@ define void @MergeLoadStoreBaseIndexOffset(ptr %a, ptr %b, ptr %c, i32 %n) {
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-BWOFF-NEXT: .p2align 4, 0x90
; X86-BWOFF-NEXT: .p2align 4
; X86-BWOFF-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
; X86-BWOFF-NEXT: movl (%edi,%eax,8), %ebx
; X86-BWOFF-NEXT: movw (%edx,%ebx), %bx
@ -791,7 +791,7 @@ define void @MergeLoadStoreBaseIndexOffset(ptr %a, ptr %b, ptr %c, i32 %n) {
; X64-BWON: # %bb.0:
; X64-BWON-NEXT: movl %ecx, %eax
; X64-BWON-NEXT: xorl %ecx, %ecx
; X64-BWON-NEXT: .p2align 4, 0x90
; X64-BWON-NEXT: .p2align 4
; X64-BWON-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
; X64-BWON-NEXT: movq (%rdi,%rcx,8), %r8
; X64-BWON-NEXT: movzwl (%rdx,%r8), %r8d
@ -806,7 +806,7 @@ define void @MergeLoadStoreBaseIndexOffset(ptr %a, ptr %b, ptr %c, i32 %n) {
; X64-BWOFF: # %bb.0:
; X64-BWOFF-NEXT: movl %ecx, %eax
; X64-BWOFF-NEXT: xorl %ecx, %ecx
; X64-BWOFF-NEXT: .p2align 4, 0x90
; X64-BWOFF-NEXT: .p2align 4
; X64-BWOFF-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
; X64-BWOFF-NEXT: movq (%rdi,%rcx,8), %r8
; X64-BWOFF-NEXT: movw (%rdx,%r8), %r8w
@ -863,7 +863,7 @@ define void @MergeLoadStoreBaseIndexOffsetComplicated(ptr %a, ptr %b, ptr %c, i6
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-BWON-NEXT: xorl %ebp, %ebp
; X86-BWON-NEXT: .p2align 4, 0x90
; X86-BWON-NEXT: .p2align 4
; X86-BWON-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
; X86-BWON-NEXT: movsbl (%edi), %ecx
; X86-BWON-NEXT: movzbl (%esi,%ecx), %edx
@ -909,7 +909,7 @@ define void @MergeLoadStoreBaseIndexOffsetComplicated(ptr %a, ptr %b, ptr %c, i6
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %ebx
; X86-BWOFF-NEXT: xorl %ebp, %ebp
; X86-BWOFF-NEXT: .p2align 4, 0x90
; X86-BWOFF-NEXT: .p2align 4
; X86-BWOFF-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
; X86-BWOFF-NEXT: movsbl (%edi), %ecx
; X86-BWOFF-NEXT: movb (%esi,%ecx), %dl
@ -939,7 +939,7 @@ define void @MergeLoadStoreBaseIndexOffsetComplicated(ptr %a, ptr %b, ptr %c, i6
; X64-BWON-LABEL: MergeLoadStoreBaseIndexOffsetComplicated:
; X64-BWON: # %bb.0:
; X64-BWON-NEXT: xorl %eax, %eax
; X64-BWON-NEXT: .p2align 4, 0x90
; X64-BWON-NEXT: .p2align 4
; X64-BWON-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
; X64-BWON-NEXT: movsbq (%rsi), %r8
; X64-BWON-NEXT: movzwl (%rdx,%r8), %r8d
@ -954,7 +954,7 @@ define void @MergeLoadStoreBaseIndexOffsetComplicated(ptr %a, ptr %b, ptr %c, i6
; X64-BWOFF-LABEL: MergeLoadStoreBaseIndexOffsetComplicated:
; X64-BWOFF: # %bb.0:
; X64-BWOFF-NEXT: xorl %eax, %eax
; X64-BWOFF-NEXT: .p2align 4, 0x90
; X64-BWOFF-NEXT: .p2align 4
; X64-BWOFF-NEXT: .LBB10_1: # =>This Inner Loop Header: Depth=1
; X64-BWOFF-NEXT: movsbq (%rsi), %r8
; X64-BWOFF-NEXT: movw (%rdx,%r8), %r8w
@ -1011,7 +1011,7 @@ define void @MergeLoadStoreBaseIndexOffsetSext(ptr %a, ptr %b, ptr %c, i32 %n) {
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-BWON-NEXT: .p2align 4, 0x90
; X86-BWON-NEXT: .p2align 4
; X86-BWON-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
; X86-BWON-NEXT: movsbl (%edi,%eax), %ebx
; X86-BWON-NEXT: movzwl (%edx,%ebx), %ebx
@ -1044,7 +1044,7 @@ define void @MergeLoadStoreBaseIndexOffsetSext(ptr %a, ptr %b, ptr %c, i32 %n) {
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-BWOFF-NEXT: .p2align 4, 0x90
; X86-BWOFF-NEXT: .p2align 4
; X86-BWOFF-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
; X86-BWOFF-NEXT: movsbl (%edi,%eax), %ebx
; X86-BWOFF-NEXT: movw (%edx,%ebx), %bx
@ -1065,7 +1065,7 @@ define void @MergeLoadStoreBaseIndexOffsetSext(ptr %a, ptr %b, ptr %c, i32 %n) {
; X64-BWON: # %bb.0:
; X64-BWON-NEXT: movl %ecx, %eax
; X64-BWON-NEXT: xorl %ecx, %ecx
; X64-BWON-NEXT: .p2align 4, 0x90
; X64-BWON-NEXT: .p2align 4
; X64-BWON-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
; X64-BWON-NEXT: movsbq (%rdi,%rcx), %r8
; X64-BWON-NEXT: movzwl (%rdx,%r8), %r8d
@ -1080,7 +1080,7 @@ define void @MergeLoadStoreBaseIndexOffsetSext(ptr %a, ptr %b, ptr %c, i32 %n) {
; X64-BWOFF: # %bb.0:
; X64-BWOFF-NEXT: movl %ecx, %eax
; X64-BWOFF-NEXT: xorl %ecx, %ecx
; X64-BWOFF-NEXT: .p2align 4, 0x90
; X64-BWOFF-NEXT: .p2align 4
; X64-BWOFF-NEXT: .LBB11_1: # =>This Inner Loop Header: Depth=1
; X64-BWOFF-NEXT: movsbq (%rdi,%rcx), %r8
; X64-BWOFF-NEXT: movw (%rdx,%r8), %r8w
@ -1138,7 +1138,7 @@ define void @loadStoreBaseIndexOffsetSextNoSex(ptr %a, ptr %b, ptr %c, i32 %n) {
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BWON-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-BWON-NEXT: .p2align 4, 0x90
; X86-BWON-NEXT: .p2align 4
; X86-BWON-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
; X86-BWON-NEXT: movsbl (%edi,%eax), %ebx
; X86-BWON-NEXT: movzbl (%edx,%ebx), %ecx
@ -1180,7 +1180,7 @@ define void @loadStoreBaseIndexOffsetSextNoSex(ptr %a, ptr %b, ptr %c, i32 %n) {
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-BWOFF-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-BWOFF-NEXT: .p2align 4, 0x90
; X86-BWOFF-NEXT: .p2align 4
; X86-BWOFF-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
; X86-BWOFF-NEXT: movsbl (%edi,%eax), %ebx
; X86-BWOFF-NEXT: movb (%edx,%ebx), %cl
@ -1207,7 +1207,7 @@ define void @loadStoreBaseIndexOffsetSextNoSex(ptr %a, ptr %b, ptr %c, i32 %n) {
; X64-BWON: # %bb.0:
; X64-BWON-NEXT: movl %ecx, %eax
; X64-BWON-NEXT: xorl %ecx, %ecx
; X64-BWON-NEXT: .p2align 4, 0x90
; X64-BWON-NEXT: .p2align 4
; X64-BWON-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
; X64-BWON-NEXT: movsbq (%rdi,%rcx), %r8
; X64-BWON-NEXT: movzbl (%rdx,%r8), %r9d
@ -1226,7 +1226,7 @@ define void @loadStoreBaseIndexOffsetSextNoSex(ptr %a, ptr %b, ptr %c, i32 %n) {
; X64-BWOFF: # %bb.0:
; X64-BWOFF-NEXT: movl %ecx, %eax
; X64-BWOFF-NEXT: xorl %ecx, %ecx
; X64-BWOFF-NEXT: .p2align 4, 0x90
; X64-BWOFF-NEXT: .p2align 4
; X64-BWOFF-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
; X64-BWOFF-NEXT: movsbq (%rdi,%rcx), %r8
; X64-BWOFF-NEXT: movb (%rdx,%r8), %r9b
@ -1561,7 +1561,7 @@ define void @merge_const_store_heterogeneous(i32 %count, ptr nocapture %p) nounw
; X86-NEXT: jle .LBB23_3
; X86-NEXT: # %bb.1: # %.lr.ph.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB23_2: # %.lr.ph
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl $67305985, (%ecx) # imm = 0x4030201
@ -1578,7 +1578,7 @@ define void @merge_const_store_heterogeneous(i32 %count, ptr nocapture %p) nounw
; X64-NEXT: jle .LBB23_3
; X64-NEXT: # %bb.1: # %.lr.ph.preheader
; X64-NEXT: movabsq $578437695752307201, %rax # imm = 0x807060504030201
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB23_2: # %.lr.ph
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movq %rax, (%rsi)

2
llvm/test/CodeGen/X86/PR71178-register-coalescer-crash.ll
View File

@ -8,7 +8,7 @@ define i32 @h(i1 %arg, i32 %arg1) {
; CHECK-NEXT: movabsq $9166129423, %rcx # imm = 0x22258090F
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: jmp .LBB0_1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_9: # %bb18
; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
; CHECK-NEXT: xorl %eax, %eax

2
llvm/test/CodeGen/X86/SwitchLowering.ll
View File

@ -13,7 +13,7 @@ define ptr @FindChar(ptr %CurPtr) {
; CHECK-NEXT: .cfi_offset %edi, -8
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %bb
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movzbl (%esi,%edi), %eax

24
llvm/test/CodeGen/X86/addr-mode-matcher-2.ll
View File

@ -30,7 +30,7 @@ define void @foo_sext_nsw(i1 zeroext, i32) nounwind {
; X86-NEXT: retl
; X86-NEXT: .LBB0_1: # %.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal 20(,%eax,4), %eax
@ -49,7 +49,7 @@ define void @foo_sext_nsw(i1 zeroext, i32) nounwind {
; X64-NEXT: retq
; X64-NEXT: .LBB0_1: # %.preheader
; X64-NEXT: movl %esi, %eax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
; X64-NEXT: cltq
; X64-NEXT: shlq $2, %rax
@ -77,7 +77,7 @@ define void @foo_sext_nuw(i1 zeroext, i32) nounwind {
; X86-NEXT: retl
; X86-NEXT: .LBB1_1: # %.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB1_2: # =>This Inner Loop Header: Depth=1
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal 20(,%eax,4), %eax
@ -96,7 +96,7 @@ define void @foo_sext_nuw(i1 zeroext, i32) nounwind {
; X64-NEXT: retq
; X64-NEXT: .LBB1_1: # %.preheader
; X64-NEXT: movl %esi, %eax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB1_2: # =>This Inner Loop Header: Depth=1
; X64-NEXT: incl %eax
; X64-NEXT: cltq
@ -125,7 +125,7 @@ define void @foo_zext_nsw(i1 zeroext, i32) nounwind {
; X86-NEXT: retl
; X86-NEXT: .LBB2_1: # %.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB2_2: # =>This Inner Loop Header: Depth=1
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal 20(,%eax,4), %eax
@ -144,7 +144,7 @@ define void @foo_zext_nsw(i1 zeroext, i32) nounwind {
; X64-NEXT: retq
; X64-NEXT: .LBB2_1: # %.preheader
; X64-NEXT: movl %esi, %eax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB2_2: # =>This Inner Loop Header: Depth=1
; X64-NEXT: incl %eax
; X64-NEXT: shlq $2, %rax
@ -173,7 +173,7 @@ define void @foo_zext_nuw(i1 zeroext, i32) nounwind {
; X86-NEXT: retl
; X86-NEXT: .LBB3_1: # %.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB3_2: # =>This Inner Loop Header: Depth=1
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal 20(,%eax,4), %eax
@ -192,7 +192,7 @@ define void @foo_zext_nuw(i1 zeroext, i32) nounwind {
; X64-NEXT: retq
; X64-NEXT: .LBB3_1: # %.preheader
; X64-NEXT: movl %esi, %eax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB3_2: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movl %eax, %eax
; X64-NEXT: shlq $2, %rax
@ -220,7 +220,7 @@ define void @foo_sext(i1 zeroext, i32) nounwind {
; X86-NEXT: retl
; X86-NEXT: .LBB4_1: # %.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB4_2: # =>This Inner Loop Header: Depth=1
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal 20(,%eax,4), %eax
@ -239,7 +239,7 @@ define void @foo_sext(i1 zeroext, i32) nounwind {
; X64-NEXT: retq
; X64-NEXT: .LBB4_1: # %.preheader
; X64-NEXT: movl %esi, %eax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB4_2: # =>This Inner Loop Header: Depth=1
; X64-NEXT: incl %eax
; X64-NEXT: cltq
@ -268,7 +268,7 @@ define void @foo_zext(i1 zeroext, i32) nounwind {
; X86-NEXT: retl
; X86-NEXT: .LBB5_1: # %.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB5_2: # =>This Inner Loop Header: Depth=1
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal 20(,%eax,4), %eax
@ -287,7 +287,7 @@ define void @foo_zext(i1 zeroext, i32) nounwind {
; X64-NEXT: retq
; X64-NEXT: .LBB5_1: # %.preheader
; X64-NEXT: movl %esi, %eax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB5_2: # =>This Inner Loop Header: Depth=1
; X64-NEXT: incl %eax
; X64-NEXT: shlq $2, %rax

2
llvm/test/CodeGen/X86/align-basic-block-sections.mir
View File

@ -132,5 +132,5 @@ body: |
...
# CHECK: .section .text.test,"ax",@progbits,unique,2
# CHECK-NEXT: .p2align 8, 0x90
# CHECK-NEXT: .p2align 8
# CHECK-NEXT: test.__part.2: # %entry

2
llvm/test/CodeGen/X86/and-sink.ll
View File

@ -54,7 +54,7 @@ define i32 @and_sink2(i32 %a, i1 %c, i1 %c2) {
; CHECK-NEXT: # %bb.1: # %bb0.preheader
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_2: # %bb0
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl $0, B

6
llvm/test/CodeGen/X86/apx/push2-pop2.ll
View File

@ -286,7 +286,7 @@ define void @lea_in_epilog(i1 %arg, ptr %arg1, ptr %arg2, i64 %arg3, i64 %arg4,
; CHECK-NEXT: xorl %ebp, %ebp
; CHECK-NEXT: xorl %r12d, %r12d
; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB6_2: # %bb15
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: incq %r12
@ -338,7 +338,7 @@ define void @lea_in_epilog(i1 %arg, ptr %arg1, ptr %arg2, i64 %arg3, i64 %arg4,
; PPX-NEXT: xorl %ebp, %ebp
; PPX-NEXT: xorl %r12d, %r12d
; PPX-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
; PPX-NEXT: .p2align 4, 0x90
; PPX-NEXT: .p2align 4
; PPX-NEXT: .LBB6_2: # %bb15
; PPX-NEXT: # =>This Inner Loop Header: Depth=1
; PPX-NEXT: incq %r12
@ -390,7 +390,7 @@ define void @lea_in_epilog(i1 %arg, ptr %arg1, ptr %arg2, i64 %arg3, i64 %arg4,
; FRAME-NEXT: xorl %r13d, %r13d
; FRAME-NEXT: xorl %r14d, %r14d
; FRAME-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
; FRAME-NEXT: .p2align 4, 0x90
; FRAME-NEXT: .p2align 4
; FRAME-NEXT: .LBB6_2: # %bb15
; FRAME-NEXT: # =>This Inner Loop Header: Depth=1
; FRAME-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill

2
llvm/test/CodeGen/X86/apx/setzucc.ll
View File

@ -53,7 +53,7 @@ define i32 @flags_copy_lowering() nounwind {
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB4_1: # %bb1
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: addl %edx, 0

4
llvm/test/CodeGen/X86/assertzext-demanded.ll
View File

@ -7,7 +7,7 @@ define void @simplify_assertzext(ptr %0) {
; CHECK: # %bb.0: # %BB
; CHECK-NEXT: movl $275047, %eax # imm = 0x43267
; CHECK-NEXT: movb $1, %cl
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %CF246
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb %cl, %cl
@ -15,7 +15,7 @@ define void @simplify_assertzext(ptr %0) {
; CHECK-NEXT: # %bb.2: # %CF260
; CHECK-NEXT: orl $278403, %eax # imm = 0x43F83
; CHECK-NEXT: movl %eax, (%rdi)
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_3: # %CF242
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: jmp .LBB0_3

2
llvm/test/CodeGen/X86/atom-pad-short-functions.ll
View File

@ -110,7 +110,7 @@ define void @test_branch_to_same_bb(i32 %x, i32 %y) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; CHECK-NEXT: jle .LBB7_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB7_1: # %while.cond
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: jmp .LBB7_1

14
llvm/test/CodeGen/X86/atomic-bit-test.ll
View File

@ -106,7 +106,7 @@ define i64 @bts63() nounwind {
; X86-NEXT: movl $-2147483648, %esi # imm = 0x80000000
; X86-NEXT: movl v64+4, %edx
; X86-NEXT: movl v64, %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB4_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %edx, %ecx
@ -230,7 +230,7 @@ define i64 @btc63() nounwind {
; X86-NEXT: movl $-2147483648, %esi # imm = 0x80000000
; X86-NEXT: movl v64+4, %edx
; X86-NEXT: movl v64, %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB9_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %edx, %ecx
@ -360,7 +360,7 @@ define i64 @btr63() nounwind {
; X86-NEXT: movl $-1, %edi
; X86-NEXT: movl v64+4, %edx
; X86-NEXT: movl v64, %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB14_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %eax, %ebx
@ -396,7 +396,7 @@ define i16 @multi_use1() nounwind {
; X86-LABEL: multi_use1:
; X86: # %bb.0: # %entry
; X86-NEXT: movzwl v16, %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB15_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %eax, %ecx
@ -416,7 +416,7 @@ define i16 @multi_use1() nounwind {
; X64-LABEL: multi_use1:
; X64: # %bb.0: # %entry
; X64-NEXT: movzwl v16(%rip), %eax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB15_1: # %atomicrmw.start
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movl %eax, %ecx
@ -471,7 +471,7 @@ define i16 @use_in_diff_bb() nounwind {
; X86: # %bb.0: # %entry
; X86-NEXT: pushl %esi
; X86-NEXT: movzwl v16, %esi
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB17_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %esi, %ecx
@ -496,7 +496,7 @@ define i16 @use_in_diff_bb() nounwind {
; X64: # %bb.0: # %entry
; X64-NEXT: pushq %rbx
; X64-NEXT: movzwl v16(%rip), %ebx
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB17_1: # %atomicrmw.start
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movl %ebx, %ecx

2
llvm/test/CodeGen/X86/atomic-flags.ll
View File

@ -144,7 +144,7 @@ define zeroext i1 @xadd_cmp0_i64(ptr %x) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl (%esi), %eax
; X86-NEXT: movl 4(%esi), %edx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB2_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %eax, %ebx

24
llvm/test/CodeGen/X86/atomic-idempotent.ll
View File

@ -64,7 +64,7 @@ define i16 @or16(ptr %p) {
; X86-SLM: # %bb.0:
; X86-SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SLM-NEXT: movzwl (%ecx), %eax
; X86-SLM-NEXT: .p2align 4, 0x90
; X86-SLM-NEXT: .p2align 4
; X86-SLM-NEXT: .LBB1_1: # %atomicrmw.start
; X86-SLM-NEXT: # =>This Inner Loop Header: Depth=1
; X86-SLM-NEXT: lock cmpxchgw %ax, (%ecx)
@ -76,7 +76,7 @@ define i16 @or16(ptr %p) {
; X86-ATOM: # %bb.0:
; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-ATOM-NEXT: movzwl (%ecx), %eax
; X86-ATOM-NEXT: .p2align 4, 0x90
; X86-ATOM-NEXT: .p2align 4
; X86-ATOM-NEXT: .LBB1_1: # %atomicrmw.start
; X86-ATOM-NEXT: # =>This Inner Loop Header: Depth=1
; X86-ATOM-NEXT: lock cmpxchgw %ax, (%ecx)
@ -105,7 +105,7 @@ define i32 @xor32(ptr %p) {
; X86-SLM: # %bb.0:
; X86-SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SLM-NEXT: movl (%ecx), %eax
; X86-SLM-NEXT: .p2align 4, 0x90
; X86-SLM-NEXT: .p2align 4
; X86-SLM-NEXT: .LBB2_1: # %atomicrmw.start
; X86-SLM-NEXT: # =>This Inner Loop Header: Depth=1
; X86-SLM-NEXT: lock cmpxchgl %eax, (%ecx)
@ -117,7 +117,7 @@ define i32 @xor32(ptr %p) {
; X86-ATOM: # %bb.0:
; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-ATOM-NEXT: movl (%ecx), %eax
; X86-ATOM-NEXT: .p2align 4, 0x90
; X86-ATOM-NEXT: .p2align 4
; X86-ATOM-NEXT: .LBB2_1: # %atomicrmw.start
; X86-ATOM-NEXT: # =>This Inner Loop Header: Depth=1
; X86-ATOM-NEXT: lock cmpxchgl %eax, (%ecx)
@ -146,7 +146,7 @@ define i64 @sub64(ptr %p) {
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl (%esi), %eax
; X86-NEXT: movl 4(%esi), %edx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB3_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %edx, %ecx
@ -196,7 +196,7 @@ define i128 @or128(ptr %p) {
; X86-GENERIC-NEXT: movl 8(%edi), %edx
; X86-GENERIC-NEXT: movl (%edi), %ebx
; X86-GENERIC-NEXT: movl 4(%edi), %esi
; X86-GENERIC-NEXT: .p2align 4, 0x90
; X86-GENERIC-NEXT: .p2align 4
; X86-GENERIC-NEXT: .LBB4_1: # %atomicrmw.start
; X86-GENERIC-NEXT: # =>This Inner Loop Header: Depth=1
; X86-GENERIC-NEXT: movl %ebx, (%esp)
@ -257,7 +257,7 @@ define i128 @or128(ptr %p) {
; X86-ATOM-NEXT: movl 8(%edi), %edx
; X86-ATOM-NEXT: movl (%edi), %esi
; X86-ATOM-NEXT: movl 4(%edi), %ebx
; X86-ATOM-NEXT: .p2align 4, 0x90
; X86-ATOM-NEXT: .p2align 4
; X86-ATOM-NEXT: .LBB4_1: # %atomicrmw.start
; X86-ATOM-NEXT: # =>This Inner Loop Header: Depth=1
; X86-ATOM-NEXT: movl %esi, (%esp)
@ -320,7 +320,7 @@ define i32 @and32 (ptr %p) {
; X86-SLM: # %bb.0:
; X86-SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SLM-NEXT: movl (%ecx), %eax
; X86-SLM-NEXT: .p2align 4, 0x90
; X86-SLM-NEXT: .p2align 4
; X86-SLM-NEXT: .LBB5_1: # %atomicrmw.start
; X86-SLM-NEXT: # =>This Inner Loop Header: Depth=1
; X86-SLM-NEXT: lock cmpxchgl %eax, (%ecx)
@ -332,7 +332,7 @@ define i32 @and32 (ptr %p) {
; X86-ATOM: # %bb.0:
; X86-ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-ATOM-NEXT: movl (%ecx), %eax
; X86-ATOM-NEXT: .p2align 4, 0x90
; X86-ATOM-NEXT: .p2align 4
; X86-ATOM-NEXT: .LBB5_1: # %atomicrmw.start
; X86-ATOM-NEXT: # =>This Inner Loop Header: Depth=1
; X86-ATOM-NEXT: lock cmpxchgl %eax, (%ecx)
@ -495,7 +495,7 @@ define void @or64_nouse_seq_cst(ptr %p) {
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl (%esi), %eax
; X86-NEXT: movl 4(%esi), %edx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB11_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %edx, %ecx
@ -546,7 +546,7 @@ define void @or128_nouse_seq_cst(ptr %p) {
; X86-GENERIC-NEXT: movl 8(%esi), %edi
; X86-GENERIC-NEXT: movl (%esi), %edx
; X86-GENERIC-NEXT: movl 4(%esi), %ebx
; X86-GENERIC-NEXT: .p2align 4, 0x90
; X86-GENERIC-NEXT: .p2align 4
; X86-GENERIC-NEXT: .LBB12_1: # %atomicrmw.start
; X86-GENERIC-NEXT: # =>This Inner Loop Header: Depth=1
; X86-GENERIC-NEXT: movl %edx, (%esp)
@ -603,7 +603,7 @@ define void @or128_nouse_seq_cst(ptr %p) {
; X86-ATOM-NEXT: movl 8(%esi), %edx
; X86-ATOM-NEXT: movl (%esi), %eax
; X86-ATOM-NEXT: movl 4(%esi), %edi
; X86-ATOM-NEXT: .p2align 4, 0x90
; X86-ATOM-NEXT: .p2align 4
; X86-ATOM-NEXT: .LBB12_1: # %atomicrmw.start
; X86-ATOM-NEXT: # =>This Inner Loop Header: Depth=1
; X86-ATOM-NEXT: movl %eax, (%esp)

20
llvm/test/CodeGen/X86/atomic-minmax-i6432.ll
View File

@ -12,7 +12,7 @@ define i64 @atomic_max_i64() nounwind {
; LINUX-NEXT: movl sc64+4, %edx
; LINUX-NEXT: movl sc64, %eax
; LINUX-NEXT: movl $5, %esi
; LINUX-NEXT: .p2align 4, 0x90
; LINUX-NEXT: .p2align 4
; LINUX-NEXT: .LBB0_1: # %atomicrmw.start
; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; LINUX-NEXT: cmpl %eax, %esi
@ -41,7 +41,7 @@ define i64 @atomic_max_i64() nounwind {
; PIC-NEXT: movl (%esi), %eax
; PIC-NEXT: movl 4(%esi), %edx
; PIC-NEXT: movl $5, %edi
; PIC-NEXT: .p2align 4, 0x90
; PIC-NEXT: .p2align 4
; PIC-NEXT: LBB0_1: ## %atomicrmw.start
; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
; PIC-NEXT: cmpl %eax, %edi
@ -69,7 +69,7 @@ define i64 @atomic_min_i64() nounwind {
; LINUX-NEXT: pushl %ebx
; LINUX-NEXT: movl sc64+4, %edx
; LINUX-NEXT: movl sc64, %eax
; LINUX-NEXT: .p2align 4, 0x90
; LINUX-NEXT: .p2align 4
; LINUX-NEXT: .LBB1_1: # %atomicrmw.start
; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; LINUX-NEXT: cmpl $7, %eax
@ -95,7 +95,7 @@ define i64 @atomic_min_i64() nounwind {
; PIC-NEXT: movl L_sc64$non_lazy_ptr-L1$pb(%eax), %esi
; PIC-NEXT: movl (%esi), %eax
; PIC-NEXT: movl 4(%esi), %edx
; PIC-NEXT: .p2align 4, 0x90
; PIC-NEXT: .p2align 4
; PIC-NEXT: LBB1_1: ## %atomicrmw.start
; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
; PIC-NEXT: cmpl $7, %eax
@ -124,7 +124,7 @@ define i64 @atomic_umax_i64() nounwind {
; LINUX-NEXT: movl sc64+4, %edx
; LINUX-NEXT: movl sc64, %eax
; LINUX-NEXT: movl $7, %esi
; LINUX-NEXT: .p2align 4, 0x90
; LINUX-NEXT: .p2align 4
; LINUX-NEXT: .LBB2_1: # %atomicrmw.start
; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; LINUX-NEXT: cmpl %eax, %esi
@ -153,7 +153,7 @@ define i64 @atomic_umax_i64() nounwind {
; PIC-NEXT: movl (%esi), %eax
; PIC-NEXT: movl 4(%esi), %edx
; PIC-NEXT: movl $7, %edi
; PIC-NEXT: .p2align 4, 0x90
; PIC-NEXT: .p2align 4
; PIC-NEXT: LBB2_1: ## %atomicrmw.start
; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
; PIC-NEXT: cmpl %eax, %edi
@ -181,7 +181,7 @@ define i64 @atomic_umin_i64() nounwind {
; LINUX-NEXT: pushl %ebx
; LINUX-NEXT: movl sc64+4, %edx
; LINUX-NEXT: movl sc64, %eax
; LINUX-NEXT: .p2align 4, 0x90
; LINUX-NEXT: .p2align 4
; LINUX-NEXT: .LBB3_1: # %atomicrmw.start
; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; LINUX-NEXT: cmpl $9, %eax
@ -207,7 +207,7 @@ define i64 @atomic_umin_i64() nounwind {
; PIC-NEXT: movl L_sc64$non_lazy_ptr-L3$pb(%eax), %esi
; PIC-NEXT: movl (%esi), %eax
; PIC-NEXT: movl 4(%esi), %edx
; PIC-NEXT: .p2align 4, 0x90
; PIC-NEXT: .p2align 4
; PIC-NEXT: LBB3_1: ## %atomicrmw.start
; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
; PIC-NEXT: cmpl $9, %eax
@ -238,7 +238,7 @@ define void @tf_bug(ptr %ptr) nounwind {
; LINUX-NEXT: movl {{[0-9]+}}(%esp), %esi
; LINUX-NEXT: movl id+4, %edx
; LINUX-NEXT: movl id, %eax
; LINUX-NEXT: .p2align 4, 0x90
; LINUX-NEXT: .p2align 4
; LINUX-NEXT: .LBB4_1: # %atomicrmw.start
; LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; LINUX-NEXT: movl %eax, %ebx
@ -267,7 +267,7 @@ define void @tf_bug(ptr %ptr) nounwind {
; PIC-NEXT: movl {{[0-9]+}}(%esp), %esi
; PIC-NEXT: movl (_id-L4$pb)+4(%edi), %edx
; PIC-NEXT: movl _id-L4$pb(%edi), %eax
; PIC-NEXT: .p2align 4, 0x90
; PIC-NEXT: .p2align 4
; PIC-NEXT: LBB4_1: ## %atomicrmw.start
; PIC-NEXT: ## =>This Inner Loop Header: Depth=1
; PIC-NEXT: movl %eax, %ebx

6
llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll
View File

@ -16,7 +16,7 @@ define void @store_fp128(ptr %fptr, fp128 %v) {
; X64-SSE-NEXT: movq -{{[0-9]+}}(%rsp), %rcx
; X64-SSE-NEXT: movq (%rdi), %rax
; X64-SSE-NEXT: movq 8(%rdi), %rdx
; X64-SSE-NEXT: .p2align 4, 0x90
; X64-SSE-NEXT: .p2align 4
; X64-SSE-NEXT: .LBB0_1: # %atomicrmw.start
; X64-SSE-NEXT: # =>This Inner Loop Header: Depth=1
; X64-SSE-NEXT: lock cmpxchg16b (%rdi)
@ -73,7 +73,7 @@ define fp128 @exchange_fp128(ptr %fptr, fp128 %x) {
; X64-SSE-NEXT: movq -{{[0-9]+}}(%rsp), %rcx
; X64-SSE-NEXT: movq (%rdi), %rax
; X64-SSE-NEXT: movq 8(%rdi), %rdx
; X64-SSE-NEXT: .p2align 4, 0x90
; X64-SSE-NEXT: .p2align 4
; X64-SSE-NEXT: .LBB2_1: # %atomicrmw.start
; X64-SSE-NEXT: # =>This Inner Loop Header: Depth=1
; X64-SSE-NEXT: lock cmpxchg16b (%rdi)
@ -96,7 +96,7 @@ define fp128 @exchange_fp128(ptr %fptr, fp128 %x) {
; X64-AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rcx
; X64-AVX-NEXT: movq (%rdi), %rax
; X64-AVX-NEXT: movq 8(%rdi), %rdx
; X64-AVX-NEXT: .p2align 4, 0x90
; X64-AVX-NEXT: .p2align 4
; X64-AVX-NEXT: .LBB2_1: # %atomicrmw.start
; X64-AVX-NEXT: # =>This Inner Loop Header: Depth=1
; X64-AVX-NEXT: lock cmpxchg16b (%rdi)

8
llvm/test/CodeGen/X86/atomic-non-integer.ll
View File

@ -440,7 +440,7 @@ define double @exchange_double(ptr %fptr, double %x) {
; X86-SSE1-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SSE1-NEXT: movl (%esi), %eax
; X86-SSE1-NEXT: movl 4(%esi), %edx
; X86-SSE1-NEXT: .p2align 4, 0x90
; X86-SSE1-NEXT: .p2align 4
; X86-SSE1-NEXT: .LBB8_1: # %atomicrmw.start
; X86-SSE1-NEXT: # =>This Inner Loop Header: Depth=1
; X86-SSE1-NEXT: lock cmpxchg8b (%esi)
@ -472,7 +472,7 @@ define double @exchange_double(ptr %fptr, double %x) {
; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-SSE2-NEXT: movl (%esi), %eax
; X86-SSE2-NEXT: movl 4(%esi), %edx
; X86-SSE2-NEXT: .p2align 4, 0x90
; X86-SSE2-NEXT: .p2align 4
; X86-SSE2-NEXT: .LBB8_1: # %atomicrmw.start
; X86-SSE2-NEXT: # =>This Inner Loop Header: Depth=1
; X86-SSE2-NEXT: lock cmpxchg8b (%esi)
@ -506,7 +506,7 @@ define double @exchange_double(ptr %fptr, double %x) {
; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-AVX-NEXT: movl (%esi), %eax
; X86-AVX-NEXT: movl 4(%esi), %edx
; X86-AVX-NEXT: .p2align 4, 0x90
; X86-AVX-NEXT: .p2align 4
; X86-AVX-NEXT: .LBB8_1: # %atomicrmw.start
; X86-AVX-NEXT: # =>This Inner Loop Header: Depth=1
; X86-AVX-NEXT: lock cmpxchg8b (%esi)
@ -539,7 +539,7 @@ define double @exchange_double(ptr %fptr, double %x) {
; X86-NOSSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NOSSE-NEXT: movl (%esi), %eax
; X86-NOSSE-NEXT: movl 4(%esi), %edx
; X86-NOSSE-NEXT: .p2align 4, 0x90
; X86-NOSSE-NEXT: .p2align 4
; X86-NOSSE-NEXT: .LBB8_1: # %atomicrmw.start
; X86-NOSSE-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NOSSE-NEXT: lock cmpxchg8b (%esi)

74
llvm/test/CodeGen/X86/atomic-rm-bit-test-64.ll
View File

@ -27,7 +27,7 @@ define i64 @atomic_shl2_xor_64_gpr_val(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -51,7 +51,7 @@ define i64 @atomic_shl1_neq_xor_64_gpr_val(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -159,7 +159,7 @@ define i64 @atomic_blsi_xor_64_gpr_val(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: negq %rcx
; CHECK-NEXT: andq %rsi, %rcx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB7_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rdx
@ -184,7 +184,7 @@ define i64 @atomic_shl1_xor_64_gpr_valz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB8_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -214,7 +214,7 @@ define i64 @atomic_shl2_xor_64_gpr_valz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB9_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -243,7 +243,7 @@ define i64 @atomic_shl1_neq_xor_64_gpr_valz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB10_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -276,7 +276,7 @@ define i64 @atomic_shl1_small_mask_xor_64_gpr_valz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB11_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -306,7 +306,7 @@ define i64 @atomic_shl1_mask0_xor_64_gpr_valz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB12_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -336,7 +336,7 @@ define i64 @atomic_shl1_mask1_xor_64_gpr_valz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB13_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -367,7 +367,7 @@ define i64 @atomic_shl1_mask01_xor_64_gpr_valz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB14_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -397,7 +397,7 @@ define i64 @atomic_blsi_xor_64_gpr_valz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: negq %rdx
; CHECK-NEXT: andq %rsi, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB15_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -427,7 +427,7 @@ define i64 @atomic_shl1_xor_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB16_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -456,7 +456,7 @@ define i64 @atomic_shl2_xor_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB17_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -485,7 +485,7 @@ define i64 @atomic_shl1_neq_xor_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB18_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -517,7 +517,7 @@ define i64 @atomic_shl1_small_mask_xor_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB19_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -546,7 +546,7 @@ define i64 @atomic_shl1_mask0_xor_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB20_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -575,7 +575,7 @@ define i64 @atomic_shl1_mask1_xor_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB21_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -605,7 +605,7 @@ define i64 @atomic_shl1_mask01_xor_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movl $1, %edx
; CHECK-NEXT: shlq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB22_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -634,7 +634,7 @@ define i64 @atomic_blsi_xor_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: negq %rdx
; CHECK-NEXT: andq %rsi, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB23_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -686,7 +686,7 @@ define i64 @atomic_shl2_and_64_gpr_val(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: notq %rcx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB25_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -711,7 +711,7 @@ define i64 @atomic_shl1_neq_and_64_gpr_val(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq $-2, %rdx
; CHECK-NEXT: rolq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB26_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -826,7 +826,7 @@ define i64 @atomic_blsi_and_64_gpr_val(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq %rcx, %rdx
; CHECK-NEXT: notq %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB31_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -853,7 +853,7 @@ define i64 @atomic_shl1_and_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq $-2, %rdx
; CHECK-NEXT: rolq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB32_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -885,7 +885,7 @@ define i64 @atomic_shl2_and_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: notq %rcx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB33_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -915,7 +915,7 @@ define i64 @atomic_shl1_neq_and_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq $-2, %rdx
; CHECK-NEXT: rolq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB34_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -948,7 +948,7 @@ define i64 @atomic_shl1_small_mask_and_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq $-2, %rdx
; CHECK-NEXT: rolq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB35_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -978,7 +978,7 @@ define i64 @atomic_shl1_mask0_and_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq $-2, %rdx
; CHECK-NEXT: rolq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB36_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -1008,7 +1008,7 @@ define i64 @atomic_shl1_mask1_and_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq $-2, %rdx
; CHECK-NEXT: rolq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB37_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -1041,7 +1041,7 @@ define i64 @atomic_shl1_mask01_and_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: # kill: def $cl killed $cl killed $rcx
; CHECK-NEXT: rolq %cl, %rsi
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB38_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -1073,7 +1073,7 @@ define i64 @atomic_blsi_and_64_gpr_valnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: notq %rcx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB39_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -1137,7 +1137,7 @@ define i64 @atomic_shl2_and_64_gpr_brnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq %rdx, %rsi
; CHECK-NEXT: notq %rsi
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB41_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %r8
@ -1178,7 +1178,7 @@ define i64 @atomic_shl1_neq_and_64_gpr_brnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq $-2, %rdx
; CHECK-NEXT: rolq %cl, %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB42_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rsi
@ -1354,7 +1354,7 @@ define i64 @atomic_blsi_and_64_gpr_brnz(ptr %v, i64 %c) nounwind {
; CHECK-NEXT: movq %rcx, %rdx
; CHECK-NEXT: notq %rdx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB47_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %r8
@ -1420,7 +1420,7 @@ define i64 @atomic_shl1_neq_xor_64_const_br(ptr %v) nounwind {
; CHECK-LABEL: atomic_shl1_neq_xor_64_const_br:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB49_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -1483,7 +1483,7 @@ define i64 @atomic_shl1_neq_xor_64_const_brz(ptr %v) nounwind {
; CHECK-LABEL: atomic_shl1_neq_xor_64_const_brz:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB51_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -1546,7 +1546,7 @@ define i64 @atomic_shl1_neq_xor_64_const_brnz(ptr %v) nounwind {
; CHECK-LABEL: atomic_shl1_neq_xor_64_const_brnz:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB53_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rcx
@ -1583,7 +1583,7 @@ define i64 @atomic_and_with_not_arg(ptr %v, i64 %c) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq $-1, %rcx
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB54_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rdx

340
llvm/test/CodeGen/X86/atomic-rm-bit-test.ll
View File

File diff suppressed because it is too large Load Diff

8
llvm/test/CodeGen/X86/atomic-xor.ll
View File

@ -32,7 +32,7 @@ define i128 @xor128_signbit_used(ptr %p) nounwind {
; X86-NEXT: movl 8(%edi), %edx
; X86-NEXT: movl (%edi), %ebx
; X86-NEXT: movl 4(%edi), %esi
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB1_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %ebx, (%esp)
@ -94,7 +94,7 @@ define i64 @xor64_signbit_used(ptr %p) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl (%esi), %eax
; X86-NEXT: movl 4(%esi), %edx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB2_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: leal -2147483648(%edx), %ecx
@ -171,7 +171,7 @@ define i32 @xor32_not_signbit_used(ptr %p) nounwind {
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl (%ecx), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB6_1: # %atomicrmw.start
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %eax, %edx
@ -184,7 +184,7 @@ define i32 @xor32_not_signbit_used(ptr %p) nounwind {
; X64-LABEL: xor32_not_signbit_used:
; X64: # %bb.0:
; X64-NEXT: movl (%rdi), %eax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB6_1: # %atomicrmw.start
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movl %eax, %ecx

23
llvm/test/CodeGen/X86/atomic128.ll
View File

@ -47,7 +47,6 @@ define i128 @load_global_with_offset() nounwind {
; CHECK-AVX-NEXT: vmovq %xmm0, %rax
; CHECK-AVX-NEXT: vpextrq $1, %xmm0, %rdx
; CHECK-AVX-NEXT: retq
;
entry:
%0 = load atomic i128, ptr getelementptr inbounds ({i128, i128}, ptr @cmpxchg16b_global, i64 0, i32 1) acquire, align 16
ret i128 %0
@ -62,7 +61,7 @@ define void @fetch_and_nand(ptr %p, i128 %bits) {
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB2_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rdx, %rcx
@ -92,7 +91,7 @@ define void @fetch_and_or(ptr %p, i128 %bits) {
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB3_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rbx
@ -120,7 +119,7 @@ define void @fetch_and_add(ptr %p, i128 %bits) {
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB4_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rbx
@ -148,7 +147,7 @@ define void @fetch_and_sub(ptr %p, i128 %bits) {
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB5_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rax, %rbx
@ -176,7 +175,7 @@ define void @fetch_and_min(ptr %p, i128 %bits) {
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB6_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpq %rax, %rsi
@ -207,7 +206,7 @@ define void @fetch_and_max(ptr %p, i128 %bits) {
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB7_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpq %rax, %rsi
@ -238,7 +237,7 @@ define void @fetch_and_umin(ptr %p, i128 %bits) {
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB8_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpq %rax, %rsi
@ -269,7 +268,7 @@ define void @fetch_and_umax(ptr %p, i128 %bits) {
; CHECK-NEXT: movq %rdx, %r8
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movq 8(%rdi), %rdx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB9_1: ## %atomicrmw.start
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpq %rax, %rsi
@ -349,7 +348,7 @@ define void @atomic_store_seq_cst(ptr %p, i128 %in) {
; CHECK-NOAVX-NEXT: movq %rsi, %rbx
; CHECK-NOAVX-NEXT: movq (%rdi), %rax
; CHECK-NOAVX-NEXT: movq 8(%rdi), %rdx
; CHECK-NOAVX-NEXT: .p2align 4, 0x90
; CHECK-NOAVX-NEXT: .p2align 4
; CHECK-NOAVX-NEXT: LBB12_1: ## %atomicrmw.start
; CHECK-NOAVX-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NOAVX-NEXT: lock cmpxchg16b (%rdi)
@ -380,7 +379,7 @@ define void @atomic_store_release(ptr %p, i128 %in) {
; CHECK-NOAVX-NEXT: movq %rsi, %rbx
; CHECK-NOAVX-NEXT: movq (%rdi), %rax
; CHECK-NOAVX-NEXT: movq 8(%rdi), %rdx
; CHECK-NOAVX-NEXT: .p2align 4, 0x90
; CHECK-NOAVX-NEXT: .p2align 4
; CHECK-NOAVX-NEXT: LBB13_1: ## %atomicrmw.start
; CHECK-NOAVX-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NOAVX-NEXT: lock cmpxchg16b (%rdi)
@ -410,7 +409,7 @@ define void @atomic_store_relaxed(ptr %p, i128 %in) {
; CHECK-NOAVX-NEXT: movq %rsi, %rbx
; CHECK-NOAVX-NEXT: movq (%rdi), %rax
; CHECK-NOAVX-NEXT: movq 8(%rdi), %rdx
; CHECK-NOAVX-NEXT: .p2align 4, 0x90
; CHECK-NOAVX-NEXT: .p2align 4
; CHECK-NOAVX-NEXT: LBB14_1: ## %atomicrmw.start
; CHECK-NOAVX-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NOAVX-NEXT: lock cmpxchg16b (%rdi)

32
llvm/test/CodeGen/X86/atomicrmw-cond-sub-clamp.ll
View File

@ -9,7 +9,7 @@ define i8 @atomicrmw_usub_cond_i8(ptr %ptr, i8 %val) {
; CHECK-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-32-NEXT: movzbl (%edx), %eax
; CHECK-32-NEXT: jmp .LBB0_1
; CHECK-32-NEXT: .p2align 4, 0x90
; CHECK-32-NEXT: .p2align 4
; CHECK-32-NEXT: .LBB0_3: # %atomicrmw.start
; CHECK-32-NEXT: # in Loop: Header=BB0_1 Depth=1
; CHECK-32-NEXT: lock cmpxchgb %ah, (%edx)
@ -29,7 +29,7 @@ define i8 @atomicrmw_usub_cond_i8(ptr %ptr, i8 %val) {
; CHECK-64-LABEL: atomicrmw_usub_cond_i8:
; CHECK-64: # %bb.0:
; CHECK-64-NEXT: movzbl (%rdi), %eax
; CHECK-64-NEXT: .p2align 4, 0x90
; CHECK-64-NEXT: .p2align 4
; CHECK-64-NEXT: .LBB0_1: # %atomicrmw.start
; CHECK-64-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-64-NEXT: movzbl %al, %ecx
@ -55,7 +55,7 @@ define i16 @atomicrmw_usub_cond_i16(ptr %ptr, i16 %val) {
; CHECK-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-32-NEXT: movzwl (%edx), %eax
; CHECK-32-NEXT: jmp .LBB1_1
; CHECK-32-NEXT: .p2align 4, 0x90
; CHECK-32-NEXT: .p2align 4
; CHECK-32-NEXT: .LBB1_3: # %atomicrmw.start
; CHECK-32-NEXT: # in Loop: Header=BB1_1 Depth=1
; CHECK-32-NEXT: # kill: def $ax killed $ax killed $eax
@ -80,7 +80,7 @@ define i16 @atomicrmw_usub_cond_i16(ptr %ptr, i16 %val) {
; CHECK-64-LABEL: atomicrmw_usub_cond_i16:
; CHECK-64: # %bb.0:
; CHECK-64-NEXT: movzwl (%rdi), %eax
; CHECK-64-NEXT: .p2align 4, 0x90
; CHECK-64-NEXT: .p2align 4
; CHECK-64-NEXT: .LBB1_1: # %atomicrmw.start
; CHECK-64-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-64-NEXT: movl %eax, %ecx
@ -107,7 +107,7 @@ define i32 @atomicrmw_usub_cond_i32(ptr %ptr, i32 %val) {
; CHECK-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-32-NEXT: movl (%edx), %eax
; CHECK-32-NEXT: jmp .LBB2_1
; CHECK-32-NEXT: .p2align 4, 0x90
; CHECK-32-NEXT: .p2align 4
; CHECK-32-NEXT: .LBB2_3: # %atomicrmw.start
; CHECK-32-NEXT: # in Loop: Header=BB2_1 Depth=1
; CHECK-32-NEXT: lock cmpxchgl %esi, (%edx)
@ -129,7 +129,7 @@ define i32 @atomicrmw_usub_cond_i32(ptr %ptr, i32 %val) {
; CHECK-64-LABEL: atomicrmw_usub_cond_i32:
; CHECK-64: # %bb.0:
; CHECK-64-NEXT: movl (%rdi), %eax
; CHECK-64-NEXT: .p2align 4, 0x90
; CHECK-64-NEXT: .p2align 4
; CHECK-64-NEXT: .LBB2_1: # %atomicrmw.start
; CHECK-64-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-64-NEXT: movl %eax, %ecx
@ -164,7 +164,7 @@ define i64 @atomicrmw_usub_cond_i64(ptr %ptr, i64 %val) {
; CHECK-32-NEXT: movl (%ebp), %eax
; CHECK-32-NEXT: movl 4(%ebp), %edx
; CHECK-32-NEXT: jmp .LBB3_1
; CHECK-32-NEXT: .p2align 4, 0x90
; CHECK-32-NEXT: .p2align 4
; CHECK-32-NEXT: .LBB3_3: # %atomicrmw.start
; CHECK-32-NEXT: # in Loop: Header=BB3_1 Depth=1
; CHECK-32-NEXT: lock cmpxchg8b (%ebp)
@ -195,7 +195,7 @@ define i64 @atomicrmw_usub_cond_i64(ptr %ptr, i64 %val) {
; CHECK-64-LABEL: atomicrmw_usub_cond_i64:
; CHECK-64: # %bb.0:
; CHECK-64-NEXT: movq (%rdi), %rax
; CHECK-64-NEXT: .p2align 4, 0x90
; CHECK-64-NEXT: .p2align 4
; CHECK-64-NEXT: .LBB3_1: # %atomicrmw.start
; CHECK-64-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-64-NEXT: movq %rax, %rcx
@ -219,7 +219,7 @@ define i8 @atomicrmw_usub_sat_i8(ptr %ptr, i8 %val) {
; CHECK-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-32-NEXT: movzbl (%edx), %eax
; CHECK-32-NEXT: jmp .LBB4_1
; CHECK-32-NEXT: .p2align 4, 0x90
; CHECK-32-NEXT: .p2align 4
; CHECK-32-NEXT: .LBB4_3: # %atomicrmw.start
; CHECK-32-NEXT: # in Loop: Header=BB4_1 Depth=1
; CHECK-32-NEXT: lock cmpxchgb %bl, (%edx)
@ -241,7 +241,7 @@ define i8 @atomicrmw_usub_sat_i8(ptr %ptr, i8 %val) {
; CHECK-64: # %bb.0:
; CHECK-64-NEXT: movzbl (%rdi), %eax
; CHECK-64-NEXT: xorl %ecx, %ecx
; CHECK-64-NEXT: .p2align 4, 0x90
; CHECK-64-NEXT: .p2align 4
; CHECK-64-NEXT: .LBB4_1: # %atomicrmw.start
; CHECK-64-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-64-NEXT: movl %eax, %edx
@ -269,7 +269,7 @@ define i16 @atomicrmw_usub_sat_i16(ptr %ptr, i16 %val) {
; CHECK-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-32-NEXT: movzwl (%edx), %eax
; CHECK-32-NEXT: jmp .LBB5_1
; CHECK-32-NEXT: .p2align 4, 0x90
; CHECK-32-NEXT: .p2align 4
; CHECK-32-NEXT: .LBB5_3: # %atomicrmw.start
; CHECK-32-NEXT: # in Loop: Header=BB5_1 Depth=1
; CHECK-32-NEXT: lock cmpxchgw %si, (%edx)
@ -295,7 +295,7 @@ define i16 @atomicrmw_usub_sat_i16(ptr %ptr, i16 %val) {
; CHECK-64: # %bb.0:
; CHECK-64-NEXT: movzwl (%rdi), %eax
; CHECK-64-NEXT: xorl %ecx, %ecx
; CHECK-64-NEXT: .p2align 4, 0x90
; CHECK-64-NEXT: .p2align 4
; CHECK-64-NEXT: .LBB5_1: # %atomicrmw.start
; CHECK-64-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-64-NEXT: movl %eax, %edx
@ -322,7 +322,7 @@ define i32 @atomicrmw_usub_sat_i32(ptr %ptr, i32 %val) {
; CHECK-32-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-32-NEXT: movl (%edx), %eax
; CHECK-32-NEXT: jmp .LBB6_1
; CHECK-32-NEXT: .p2align 4, 0x90
; CHECK-32-NEXT: .p2align 4
; CHECK-32-NEXT: .LBB6_3: # %atomicrmw.start
; CHECK-32-NEXT: # in Loop: Header=BB6_1 Depth=1
; CHECK-32-NEXT: lock cmpxchgl %esi, (%edx)
@ -348,7 +348,7 @@ define i32 @atomicrmw_usub_sat_i32(ptr %ptr, i32 %val) {
; CHECK-64: # %bb.0:
; CHECK-64-NEXT: movl (%rdi), %eax
; CHECK-64-NEXT: xorl %ecx, %ecx
; CHECK-64-NEXT: .p2align 4, 0x90
; CHECK-64-NEXT: .p2align 4
; CHECK-64-NEXT: .LBB6_1: # %atomicrmw.start
; CHECK-64-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-64-NEXT: movl %eax, %edx
@ -381,7 +381,7 @@ define i64 @atomicrmw_usub_sat_i64(ptr %ptr, i64 %val) {
; CHECK-32-NEXT: movl (%ebp), %esi
; CHECK-32-NEXT: movl 4(%ebp), %edi
; CHECK-32-NEXT: jmp .LBB7_1
; CHECK-32-NEXT: .p2align 4, 0x90
; CHECK-32-NEXT: .p2align 4
; CHECK-32-NEXT: .LBB7_3: # %atomicrmw.start
; CHECK-32-NEXT: # in Loop: Header=BB7_1 Depth=1
; CHECK-32-NEXT: movl %esi, %eax
@ -421,7 +421,7 @@ define i64 @atomicrmw_usub_sat_i64(ptr %ptr, i64 %val) {
; CHECK-64: # %bb.0:
; CHECK-64-NEXT: movq (%rdi), %rax
; CHECK-64-NEXT: xorl %ecx, %ecx
; CHECK-64-NEXT: .p2align 4, 0x90
; CHECK-64-NEXT: .p2align 4
; CHECK-64-NEXT: .LBB7_1: # %atomicrmw.start
; CHECK-64-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-64-NEXT: movq %rax, %rdx

4
llvm/test/CodeGen/X86/atomicrmw-fadd-fp-vector.ll
View File

@ -13,7 +13,7 @@ define <2 x half> @test_atomicrmw_fadd_v2f16_align4(ptr addrspace(1) %ptr, <2 x
; CHECK-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: pinsrw $0, 2(%rdi), %xmm1
; CHECK-NEXT: pinsrw $0, (%rdi), %xmm0
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
@ -65,7 +65,7 @@ define <2 x float> @test_atomicrmw_fadd_v2f32_align8(ptr addrspace(1) %ptr, <2 x
; CHECK-LABEL: test_atomicrmw_fadd_v2f32_align8:
; CHECK: # %bb.0:
; CHECK-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %xmm1, %rax

16
llvm/test/CodeGen/X86/atomicrmw-uinc-udec-wrap.ll
View File

@ -6,7 +6,7 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl (%rdi), %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leal 1(%rax), %edx
@ -29,7 +29,7 @@ define i16 @atomicrmw_uinc_wrap_i16(ptr %ptr, i16 %val) {
; CHECK: # %bb.0:
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leal 1(%rax), %edx
@ -51,7 +51,7 @@ define i32 @atomicrmw_uinc_wrap_i32(ptr %ptr, i32 %val) {
; CHECK: # %bb.0:
; CHECK-NEXT: movl (%rdi), %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leal 1(%rax), %edx
@ -73,7 +73,7 @@ define i64 @atomicrmw_uinc_wrap_i64(ptr %ptr, i64 %val) {
; CHECK: # %bb.0:
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB3_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leaq 1(%rax), %rdx
@ -92,7 +92,7 @@ define i8 @atomicrmw_udec_wrap_i8(ptr %ptr, i8 %val) {
; CHECK: # %bb.0:
; CHECK-NEXT: movzbl (%rdi), %eax
; CHECK-NEXT: movzbl %sil, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB4_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %eax, %edx
@ -114,7 +114,7 @@ define i16 @atomicrmw_udec_wrap_i16(ptr %ptr, i16 %val) {
; CHECK-LABEL: atomicrmw_udec_wrap_i16:
; CHECK: # %bb.0:
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB5_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %eax, %ecx
@ -135,7 +135,7 @@ define i32 @atomicrmw_udec_wrap_i32(ptr %ptr, i32 %val) {
; CHECK-LABEL: atomicrmw_udec_wrap_i32:
; CHECK: # %bb.0:
; CHECK-NEXT: movl (%rdi), %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB6_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leal -1(%rax), %ecx
@ -158,7 +158,7 @@ define i64 @atomicrmw_udec_wrap_i64(ptr %ptr, i64 %val) {
; CHECK-LABEL: atomicrmw_udec_wrap_i64:
; CHECK: # %bb.0:
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB7_1: # %atomicrmw.start
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leaq -1(%rax), %rcx

2
llvm/test/CodeGen/X86/avx-cmp.ll
View File

@ -34,7 +34,7 @@ define void @render(double %a0) nounwind {
; CHECK-NEXT: jne .LBB2_5
; CHECK-NEXT: # %bb.1: # %for.cond5.preheader
; CHECK-NEXT: movb $1, %bl
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_2: # %for.cond5
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb %bl, %bl

4
llvm/test/CodeGen/X86/avx-vbroadcast.ll
View File

@ -923,7 +923,7 @@ define void @fmul_by_v2f32_broadcast() nounwind {
; X86-NEXT: vmovddup {{.*#+}} xmm0 = [3.1E+1,0.0E+0,3.1E+1,0.0E+0]
; X86-NEXT: ## xmm0 = mem[0,0]
; X86-NEXT: ## implicit-def: $xmm1
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: LBB42_1: ## =>This Inner Loop Header: Depth=1
; X86-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero
; X86-NEXT: vmulps %xmm0, %xmm2, %xmm2
@ -937,7 +937,7 @@ define void @fmul_by_v2f32_broadcast() nounwind {
; X64-NEXT: vmovddup {{.*#+}} xmm0 = [3.1E+1,0.0E+0,3.1E+1,0.0E+0]
; X64-NEXT: ## xmm0 = mem[0,0]
; X64-NEXT: ## implicit-def: $xmm1
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: LBB42_1: ## =>This Inner Loop Header: Depth=1
; X64-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero
; X64-NEXT: vmulps %xmm0, %xmm2, %xmm2

16
llvm/test/CodeGen/X86/avx-vzeroupper.ll
View File

@ -131,7 +131,7 @@ define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind {
; VZ-NEXT: subq $16, %rsp
; VZ-NEXT: vaddps %xmm1, %xmm0, %xmm0
; VZ-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; VZ-NEXT: .p2align 4, 0x90
; VZ-NEXT: .p2align 4
; VZ-NEXT: .LBB3_1: # %while.cond
; VZ-NEXT: # =>This Inner Loop Header: Depth=1
; VZ-NEXT: callq foo
@ -140,7 +140,7 @@ define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind {
; VZ-NEXT: # %bb.2: # %for.body.preheader
; VZ-NEXT: movl $4, %ebx
; VZ-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
; VZ-NEXT: .p2align 4, 0x90
; VZ-NEXT: .p2align 4
; VZ-NEXT: .LBB3_3: # %for.body
; VZ-NEXT: # =>This Inner Loop Header: Depth=1
; VZ-NEXT: callq do_sse
@ -160,7 +160,7 @@ define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind {
; DISABLE-VZ-NEXT: subq $16, %rsp
; DISABLE-VZ-NEXT: vaddps %xmm1, %xmm0, %xmm0
; DISABLE-VZ-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; DISABLE-VZ-NEXT: .p2align 4, 0x90
; DISABLE-VZ-NEXT: .p2align 4
; DISABLE-VZ-NEXT: .LBB3_1: # %while.cond
; DISABLE-VZ-NEXT: # =>This Inner Loop Header: Depth=1
; DISABLE-VZ-NEXT: callq foo
@ -169,7 +169,7 @@ define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind {
; DISABLE-VZ-NEXT: # %bb.2: # %for.body.preheader
; DISABLE-VZ-NEXT: movl $4, %ebx
; DISABLE-VZ-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
; DISABLE-VZ-NEXT: .p2align 4, 0x90
; DISABLE-VZ-NEXT: .p2align 4
; DISABLE-VZ-NEXT: .LBB3_3: # %for.body
; DISABLE-VZ-NEXT: # =>This Inner Loop Header: Depth=1
; DISABLE-VZ-NEXT: callq do_sse
@ -189,7 +189,7 @@ define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind {
; BDVER2-NEXT: subq $16, %rsp
; BDVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0
; BDVER2-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; BDVER2-NEXT: .p2align 4, 0x90
; BDVER2-NEXT: .p2align 4
; BDVER2-NEXT: .LBB3_1: # %while.cond
; BDVER2-NEXT: # =>This Inner Loop Header: Depth=1
; BDVER2-NEXT: callq foo
@ -198,7 +198,7 @@ define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind {
; BDVER2-NEXT: # %bb.2: # %for.body.preheader
; BDVER2-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
; BDVER2-NEXT: movl $4, %ebx
; BDVER2-NEXT: .p2align 4, 0x90
; BDVER2-NEXT: .p2align 4
; BDVER2-NEXT: .LBB3_3: # %for.body
; BDVER2-NEXT: # =>This Inner Loop Header: Depth=1
; BDVER2-NEXT: callq do_sse
@ -218,7 +218,7 @@ define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind {
; BTVER2-NEXT: subq $16, %rsp
; BTVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0
; BTVER2-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
; BTVER2-NEXT: .p2align 4, 0x90
; BTVER2-NEXT: .p2align 4
; BTVER2-NEXT: .LBB3_1: # %while.cond
; BTVER2-NEXT: # =>This Inner Loop Header: Depth=1
; BTVER2-NEXT: callq foo
@ -227,7 +227,7 @@ define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind {
; BTVER2-NEXT: # %bb.2: # %for.body.preheader
; BTVER2-NEXT: vmovaps (%rsp), %xmm0 # 16-byte Reload
; BTVER2-NEXT: movl $4, %ebx
; BTVER2-NEXT: .p2align 4, 0x90
; BTVER2-NEXT: .p2align 4
; BTVER2-NEXT: .LBB3_3: # %for.body
; BTVER2-NEXT: # =>This Inner Loop Header: Depth=1
; BTVER2-NEXT: callq do_sse

4
llvm/test/CodeGen/X86/avx2-vbroadcast.ll
View File

@ -683,7 +683,7 @@ define void @crash() nounwind alwaysinline {
; X86-NEXT: je LBB33_1
; X86-NEXT: ## %bb.2: ## %ret
; X86-NEXT: retl
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: LBB33_1: ## %footer329VF
; X86-NEXT: ## =>This Inner Loop Header: Depth=1
; X86-NEXT: jmp LBB33_1
@ -695,7 +695,7 @@ define void @crash() nounwind alwaysinline {
; X64-NEXT: je LBB33_1
; X64-NEXT: ## %bb.2: ## %ret
; X64-NEXT: retq
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: LBB33_1: ## %footer329VF
; X64-NEXT: ## =>This Inner Loop Header: Depth=1
; X64-NEXT: jmp LBB33_1

264
llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
View File

File diff suppressed because it is too large Load Diff

2
llvm/test/CodeGen/X86/avx512-i1test.ll
View File

@ -15,7 +15,7 @@ define void @func() {
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB0_1: # %bb56
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %bb33
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb %al, %al

6
llvm/test/CodeGen/X86/avx512vnni-combine.ll
View File

@ -54,7 +54,7 @@ define <8 x i64> @foo_512(i32 %0, <8 x i64> %1, <8 x i64> %2, ptr %3) {
; CHECK-NEXT: andl $-4, %edx
; CHECK-NEXT: leaq 192(%rsi), %rdi
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_8: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vpdpwssd -192(%rdi), %zmm1, %zmm0
; CHECK-NEXT: vpmaddwd -128(%rdi), %zmm1, %zmm2
@ -75,7 +75,7 @@ define <8 x i64> @foo_512(i32 %0, <8 x i64> %1, <8 x i64> %2, ptr %3) {
; CHECK-NEXT: addq %rcx, %rsi
; CHECK-NEXT: shll $6, %eax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_5: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vpdpwssd (%rsi,%rcx), %zmm1, %zmm0
; CHECK-NEXT: addq $64, %rcx
@ -179,7 +179,7 @@ define void @bar_512(i32 %0, ptr %1, <8 x i64> %2, ptr %3) {
; CHECK-NEXT: andl $-2, %edi
; CHECK-NEXT: movl $64, %r8d
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_7: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vmovdqa64 (%rsi,%r8), %zmm1
; CHECK-NEXT: vpmaddwd -64(%rdx,%r8), %zmm0, %zmm2

24
llvm/test/CodeGen/X86/avxvnni-combine.ll
View File

@ -59,7 +59,7 @@ define <2 x i64> @foo_128(i32 %0, <2 x i64> %1, <2 x i64> %2, ptr %3) {
; AVX-NEXT: andl $-4, %edx
; AVX-NEXT: leaq 48(%rsi), %rdi
; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB1_8: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: {vex} vpdpwssd -48(%rdi), %xmm1, %xmm0
; AVX-NEXT: vpmaddwd -32(%rdi), %xmm1, %xmm2
@ -80,7 +80,7 @@ define <2 x i64> @foo_128(i32 %0, <2 x i64> %1, <2 x i64> %2, ptr %3) {
; AVX-NEXT: addq %rcx, %rsi
; AVX-NEXT: shll $4, %eax
; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB1_5: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: {vex} vpdpwssd (%rsi,%rcx), %xmm1, %xmm0
; AVX-NEXT: addq $16, %rcx
@ -106,7 +106,7 @@ define <2 x i64> @foo_128(i32 %0, <2 x i64> %1, <2 x i64> %2, ptr %3) {
; AVX512-NEXT: andl $-4, %edx
; AVX512-NEXT: leaq 48(%rsi), %rdi
; AVX512-NEXT: xorl %ecx, %ecx
; AVX512-NEXT: .p2align 4, 0x90
; AVX512-NEXT: .p2align 4
; AVX512-NEXT: .LBB1_8: # =>This Inner Loop Header: Depth=1
; AVX512-NEXT: vpdpwssd -48(%rdi), %xmm1, %xmm0
; AVX512-NEXT: vpmaddwd -32(%rdi), %xmm1, %xmm2
@ -127,7 +127,7 @@ define <2 x i64> @foo_128(i32 %0, <2 x i64> %1, <2 x i64> %2, ptr %3) {
; AVX512-NEXT: addq %rcx, %rsi
; AVX512-NEXT: shll $4, %eax
; AVX512-NEXT: xorl %ecx, %ecx
; AVX512-NEXT: .p2align 4, 0x90
; AVX512-NEXT: .p2align 4
; AVX512-NEXT: .LBB1_5: # =>This Inner Loop Header: Depth=1
; AVX512-NEXT: vpdpwssd (%rsi,%rcx), %xmm1, %xmm0
; AVX512-NEXT: addq $16, %rcx
@ -225,7 +225,7 @@ define void @bar_128(i32 %0, ptr %1, <2 x i64> %2, ptr %3) {
; AVX-NEXT: andl $-2, %edi
; AVX-NEXT: movl $16, %r8d
; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB2_7: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: vmovdqa (%rsi,%r8), %xmm1
; AVX-NEXT: vpmaddwd -16(%rdx,%r8), %xmm0, %xmm2
@ -265,7 +265,7 @@ define void @bar_128(i32 %0, ptr %1, <2 x i64> %2, ptr %3) {
; AVX512-NEXT: andl $-2, %edi
; AVX512-NEXT: movl $16, %r8d
; AVX512-NEXT: xorl %ecx, %ecx
; AVX512-NEXT: .p2align 4, 0x90
; AVX512-NEXT: .p2align 4
; AVX512-NEXT: .LBB2_7: # =>This Inner Loop Header: Depth=1
; AVX512-NEXT: vmovdqa (%rsi,%r8), %xmm1
; AVX512-NEXT: vpmaddwd -16(%rdx,%r8), %xmm0, %xmm2
@ -406,7 +406,7 @@ define <4 x i64> @foo_256(i32 %0, <4 x i64> %1, <4 x i64> %2, ptr %3) {
; AVX-NEXT: andl $-4, %edx
; AVX-NEXT: leaq 96(%rsi), %rdi
; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB4_8: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: {vex} vpdpwssd -96(%rdi), %ymm1, %ymm0
; AVX-NEXT: vpmaddwd -64(%rdi), %ymm1, %ymm2
@ -427,7 +427,7 @@ define <4 x i64> @foo_256(i32 %0, <4 x i64> %1, <4 x i64> %2, ptr %3) {
; AVX-NEXT: addq %rcx, %rsi
; AVX-NEXT: shll $5, %eax
; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB4_5: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: {vex} vpdpwssd (%rsi,%rcx), %ymm1, %ymm0
; AVX-NEXT: addq $32, %rcx
@ -453,7 +453,7 @@ define <4 x i64> @foo_256(i32 %0, <4 x i64> %1, <4 x i64> %2, ptr %3) {
; AVX512-NEXT: andl $-4, %edx
; AVX512-NEXT: leaq 96(%rsi), %rdi
; AVX512-NEXT: xorl %ecx, %ecx
; AVX512-NEXT: .p2align 4, 0x90
; AVX512-NEXT: .p2align 4
; AVX512-NEXT: .LBB4_8: # =>This Inner Loop Header: Depth=1
; AVX512-NEXT: vpdpwssd -96(%rdi), %ymm1, %ymm0
; AVX512-NEXT: vpmaddwd -64(%rdi), %ymm1, %ymm2
@ -474,7 +474,7 @@ define <4 x i64> @foo_256(i32 %0, <4 x i64> %1, <4 x i64> %2, ptr %3) {
; AVX512-NEXT: addq %rcx, %rsi
; AVX512-NEXT: shll $5, %eax
; AVX512-NEXT: xorl %ecx, %ecx
; AVX512-NEXT: .p2align 4, 0x90
; AVX512-NEXT: .p2align 4
; AVX512-NEXT: .LBB4_5: # =>This Inner Loop Header: Depth=1
; AVX512-NEXT: vpdpwssd (%rsi,%rcx), %ymm1, %ymm0
; AVX512-NEXT: addq $32, %rcx
@ -579,7 +579,7 @@ define void @bar_256(i32 %0, ptr %1, <4 x i64> %2, ptr %3) {
; AVX-NEXT: andl $-2, %edi
; AVX-NEXT: movl $32, %r8d
; AVX-NEXT: xorl %ecx, %ecx
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB5_7: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: vmovdqa (%rsi,%r8), %ymm1
; AVX-NEXT: vpmaddwd -32(%rdx,%r8), %ymm0, %ymm2
@ -620,7 +620,7 @@ define void @bar_256(i32 %0, ptr %1, <4 x i64> %2, ptr %3) {
; AVX512-NEXT: andl $-2, %edi
; AVX512-NEXT: movl $32, %r8d
; AVX512-NEXT: xorl %ecx, %ecx
; AVX512-NEXT: .p2align 4, 0x90
; AVX512-NEXT: .p2align 4
; AVX512-NEXT: .LBB5_7: # =>This Inner Loop Header: Depth=1
; AVX512-NEXT: vmovdqa (%rsi,%r8), %ymm1
; AVX512-NEXT: vpmaddwd -32(%rdx,%r8), %ymm0, %ymm2

6
llvm/test/CodeGen/X86/block-placement.ll
View File

@ -251,7 +251,7 @@ define i32 @test_loop_align(i32 %i, ptr %a) {
; pass.
; CHECK-LABEL: test_loop_align:
; CHECK: %entry
; CHECK: .p2align [[ALIGN:[0-9]+]],
; CHECK: .p2align [[ALIGN:[0-9]+]]
; CHECK-NEXT: %body
; CHECK: %exit
@ -276,9 +276,9 @@ define i32 @test_nested_loop_align(i32 %i, ptr %a, ptr %b) {
; Check that we provide nested loop body alignment.
; CHECK-LABEL: test_nested_loop_align:
; CHECK: %entry
; CHECK: .p2align [[ALIGN]],
; CHECK: .p2align [[ALIGN]]
; CHECK-NEXT: %loop.body.1
; CHECK: .p2align [[ALIGN]],
; CHECK: .p2align [[ALIGN]]
; CHECK-NEXT: %inner.loop.body
; CHECK-NOT: .p2align
; CHECK: %exit

40
llvm/test/CodeGen/X86/break-false-dep.ll
View File

@ -138,7 +138,7 @@ define dso_local float @loopdep1(i32 %m) nounwind uwtable readnone ssp {
; SSE-LINUX-NEXT: movl $1, %eax
; SSE-LINUX-NEXT: xorps %xmm0, %xmm0
; SSE-LINUX-NEXT: xorps %xmm1, %xmm1
; SSE-LINUX-NEXT: .p2align 4, 0x90
; SSE-LINUX-NEXT: .p2align 4
; SSE-LINUX-NEXT: .LBB6_3: # %for.body
; SSE-LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-LINUX-NEXT: xorps %xmm2, %xmm2
@ -167,7 +167,7 @@ define dso_local float @loopdep1(i32 %m) nounwind uwtable readnone ssp {
; SSE-WIN-NEXT: movl $1, %eax
; SSE-WIN-NEXT: xorps %xmm0, %xmm0
; SSE-WIN-NEXT: xorps %xmm1, %xmm1
; SSE-WIN-NEXT: .p2align 4, 0x90
; SSE-WIN-NEXT: .p2align 4
; SSE-WIN-NEXT: .LBB6_3: # %for.body
; SSE-WIN-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-WIN-NEXT: xorps %xmm2, %xmm2
@ -196,7 +196,7 @@ define dso_local float @loopdep1(i32 %m) nounwind uwtable readnone ssp {
; AVX1-NEXT: movl $1, %eax
; AVX1-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX1-NEXT: .p2align 4, 0x90
; AVX1-NEXT: .p2align 4
; AVX1-NEXT: .LBB6_3: # %for.body
; AVX1-NEXT: # =>This Inner Loop Header: Depth=1
; AVX1-NEXT: vcvtsi2ss %eax, %xmm4, %xmm2
@ -223,7 +223,7 @@ define dso_local float @loopdep1(i32 %m) nounwind uwtable readnone ssp {
; AVX512VL-NEXT: movl $1, %eax
; AVX512VL-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX512VL-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: .p2align 4, 0x90
; AVX512VL-NEXT: .p2align 4
; AVX512VL-NEXT: .LBB6_3: # %for.body
; AVX512VL-NEXT: # =>This Inner Loop Header: Depth=1
; AVX512VL-NEXT: vcvtsi2ss %eax, %xmm3, %xmm2
@ -276,7 +276,7 @@ define i64 @loopdep2(ptr nocapture %x, ptr nocapture %y) nounwind {
; SSE-LINUX: # %bb.0: # %entry
; SSE-LINUX-NEXT: movq (%rdi), %rax
; SSE-LINUX-NEXT: movl $1, %ecx
; SSE-LINUX-NEXT: .p2align 4, 0x90
; SSE-LINUX-NEXT: .p2align 4
; SSE-LINUX-NEXT: .LBB7_1: # %loop
; SSE-LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-LINUX-NEXT: xorps %xmm0, %xmm0
@ -310,7 +310,7 @@ define i64 @loopdep2(ptr nocapture %x, ptr nocapture %y) nounwind {
; SSE-WIN-NEXT: movaps %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-WIN-NEXT: movq (%rcx), %rax
; SSE-WIN-NEXT: movl $1, %ecx
; SSE-WIN-NEXT: .p2align 4, 0x90
; SSE-WIN-NEXT: .p2align 4
; SSE-WIN-NEXT: .LBB7_1: # %loop
; SSE-WIN-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-WIN-NEXT: xorps %xmm0, %xmm0
@ -355,7 +355,7 @@ define i64 @loopdep2(ptr nocapture %x, ptr nocapture %y) nounwind {
; AVX-NEXT: vmovaps %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX-NEXT: movq (%rcx), %rax
; AVX-NEXT: movl $1, %ecx
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB7_1: # %loop
; AVX-NEXT: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
@ -418,12 +418,12 @@ define dso_local void @loopdep3() {
; SSE-LINUX-LABEL: loopdep3:
; SSE-LINUX: # %bb.0: # %entry
; SSE-LINUX-NEXT: xorl %eax, %eax
; SSE-LINUX-NEXT: .p2align 4, 0x90
; SSE-LINUX-NEXT: .p2align 4
; SSE-LINUX-NEXT: .LBB8_1: # %for.cond1.preheader
; SSE-LINUX-NEXT: # =>This Loop Header: Depth=1
; SSE-LINUX-NEXT: # Child Loop BB8_2 Depth 2
; SSE-LINUX-NEXT: movq $-4096, %rcx # imm = 0xF000
; SSE-LINUX-NEXT: .p2align 4, 0x90
; SSE-LINUX-NEXT: .p2align 4
; SSE-LINUX-NEXT: .LBB8_2: # %for.body3
; SSE-LINUX-NEXT: # Parent Loop BB8_1 Depth=1
; SSE-LINUX-NEXT: # => This Inner Loop Header: Depth=2
@ -478,13 +478,13 @@ define dso_local void @loopdep3() {
; SSE-WIN-NEXT: leaq y(%rip), %r8
; SSE-WIN-NEXT: leaq z(%rip), %r9
; SSE-WIN-NEXT: leaq w(%rip), %r10
; SSE-WIN-NEXT: .p2align 4, 0x90
; SSE-WIN-NEXT: .p2align 4
; SSE-WIN-NEXT: .LBB8_1: # %for.cond1.preheader
; SSE-WIN-NEXT: # =>This Loop Header: Depth=1
; SSE-WIN-NEXT: # Child Loop BB8_2 Depth 2
; SSE-WIN-NEXT: movq %rcx, %r11
; SSE-WIN-NEXT: xorl %esi, %esi
; SSE-WIN-NEXT: .p2align 4, 0x90
; SSE-WIN-NEXT: .p2align 4
; SSE-WIN-NEXT: .LBB8_2: # %for.body3
; SSE-WIN-NEXT: # Parent Loop BB8_1 Depth=1
; SSE-WIN-NEXT: # => This Inner Loop Header: Depth=2
@ -554,13 +554,13 @@ define dso_local void @loopdep3() {
; AVX-NEXT: leaq y(%rip), %r8
; AVX-NEXT: leaq z(%rip), %r9
; AVX-NEXT: leaq w(%rip), %r10
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB8_1: # %for.cond1.preheader
; AVX-NEXT: # =>This Loop Header: Depth=1
; AVX-NEXT: # Child Loop BB8_2 Depth 2
; AVX-NEXT: movq %rcx, %r11
; AVX-NEXT: xorl %esi, %esi
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB8_2: # %for.body3
; AVX-NEXT: # Parent Loop BB8_1 Depth=1
; AVX-NEXT: # => This Inner Loop Header: Depth=2
@ -1114,7 +1114,7 @@ define i64 @loopclearence(ptr nocapture %x, ptr nocapture %y) nounwind {
; SSE-LINUX: # %bb.0: # %entry
; SSE-LINUX-NEXT: movq (%rdi), %rax
; SSE-LINUX-NEXT: movl $1, %ecx
; SSE-LINUX-NEXT: .p2align 4, 0x90
; SSE-LINUX-NEXT: .p2align 4
; SSE-LINUX-NEXT: .LBB12_1: # %loop
; SSE-LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-LINUX-NEXT: xorps %xmm4, %xmm4
@ -1155,7 +1155,7 @@ define i64 @loopclearence(ptr nocapture %x, ptr nocapture %y) nounwind {
; SSE-WIN-NEXT: movaps %xmm8, (%rsp) # 16-byte Spill
; SSE-WIN-NEXT: movq (%rcx), %rax
; SSE-WIN-NEXT: movl $1, %ecx
; SSE-WIN-NEXT: .p2align 4, 0x90
; SSE-WIN-NEXT: .p2align 4
; SSE-WIN-NEXT: .LBB12_1: # %loop
; SSE-WIN-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-WIN-NEXT: xorps %xmm4, %xmm4
@ -1205,7 +1205,7 @@ define i64 @loopclearence(ptr nocapture %x, ptr nocapture %y) nounwind {
; AVX-NEXT: vmovaps %xmm8, (%rsp) # 16-byte Spill
; AVX-NEXT: movq (%rcx), %rax
; AVX-NEXT: movl $1, %ecx
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB12_1: # %loop
; AVX-NEXT: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: vcvtsi2sd %rcx, %xmm5, %xmm4
@ -1288,7 +1288,7 @@ define dso_local void @loopclearance2(ptr nocapture %y, ptr %x, double %c1, doub
; SSE-LINUX-NEXT: #NO_APP
; SSE-LINUX-NEXT: movl $1, %eax
; SSE-LINUX-NEXT: xorl %ecx, %ecx
; SSE-LINUX-NEXT: .p2align 4, 0x90
; SSE-LINUX-NEXT: .p2align 4
; SSE-LINUX-NEXT: .LBB13_1: # %inner_loop
; SSE-LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-LINUX-NEXT: movq %rcx, %r8
@ -1360,7 +1360,7 @@ define dso_local void @loopclearance2(ptr nocapture %y, ptr %x, double %c1, doub
; SSE-WIN-NEXT: #NO_APP
; SSE-WIN-NEXT: movl $1, %r8d
; SSE-WIN-NEXT: xorl %r9d, %r9d
; SSE-WIN-NEXT: .p2align 4, 0x90
; SSE-WIN-NEXT: .p2align 4
; SSE-WIN-NEXT: .LBB13_1: # %inner_loop
; SSE-WIN-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-WIN-NEXT: movq %r9, %r10
@ -1443,7 +1443,7 @@ define dso_local void @loopclearance2(ptr nocapture %y, ptr %x, double %c1, doub
; AVX1-NEXT: #NO_APP
; AVX1-NEXT: movl $1, %r8d
; AVX1-NEXT: xorl %r9d, %r9d
; AVX1-NEXT: .p2align 4, 0x90
; AVX1-NEXT: .p2align 4
; AVX1-NEXT: .LBB13_1: # %inner_loop
; AVX1-NEXT: # =>This Inner Loop Header: Depth=1
; AVX1-NEXT: movq %r9, %r10
@ -1523,7 +1523,7 @@ define dso_local void @loopclearance2(ptr nocapture %y, ptr %x, double %c1, doub
; AVX512VL-NEXT: #NO_APP
; AVX512VL-NEXT: movl $1, %r8d
; AVX512VL-NEXT: xorl %r9d, %r9d
; AVX512VL-NEXT: .p2align 4, 0x90
; AVX512VL-NEXT: .p2align 4
; AVX512VL-NEXT: .LBB13_1: # %inner_loop
; AVX512VL-NEXT: # =>This Inner Loop Header: Depth=1
; AVX512VL-NEXT: movq %r9, %r10

2
llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll
View File

@ -29,7 +29,7 @@ define i32 @foo(i32 %arg, ptr %arg3) nounwind {
; CHECK-NEXT: leaq global(%rax,%rax,2), %r14
; CHECK-NEXT: leaq global+4(%rax,%rax,2), %r15
; CHECK-NEXT: xorl %r13d, %r13d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %bb8
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: callq bar@PLT

16
llvm/test/CodeGen/X86/cast-vsel.ll
View File

@ -278,7 +278,7 @@ define dso_local void @example25() nounwind {
; SSE2-LABEL: example25:
; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movq $-4096, %rax # imm = 0xF000
; SSE2-NEXT: .p2align 4, 0x90
; SSE2-NEXT: .p2align 4
; SSE2-NEXT: .LBB5_1: # %vector.body
; SSE2-NEXT: # =>This Inner Loop Header: Depth=1
; SSE2-NEXT: movaps da+4112(%rax), %xmm0
@ -303,7 +303,7 @@ define dso_local void @example25() nounwind {
; SSE41-LABEL: example25:
; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movq $-4096, %rax # imm = 0xF000
; SSE41-NEXT: .p2align 4, 0x90
; SSE41-NEXT: .p2align 4
; SSE41-NEXT: .LBB5_1: # %vector.body
; SSE41-NEXT: # =>This Inner Loop Header: Depth=1
; SSE41-NEXT: movaps da+4112(%rax), %xmm0
@ -329,7 +329,7 @@ define dso_local void @example25() nounwind {
; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: movq $-4096, %rax # imm = 0xF000
; AVX1-NEXT: vbroadcastss {{.*#+}} ymm0 = [1,1,1,1,1,1,1,1]
; AVX1-NEXT: .p2align 4, 0x90
; AVX1-NEXT: .p2align 4
; AVX1-NEXT: .LBB5_1: # %vector.body
; AVX1-NEXT: # =>This Inner Loop Header: Depth=1
; AVX1-NEXT: vmovups da+4096(%rax), %ymm1
@ -348,7 +348,7 @@ define dso_local void @example25() nounwind {
; AVX2-LABEL: example25:
; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: movq $-4096, %rax # imm = 0xF000
; AVX2-NEXT: .p2align 4, 0x90
; AVX2-NEXT: .p2align 4
; AVX2-NEXT: .LBB5_1: # %vector.body
; AVX2-NEXT: # =>This Inner Loop Header: Depth=1
; AVX2-NEXT: vmovups da+4096(%rax), %ymm0
@ -402,7 +402,7 @@ define dso_local void @example24(i16 signext %x, i16 signext %y) nounwind {
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; SSE2-NEXT: movq $-4096, %rax # imm = 0xF000
; SSE2-NEXT: .p2align 4, 0x90
; SSE2-NEXT: .p2align 4
; SSE2-NEXT: .LBB6_1: # %vector.body
; SSE2-NEXT: # =>This Inner Loop Header: Depth=1
; SSE2-NEXT: movaps da+4096(%rax), %xmm2
@ -434,7 +434,7 @@ define dso_local void @example24(i16 signext %x, i16 signext %y) nounwind {
; SSE41-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,0,0,0]
; SSE41-NEXT: movq $-4096, %rax # imm = 0xF000
; SSE41-NEXT: .p2align 4, 0x90
; SSE41-NEXT: .p2align 4
; SSE41-NEXT: .LBB6_1: # %vector.body
; SSE41-NEXT: # =>This Inner Loop Header: Depth=1
; SSE41-NEXT: movaps da+4096(%rax), %xmm0
@ -469,7 +469,7 @@ define dso_local void @example24(i16 signext %x, i16 signext %y) nounwind {
; AVX1-NEXT: vpmovsxwd %xmm2, %xmm2
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
; AVX1-NEXT: vpmovsxwd %xmm3, %xmm3
; AVX1-NEXT: .p2align 4, 0x90
; AVX1-NEXT: .p2align 4
; AVX1-NEXT: .LBB6_1: # %vector.body
; AVX1-NEXT: # =>This Inner Loop Header: Depth=1
; AVX1-NEXT: vmovups da+4096(%rax), %ymm4
@ -494,7 +494,7 @@ define dso_local void @example24(i16 signext %x, i16 signext %y) nounwind {
; AVX2-NEXT: movq $-4096, %rax # imm = 0xF000
; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; AVX2-NEXT: vpmovsxwd %xmm1, %ymm1
; AVX2-NEXT: .p2align 4, 0x90
; AVX2-NEXT: .p2align 4
; AVX2-NEXT: .LBB6_1: # %vector.body
; AVX2-NEXT: # =>This Inner Loop Header: Depth=1
; AVX2-NEXT: vmovups da+4096(%rax), %ymm2

8
llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll
View File

@ -127,12 +127,12 @@ define i32 @test_control_flow(ptr %p, i32 %i, i32 %j) nounwind {
; X86-ALL-NEXT: jle .LBB1_6
; X86-ALL-NEXT: # %bb.1: # %loop_start
; X86-ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-ALL-NEXT: .p2align 4, 0x90
; X86-ALL-NEXT: .p2align 4
; X86-ALL-NEXT: .LBB1_2: # %while.condthread-pre-split.i
; X86-ALL-NEXT: # =>This Loop Header: Depth=1
; X86-ALL-NEXT: # Child Loop BB1_3 Depth 2
; X86-ALL-NEXT: movl (%ecx), %edx
; X86-ALL-NEXT: .p2align 4, 0x90
; X86-ALL-NEXT: .p2align 4
; X86-ALL-NEXT: .LBB1_3: # %while.cond.i
; X86-ALL-NEXT: # Parent Loop BB1_2 Depth=1
; X86-ALL-NEXT: # => This Inner Loop Header: Depth=2
@ -154,12 +154,12 @@ define i32 @test_control_flow(ptr %p, i32 %i, i32 %j) nounwind {
; X64-ALL-NEXT: movl %esi, %eax
; X64-ALL-NEXT: cmpl %edx, %esi
; X64-ALL-NEXT: jle .LBB1_5
; X64-ALL-NEXT: .p2align 4, 0x90
; X64-ALL-NEXT: .p2align 4
; X64-ALL-NEXT: .LBB1_1: # %while.condthread-pre-split.i
; X64-ALL-NEXT: # =>This Loop Header: Depth=1
; X64-ALL-NEXT: # Child Loop BB1_2 Depth 2
; X64-ALL-NEXT: movl (%rdi), %ecx
; X64-ALL-NEXT: .p2align 4, 0x90
; X64-ALL-NEXT: .p2align 4
; X64-ALL-NEXT: .LBB1_2: # %while.cond.i
; X64-ALL-NEXT: # Parent Loop BB1_1 Depth=1
; X64-ALL-NEXT: # => This Inner Loop Header: Depth=2

2
llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll
View File

@ -113,7 +113,7 @@ define i128 @cmpxchg_use_eflags_and_val(ptr %addr, i128 %offset) {
; CHECK-NEXT: vmovdqa (%rdi), %xmm0
; CHECK-NEXT: vpextrq $1, %xmm0, %rdx
; CHECK-NEXT: vmovq %xmm0, %rax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB4_1: # %loop
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rdx, %r9

2
llvm/test/CodeGen/X86/coalesce-esp.ll
View File

@ -27,7 +27,7 @@ define void @_ZSt17__gslice_to_indexjRKSt8valarrayIjES2_RS0_(i32 %__o, ptr nocap
; CHECK-NEXT: .LBB0_1: # %bb4.preheader
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: jmp .LBB0_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_4: # %bb7.backedge
; CHECK-NEXT: # in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT: addl $-4, %edx

2
llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness-reduced.ll
View File

@ -46,7 +46,7 @@ define void @foo(ptr %arg3, i1 %icmp16) #0 {
; CHECK-NEXT: xorl %r12d, %r12d
; CHECK-NEXT: # implicit-def: $r13
; CHECK-NEXT: jmp .LBB0_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %bb5
; CHECK-NEXT: # in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT: orl $1, %r12d

2
llvm/test/CodeGen/X86/coalescer-commute1.ll
View File

@ -13,7 +13,7 @@ define void @runcont(ptr %source) nounwind {
; CHECK-NEXT: movl (%ecx), %ecx
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_1: ## %bb
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vcvtsi2ssl (%eax,%edx,4), %xmm2, %xmm1

2
llvm/test/CodeGen/X86/coalescer-commute4.ll
View File

@ -15,7 +15,7 @@ define float @foo(ptr %x, ptr %y, i32 %c) nounwind {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: xorl %esi, %esi
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_3: ## %bb
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: xorps %xmm1, %xmm1

8
llvm/test/CodeGen/X86/coalescer-dead-flag-verifier-error.ll
View File

@ -11,7 +11,7 @@ define void @_ZNK4llvm5APInt21multiplicativeInverseERKS0_(ptr %r) {
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: jmp .LBB0_1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_4: # %_ZNK4llvm5APInt13getActiveBitsEv.exit.i.i
; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
; CHECK-NEXT: movl %edx, %edx
@ -26,7 +26,7 @@ define void @_ZNK4llvm5APInt21multiplicativeInverseERKS0_(ptr %r) {
; CHECK-NEXT: movq %rcx, %r8
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jne .LBB0_4
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_3: # %for.body.i.i.i.i.i.3
; CHECK-NEXT: # Parent Loop BB0_1 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -72,7 +72,7 @@ define void @_ZNK4llvm5APInt21multiplicativeInverseERKS0__assert(ptr %r) {
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: jmp .LBB1_1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_4: # %_ZNK4llvm5APInt13getActiveBitsEv.exit.i.i
; CHECK-NEXT: # in Loop: Header=BB1_1 Depth=1
; CHECK-NEXT: movl %edx, %edx
@ -89,7 +89,7 @@ define void @_ZNK4llvm5APInt21multiplicativeInverseERKS0__assert(ptr %r) {
; CHECK-NEXT: xorl %r8d, %r8d
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jne .LBB1_4
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_3: # %for.body.i.i.i.i.i.3
; CHECK-NEXT: # Parent Loop BB1_1 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2

28
llvm/test/CodeGen/X86/code-align-loops.ll
View File

@ -20,19 +20,19 @@
; The difference between test1 and test2 is test2 only set one loop metadata node for the second loop.
; CHECK-LABEL: test1:
; ALIGN: .p2align 6, 0x90
; ALIGN: .p2align 6
; ALIGN-NEXT: .LBB0_2: # %for.body
; ALIGN: .p2align 9, 0x90
; ALIGN: .p2align 9
; ALIGN-NEXT: .LBB0_3: # %for.body
; ALIGN32: .p2align 6, 0x90
; ALIGN32: .p2align 6
; ALIGN32-NEXT: .LBB0_2: # %for.body
; ALIGN32: .p2align 9, 0x90
; ALIGN32: .p2align 9
; ALIGN32-NEXT: .LBB0_3: # %for.body
; ALIGN256: .p2align 8, 0x90
; ALIGN256: .p2align 8
; ALIGN256-NEXT: .LBB0_2: # %for.body
; ALIGN256: .p2align 9, 0x90
; ALIGN256: .p2align 9
; ALIGN256-NEXT: .LBB0_3: # %for.body
define void @test1(i32 %a) nounwind {
@ -59,19 +59,19 @@ for.body5: ; preds = %for.body, %for.body
}
; CHECK-LABEL: test2:
; ALIGN: .p2align 4, 0x90
; ALIGN: .p2align 4
; ALIGN-NEXT: .LBB1_2: # %for.body
; ALIGN: .p2align 9, 0x90
; ALIGN: .p2align 9
; ALIGN-NEXT: .LBB1_3: # %for.body
; ALIGN32: .p2align 5, 0x90
; ALIGN32: .p2align 5
; ALIGN32-NEXT: .LBB1_2: # %for.body
; ALIGN32: .p2align 9, 0x90
; ALIGN32: .p2align 9
; ALIGN32-NEXT: .LBB1_3: # %for.body
; ALIGN256: .p2align 8, 0x90
; ALIGN256: .p2align 8
; ALIGN256-NEXT: .LBB1_2: # %for.body
; ALIGN256: .p2align 9, 0x90
; ALIGN256: .p2align 9
; ALIGN256-NEXT: .LBB1_3: # %for.body
define void @test2(i32 %a) nounwind {
entry:
@ -111,7 +111,7 @@ for.body5: ; preds = %for.body, %for.body
; }
; }
; CHECK-LABEL: test3_multilatch:
; ALIGN: .p2align 6, 0x90
; ALIGN: .p2align 6
; ALIGN-NEXT: .LBB2_1: # %while.cond
define dso_local i32 @test3_multilatch() #0 {
entry:
@ -147,7 +147,7 @@ while.end: ; preds = %while.cond
}
; CHECK-LABEL: test4_multilatch:
; ALIGN: .p2align 6, 0x90
; ALIGN: .p2align 6
; ALIGN-NEXT: .LBB3_4: # %bb4
define void @test4_multilatch(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
entry:

6
llvm/test/CodeGen/X86/code_placement_align_all.ll
View File

@ -1,9 +1,9 @@
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -align-all-blocks=16 < %s | FileCheck %s
;CHECK-LABEL: foo:
;CHECK: .p2align 16, 0x90
;CHECK: .p2align 16, 0x90
;CHECK: .p2align 16, 0x90
;CHECK: .p2align 16
;CHECK: .p2align 16
;CHECK: .p2align 16
;CHECK: ret
define i32 @foo(i32 %t, i32 %l) nounwind readnone ssp uwtable {
%1 = icmp eq i32 %t, 0

24
llvm/test/CodeGen/X86/combine-pmuldq.ll
View File

@ -157,7 +157,7 @@ define <8 x i64> @combine_zext_pmuludq_256(<8 x i32> %a) {
define void @PR39398(i32 %a0) {
; SSE-LABEL: PR39398:
; SSE: # %bb.0: # %bb
; SSE-NEXT: .p2align 4, 0x90
; SSE-NEXT: .p2align 4
; SSE-NEXT: .LBB5_1: # %bb10
; SSE-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-NEXT: cmpl $232, %edi
@ -167,7 +167,7 @@ define void @PR39398(i32 %a0) {
;
; AVX-LABEL: PR39398:
; AVX: # %bb.0: # %bb
; AVX-NEXT: .p2align 4, 0x90
; AVX-NEXT: .p2align 4
; AVX-NEXT: .LBB5_1: # %bb10
; AVX-NEXT: # =>This Inner Loop Header: Depth=1
; AVX-NEXT: cmpl $232, %edi
@ -338,7 +338,7 @@ define <8 x i32> @PR49658_zext(ptr %ptr, i32 %mul) {
; SSE-NEXT: pxor %xmm0, %xmm0
; SSE-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; SSE-NEXT: pxor %xmm1, %xmm1
; SSE-NEXT: .p2align 4, 0x90
; SSE-NEXT: .p2align 4
; SSE-NEXT: .LBB7_1: # %loop
; SSE-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-NEXT: pmovzxdq {{.*#+}} xmm3 = mem[0],zero,mem[1],zero
@ -367,7 +367,7 @@ define <8 x i32> @PR49658_zext(ptr %ptr, i32 %mul) {
; AVX1-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX1-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: .p2align 4, 0x90
; AVX1-NEXT: .p2align 4
; AVX1-NEXT: .LBB7_1: # %loop
; AVX1-NEXT: # =>This Inner Loop Header: Depth=1
; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm3 = mem[0],zero,mem[1],zero
@ -396,7 +396,7 @@ define <8 x i32> @PR49658_zext(ptr %ptr, i32 %mul) {
; AVX2-NEXT: vpbroadcastq %xmm0, %ymm1
; AVX2-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX2-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; AVX2-NEXT: .p2align 4, 0x90
; AVX2-NEXT: .p2align 4
; AVX2-NEXT: .LBB7_1: # %loop
; AVX2-NEXT: # =>This Inner Loop Header: Depth=1
; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
@ -418,7 +418,7 @@ define <8 x i32> @PR49658_zext(ptr %ptr, i32 %mul) {
; AVX512VL-NEXT: vpbroadcastq %rax, %zmm1
; AVX512VL-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX512VL-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; AVX512VL-NEXT: .p2align 4, 0x90
; AVX512VL-NEXT: .p2align 4
; AVX512VL-NEXT: .LBB7_1: # %loop
; AVX512VL-NEXT: # =>This Inner Loop Header: Depth=1
; AVX512VL-NEXT: vpmovzxdq {{.*#+}} zmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
@ -437,7 +437,7 @@ define <8 x i32> @PR49658_zext(ptr %ptr, i32 %mul) {
; AVX512DQVL-NEXT: vpbroadcastq %rax, %zmm1
; AVX512DQVL-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX512DQVL-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; AVX512DQVL-NEXT: .p2align 4, 0x90
; AVX512DQVL-NEXT: .p2align 4
; AVX512DQVL-NEXT: .LBB7_1: # %loop
; AVX512DQVL-NEXT: # =>This Inner Loop Header: Depth=1
; AVX512DQVL-NEXT: vpmovzxdq {{.*#+}} zmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
@ -482,7 +482,7 @@ define <8 x i32> @PR49658_sext(ptr %ptr, i32 %mul) {
; SSE-NEXT: movdqa %xmm2, %xmm3
; SSE-NEXT: psrlq $32, %xmm3
; SSE-NEXT: pxor %xmm1, %xmm1
; SSE-NEXT: .p2align 4, 0x90
; SSE-NEXT: .p2align 4
; SSE-NEXT: .LBB8_1: # %loop
; SSE-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-NEXT: pmovsxdq 2097176(%rdi,%rax), %xmm5
@ -543,7 +543,7 @@ define <8 x i32> @PR49658_sext(ptr %ptr, i32 %mul) {
; AVX1-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX1-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: .p2align 4, 0x90
; AVX1-NEXT: .p2align 4
; AVX1-NEXT: .LBB8_1: # %loop
; AVX1-NEXT: # =>This Inner Loop Header: Depth=1
; AVX1-NEXT: vpmovsxdq 2097152(%rdi,%rax), %xmm3
@ -572,7 +572,7 @@ define <8 x i32> @PR49658_sext(ptr %ptr, i32 %mul) {
; AVX2-NEXT: vpbroadcastq %xmm0, %ymm1
; AVX2-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX2-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; AVX2-NEXT: .p2align 4, 0x90
; AVX2-NEXT: .p2align 4
; AVX2-NEXT: .LBB8_1: # %loop
; AVX2-NEXT: # =>This Inner Loop Header: Depth=1
; AVX2-NEXT: vpmovsxdq 2097168(%rdi,%rax), %ymm2
@ -594,7 +594,7 @@ define <8 x i32> @PR49658_sext(ptr %ptr, i32 %mul) {
; AVX512VL-NEXT: vpbroadcastq %rax, %zmm1
; AVX512VL-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX512VL-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; AVX512VL-NEXT: .p2align 4, 0x90
; AVX512VL-NEXT: .p2align 4
; AVX512VL-NEXT: .LBB8_1: # %loop
; AVX512VL-NEXT: # =>This Inner Loop Header: Depth=1
; AVX512VL-NEXT: vpmovzxdq {{.*#+}} zmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
@ -613,7 +613,7 @@ define <8 x i32> @PR49658_sext(ptr %ptr, i32 %mul) {
; AVX512DQVL-NEXT: vpbroadcastq %rax, %zmm1
; AVX512DQVL-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX512DQVL-NEXT: movq $-2097152, %rax # imm = 0xFFE00000
; AVX512DQVL-NEXT: .p2align 4, 0x90
; AVX512DQVL-NEXT: .p2align 4
; AVX512DQVL-NEXT: .LBB8_1: # %loop
; AVX512DQVL-NEXT: # =>This Inner Loop Header: Depth=1
; AVX512DQVL-NEXT: vpmovzxdq {{.*#+}} zmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero

8
llvm/test/CodeGen/X86/constant-pool-sharing.ll
View File

@ -12,7 +12,7 @@ define void @share_v4i32_v4f32(ptr %p, ptr %q, i1 %t) nounwind {
; SSE-LINUX-LABEL: share_v4i32_v4f32:
; SSE-LINUX: # %bb.0: # %entry
; SSE-LINUX-NEXT: movaps {{.*#+}} xmm0 = [1073741824,1073741824,1073741824,1073741824]
; SSE-LINUX-NEXT: .p2align 4, 0x90
; SSE-LINUX-NEXT: .p2align 4
; SSE-LINUX-NEXT: .LBB0_1: # %loop
; SSE-LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-LINUX-NEXT: movaps %xmm0, (%rdi)
@ -25,7 +25,7 @@ define void @share_v4i32_v4f32(ptr %p, ptr %q, i1 %t) nounwind {
; SSE-MSVC-LABEL: share_v4i32_v4f32:
; SSE-MSVC: # %bb.0: # %entry
; SSE-MSVC-NEXT: movaps {{.*#+}} xmm0 = [1073741824,1073741824,1073741824,1073741824]
; SSE-MSVC-NEXT: .p2align 4, 0x90
; SSE-MSVC-NEXT: .p2align 4
; SSE-MSVC-NEXT: .LBB0_1: # %loop
; SSE-MSVC-NEXT: # =>This Inner Loop Header: Depth=1
; SSE-MSVC-NEXT: movaps %xmm0, (%rcx)
@ -39,7 +39,7 @@ define void @share_v4i32_v4f32(ptr %p, ptr %q, i1 %t) nounwind {
; AVX-LINUX: # %bb.0: # %entry
; AVX-LINUX-NEXT: vbroadcastss {{.*#+}} xmm0 = [1073741824,1073741824,1073741824,1073741824]
; AVX-LINUX-NEXT: vbroadcastss {{.*#+}} xmm1 = [1073741824,1073741824,1073741824,1073741824]
; AVX-LINUX-NEXT: .p2align 4, 0x90
; AVX-LINUX-NEXT: .p2align 4
; AVX-LINUX-NEXT: .LBB0_1: # %loop
; AVX-LINUX-NEXT: # =>This Inner Loop Header: Depth=1
; AVX-LINUX-NEXT: vmovaps %xmm0, (%rdi)
@ -53,7 +53,7 @@ define void @share_v4i32_v4f32(ptr %p, ptr %q, i1 %t) nounwind {
; AVX-MSVC: # %bb.0: # %entry
; AVX-MSVC-NEXT: vbroadcastss {{.*#+}} xmm0 = [1073741824,1073741824,1073741824,1073741824]
; AVX-MSVC-NEXT: vbroadcastss {{.*#+}} xmm1 = [1073741824,1073741824,1073741824,1073741824]
; AVX-MSVC-NEXT: .p2align 4, 0x90
; AVX-MSVC-NEXT: .p2align 4
; AVX-MSVC-NEXT: .LBB0_1: # %loop
; AVX-MSVC-NEXT: # =>This Inner Loop Header: Depth=1
; AVX-MSVC-NEXT: vmovaps %xmm0, (%rcx)

4
llvm/test/CodeGen/X86/copy-eflags.ll
View File

@ -211,7 +211,7 @@ define dso_local void @PR37100(i8 %arg1, i16 %arg2, i64 %arg3, i8 %arg4, ptr %pt
; X32-NEXT: movb {{[0-9]+}}(%esp), %ch
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: jmp .LBB3_1
; X32-NEXT: .p2align 4, 0x90
; X32-NEXT: .p2align 4
; X32-NEXT: .LBB3_5: # %bb1
; X32-NEXT: # in Loop: Header=BB3_1 Depth=1
; X32-NEXT: movl %esi, %eax
@ -250,7 +250,7 @@ define dso_local void @PR37100(i8 %arg1, i16 %arg2, i64 %arg3, i8 %arg4, ptr %pt
; X64-NEXT: movq %rdx, %r10
; X64-NEXT: movl {{[0-9]+}}(%rsp), %esi
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB3_1: # %bb1
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movsbq %dil, %rax

6
llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
View File

@ -144,7 +144,7 @@ define void @_Z2x6v() local_unnamed_addr {
; CHECK-NEXT: movq x0@GOTPCREL(%rip), %r15
; CHECK-NEXT: movq %rsi, %r12
; CHECK-NEXT: jmp .LBB1_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_15: # %for.cond1.for.inc3_crit_edge
; CHECK-NEXT: # in Loop: Header=BB1_2 Depth=1
; CHECK-NEXT: movl %edx, (%r8)
@ -220,7 +220,7 @@ define void @_Z2x6v() local_unnamed_addr {
; CHECK-NEXT: subq %rdx, %rax
; CHECK-NEXT: addq %r13, %r10
; CHECK-NEXT: leaq (%r11,%r10,8), %r10
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_12: # %vector.body
; CHECK-NEXT: # Parent Loop BB1_2 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -237,7 +237,7 @@ define void @_Z2x6v() local_unnamed_addr {
; CHECK-NEXT: cmpq %rdx, %rbp
; CHECK-NEXT: movq %r13, %rdx
; CHECK-NEXT: je .LBB1_15
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_14: # %for.body2
; CHECK-NEXT: # Parent Loop BB1_2 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2

2
llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
View File

@ -417,7 +417,7 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB4_3: # %udiv-do-while
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %edx, %esi

2
llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
View File

@ -377,7 +377,7 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: xorl %eax, %eax
; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB4_3: # %udiv-do-while
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill

2
llvm/test/CodeGen/X86/fdiv-combine.ll
View File

@ -128,7 +128,7 @@ define void @PR24141() {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: # implicit-def: $xmm0
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB8_1: # %while.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: callq g@PLT

8
llvm/test/CodeGen/X86/fixup-lea.ll
View File

@ -165,7 +165,7 @@ define void @foo_nosize(i32 inreg %dns) {
; SLOW-LABEL: foo_nosize:
; SLOW: # %bb.0: # %entry
; SLOW-NEXT: movw $-1, %cx
; SLOW-NEXT: .p2align 4, 0x90
; SLOW-NEXT: .p2align 4
; SLOW-NEXT: .LBB6_1: # %for.body
; SLOW-NEXT: # =>This Inner Loop Header: Depth=1
; SLOW-NEXT: movzwl %cx, %edx
@ -178,7 +178,7 @@ define void @foo_nosize(i32 inreg %dns) {
; FAST-LABEL: foo_nosize:
; FAST: # %bb.0: # %entry
; FAST-NEXT: movw $-1, %cx
; FAST-NEXT: .p2align 4, 0x90
; FAST-NEXT: .p2align 4
; FAST-NEXT: .LBB6_1: # %for.body
; FAST-NEXT: # =>This Inner Loop Header: Depth=1
; FAST-NEXT: movzwl %cx, %edx
@ -205,7 +205,7 @@ define void @bar_nosize(i32 inreg %dns) {
; SLOW-LABEL: bar_nosize:
; SLOW: # %bb.0: # %entry
; SLOW-NEXT: movw $1, %cx
; SLOW-NEXT: .p2align 4, 0x90
; SLOW-NEXT: .p2align 4
; SLOW-NEXT: .LBB7_1: # %for.body
; SLOW-NEXT: # =>This Inner Loop Header: Depth=1
; SLOW-NEXT: movzwl %cx, %edx
@ -218,7 +218,7 @@ define void @bar_nosize(i32 inreg %dns) {
; FAST-LABEL: bar_nosize:
; FAST: # %bb.0: # %entry
; FAST-NEXT: movw $1, %cx
; FAST-NEXT: .p2align 4, 0x90
; FAST-NEXT: .p2align 4
; FAST-NEXT: .LBB7_1: # %for.body
; FAST-NEXT: # =>This Inner Loop Header: Depth=1
; FAST-NEXT: movzwl %cx, %edx

2
llvm/test/CodeGen/X86/fma-commute-loop.ll
View File

@ -30,7 +30,7 @@ define void @eggs(ptr %arg, ptr %arg1, ptr %arg2, ptr %arg3, ptr %arg4, ptr %arg
; CHECK-NEXT: vxorpd %xmm5, %xmm5, %xmm5
; CHECK-NEXT: vxorpd %xmm6, %xmm6, %xmm6
; CHECK-NEXT: vxorpd %xmm7, %xmm7, %xmm7
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_1: ## %bb15
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vbroadcastsd (%r11,%rbx,8), %zmm9

48
llvm/test/CodeGen/X86/fma-intrinsics-phi-213-to-231.ll
View File

@ -7,7 +7,7 @@ define <2 x double> @fmaddsubpd_loop_128(i32 %iter, <2 x double> %a, <2 x double
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB0_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmaddsub231pd {{.*#+}} xmm2 = (xmm0 * xmm1) +/- xmm2
@ -44,7 +44,7 @@ define <2 x double> @fmsubaddpd_loop_128(i32 %iter, <2 x double> %a, <2 x double
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB1_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmsubadd231pd {{.*#+}} xmm2 = (xmm0 * xmm1) -/+ xmm2
@ -81,7 +81,7 @@ define <2 x double> @fmaddpd_loop_128(i32 %iter, <2 x double> %a, <2 x double> %
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB2_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmadd231pd {{.*#+}} xmm2 = (xmm0 * xmm1) + xmm2
@ -118,7 +118,7 @@ define <2 x double> @fmsubpd_loop_128(i32 %iter, <2 x double> %a, <2 x double> %
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB3_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB3_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmsub231pd {{.*#+}} xmm2 = (xmm0 * xmm1) - xmm2
@ -155,7 +155,7 @@ define <2 x double> @fnmaddpd_loop_128(i32 %iter, <2 x double> %a, <2 x double>
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB4_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB4_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfnmadd231pd {{.*#+}} xmm2 = -(xmm0 * xmm1) + xmm2
@ -192,7 +192,7 @@ define <2 x double> @fnmsubpd_loop_128(i32 %iter, <2 x double> %a, <2 x double>
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB5_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB5_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfnmsub231pd {{.*#+}} xmm2 = -(xmm0 * xmm1) - xmm2
@ -236,7 +236,7 @@ define <4 x float> @fmaddsubps_loop_128(i32 %iter, <4 x float> %a, <4 x float> %
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB6_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB6_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmaddsub231ps {{.*#+}} xmm2 = (xmm0 * xmm1) +/- xmm2
@ -273,7 +273,7 @@ define <4 x float> @fmsubaddps_loop_128(i32 %iter, <4 x float> %a, <4 x float> %
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB7_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB7_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmsubadd231ps {{.*#+}} xmm2 = (xmm0 * xmm1) -/+ xmm2
@ -310,7 +310,7 @@ define <4 x float> @fmaddps_loop_128(i32 %iter, <4 x float> %a, <4 x float> %b,
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB8_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB8_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmadd231ps {{.*#+}} xmm2 = (xmm0 * xmm1) + xmm2
@ -347,7 +347,7 @@ define <4 x float> @fmsubps_loop_128(i32 %iter, <4 x float> %a, <4 x float> %b,
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB9_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB9_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmsub231ps {{.*#+}} xmm2 = (xmm0 * xmm1) - xmm2
@ -384,7 +384,7 @@ define <4 x float> @fnmaddps_loop_128(i32 %iter, <4 x float> %a, <4 x float> %b,
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB10_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB10_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfnmadd231ps {{.*#+}} xmm2 = -(xmm0 * xmm1) + xmm2
@ -421,7 +421,7 @@ define <4 x float> @fnmsubps_loop_128(i32 %iter, <4 x float> %a, <4 x float> %b,
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB11_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB11_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfnmsub231ps {{.*#+}} xmm2 = -(xmm0 * xmm1) - xmm2
@ -465,7 +465,7 @@ define <4 x double> @fmaddsubpd_loop_256(i32 %iter, <4 x double> %a, <4 x double
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB12_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB12_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmaddsub231pd {{.*#+}} ymm2 = (ymm0 * ymm1) +/- ymm2
@ -502,7 +502,7 @@ define <4 x double> @fmsubaddpd_loop_256(i32 %iter, <4 x double> %a, <4 x double
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB13_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB13_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmsubadd231pd {{.*#+}} ymm2 = (ymm0 * ymm1) -/+ ymm2
@ -539,7 +539,7 @@ define <4 x double> @fmaddpd_loop_256(i32 %iter, <4 x double> %a, <4 x double> %
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB14_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB14_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmadd231pd {{.*#+}} ymm2 = (ymm0 * ymm1) + ymm2
@ -576,7 +576,7 @@ define <4 x double> @fmsubpd_loop_256(i32 %iter, <4 x double> %a, <4 x double> %
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB15_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB15_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmsub231pd {{.*#+}} ymm2 = (ymm0 * ymm1) - ymm2
@ -613,7 +613,7 @@ define <4 x double> @fnmaddpd_loop_256(i32 %iter, <4 x double> %a, <4 x double>
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB16_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB16_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfnmadd231pd {{.*#+}} ymm2 = -(ymm0 * ymm1) + ymm2
@ -650,7 +650,7 @@ define <4 x double> @fnmsubpd_loop_256(i32 %iter, <4 x double> %a, <4 x double>
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB17_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB17_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfnmsub231pd {{.*#+}} ymm2 = -(ymm0 * ymm1) - ymm2
@ -694,7 +694,7 @@ define <8 x float> @fmaddsubps_loop_256(i32 %iter, <8 x float> %a, <8 x float> %
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB18_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB18_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmaddsub231ps {{.*#+}} ymm2 = (ymm0 * ymm1) +/- ymm2
@ -731,7 +731,7 @@ define <8 x float> @fmsubaddps_loop_256(i32 %iter, <8 x float> %a, <8 x float> %
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB19_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB19_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmsubadd231ps {{.*#+}} ymm2 = (ymm0 * ymm1) -/+ ymm2
@ -768,7 +768,7 @@ define <8 x float> @fmaddps_loop_256(i32 %iter, <8 x float> %a, <8 x float> %b,
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB20_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB20_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmadd231ps {{.*#+}} ymm2 = (ymm0 * ymm1) + ymm2
@ -805,7 +805,7 @@ define <8 x float> @fmsubps_loop_256(i32 %iter, <8 x float> %a, <8 x float> %b,
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB21_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB21_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfmsub231ps {{.*#+}} ymm2 = (ymm0 * ymm1) - ymm2
@ -842,7 +842,7 @@ define <8 x float> @fnmaddps_loop_256(i32 %iter, <8 x float> %a, <8 x float> %b,
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB22_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB22_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfnmadd231ps {{.*#+}} ymm2 = -(ymm0 * ymm1) + ymm2
@ -879,7 +879,7 @@ define <8 x float> @fnmsubps_loop_256(i32 %iter, <8 x float> %a, <8 x float> %b,
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl %edi, %eax
; CHECK-NEXT: jge .LBB23_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB23_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: vfnmsub231ps {{.*#+}} ymm2 = -(ymm0 * ymm1) - ymm2

4
llvm/test/CodeGen/X86/fold-call-3.ll
View File

@ -22,7 +22,7 @@ define void @_Z25RawPointerPerformanceTestPvRN5clang6ActionE(ptr %Val, ptr %Acti
; CHECK-NEXT: movq %rsi, %rbx
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: xorl %ebp, %ebp
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_2: ## %bb
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq (%rbx), %rcx
@ -52,7 +52,7 @@ define void @_Z25RawPointerPerformanceTestPvRN5clang6ActionE(ptr %Val, ptr %Acti
; pre-RA-NEXT: movq %rsi, %rbx
; pre-RA-NEXT: movq %rdi, %rax
; pre-RA-NEXT: xorl %ebp, %ebp
; pre-RA-NEXT: .p2align 4, 0x90
; pre-RA-NEXT: .p2align 4
; pre-RA-NEXT: LBB0_2: ## %bb
; pre-RA-NEXT: ## =>This Inner Loop Header: Depth=1
; pre-RA-NEXT: movq (%rbx), %rcx

56
llvm/test/CodeGen/X86/fold-loop-of-urem.ll
View File

@ -24,7 +24,7 @@ define void @simple_urem_to_sel(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: xorl %r15d, %r15d
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: xorl %r12d, %r12d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %edi
@ -71,7 +71,7 @@ define void @simple_urem_to_sel_fail_not_in_loop(i32 %N, i32 %rem_amt) nounwind
; CHECK-NEXT: # %bb.3: # %for.body.preheader
; CHECK-NEXT: movl %edi, %r14d
; CHECK-NEXT: xorl %ebp, %ebp
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB1_4: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %ebp, %edi
@ -129,7 +129,7 @@ define void @simple_urem_to_sel_inner_loop(i32 %N, i32 %M) nounwind {
; CHECK-NEXT: xorl %r15d, %r15d
; CHECK-NEXT: xorl %r13d, %r13d
; CHECK-NEXT: jmp .LBB2_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_5: # %for.inner.cond.cleanup
; CHECK-NEXT: # in Loop: Header=BB2_2 Depth=1
; CHECK-NEXT: incl %r15d
@ -147,7 +147,7 @@ define void @simple_urem_to_sel_inner_loop(i32 %N, i32 %M) nounwind {
; CHECK-NEXT: # %bb.3: # %for.inner.body.preheader
; CHECK-NEXT: # in Loop: Header=BB2_2 Depth=1
; CHECK-NEXT: movl %r12d, %ebx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB2_4: # %for.inner.body
; CHECK-NEXT: # Parent Loop BB2_2 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -208,7 +208,7 @@ define void @simple_urem_to_sel_inner_loop_fail_not_invariant(i32 %N, i32 %M) no
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: jmp .LBB3_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB3_5: # %for.inner.cond.cleanup
; CHECK-NEXT: # in Loop: Header=BB3_2 Depth=1
; CHECK-NEXT: incl %r14d
@ -224,7 +224,7 @@ define void @simple_urem_to_sel_inner_loop_fail_not_invariant(i32 %N, i32 %M) no
; CHECK-NEXT: # in Loop: Header=BB3_2 Depth=1
; CHECK-NEXT: movl %eax, %r15d
; CHECK-NEXT: movl %ebx, %r12d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB3_4: # %for.inner.body
; CHECK-NEXT: # Parent Loop BB3_2 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -288,7 +288,7 @@ define void @simple_urem_to_sel_nested2(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: xorl %r12d, %r12d
; CHECK-NEXT: jmp .LBB4_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB4_5: # %for.body1
; CHECK-NEXT: # in Loop: Header=BB4_2 Depth=1
; CHECK-NEXT: movl %r14d, %edi
@ -363,7 +363,7 @@ define void @simple_urem_fail_bad_incr3(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: jmp .LBB5_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB5_6: # %for.body1
; CHECK-NEXT: # in Loop: Header=BB5_2 Depth=1
; CHECK-NEXT: movl %ebp, %eax
@ -392,7 +392,7 @@ define void @simple_urem_fail_bad_incr3(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: movl %eax, %ebp
; CHECK-NEXT: incl %ebp
; CHECK-NEXT: jmp .LBB5_6
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB5_5: # %for.body2
; CHECK-NEXT: # in Loop: Header=BB5_2 Depth=1
; CHECK-NEXT: xorl %ebp, %ebp
@ -442,7 +442,7 @@ define void @simple_urem_to_sel_vec(<2 x i64> %rem_amt) nounwind {
; CHECK-NEXT: pxor %xmm1, %xmm1
; CHECK-NEXT: pxor %xmm0, %xmm0
; CHECK-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB6_1: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
@ -496,7 +496,7 @@ define void @simple_urem_fail_bad_incr(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: jmp .LBB7_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB7_4: # %for.body.tail
; CHECK-NEXT: # in Loop: Header=BB7_2 Depth=1
; CHECK-NEXT: movl %r14d, %eax
@ -566,7 +566,7 @@ define void @simple_urem_to_sel_second_acc(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: xorl %r12d, %r12d
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: xorl %r13d, %r13d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB8_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %edi
@ -618,7 +618,7 @@ define void @simple_urem_fail_srem(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB9_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %eax
@ -663,7 +663,7 @@ define void @simple_urem_fail_missing_nuw(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB10_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %eax
@ -708,7 +708,7 @@ define void @simple_urem_fail_bad_incr2(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB11_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %eax
@ -753,7 +753,7 @@ define void @simple_urem_non_zero_entry4(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: movl $4, %r14d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB12_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %eax
@ -799,7 +799,7 @@ define void @simple_urem_skip_const_rem_amt(i32 %N) nounwind {
; CHECK-NEXT: addl $-4, %ebx
; CHECK-NEXT: movl $4, %ebp
; CHECK-NEXT: movl $2938661835, %r14d # imm = 0xAF286BCB
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB13_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %ebp, %eax
@ -855,7 +855,7 @@ define void @simple_urem_fail_no_preheader_non_canonical(i32 %N, i32 %rem_amt) n
; CHECK-NEXT: jmp .LBB14_3
; CHECK-NEXT: .LBB14_1:
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB14_3: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %eax
@ -913,7 +913,7 @@ define void @simple_urem_multi_latch_non_canonical(i32 %N, i32 %rem_amt) nounwin
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: xorl %r13d, %r13d
; CHECK-NEXT: jmp .LBB15_2
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB15_3: # %for.body.backedge
; CHECK-NEXT: # in Loop: Header=BB15_2 Depth=1
; CHECK-NEXT: incl %r14d
@ -1038,7 +1038,7 @@ define void @simple_urem_fail_intermediate_inc(i32 %N, i32 %rem_amt) nounwind {
; CHECK-NEXT: movl %edi, %r14d
; CHECK-NEXT: negl %r14d
; CHECK-NEXT: movl $1, %r15d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB17_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r15d, %eax
@ -1078,7 +1078,7 @@ for.body:
define void @weird_loop(i64 %sub.ptr.div.i56) personality ptr null {
; CHECK-LABEL: weird_loop:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB18_1: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: jmp .LBB18_1
@ -1107,7 +1107,7 @@ define void @simple_urem_to_sel_non_zero_start_fail(i32 %N, i32 %rem_amt) nounwi
; CHECK-NEXT: movl %esi, %ebx
; CHECK-NEXT: movl %edi, %ebp
; CHECK-NEXT: movl $2, %r14d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB19_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %eax
@ -1157,7 +1157,7 @@ define void @simple_urem_to_sel_non_zero_start_okay(i32 %N, i32 %rem_amt_in) nou
; CHECK-NEXT: movl $2, %r14d
; CHECK-NEXT: xorl %r15d, %r15d
; CHECK-NEXT: movl $2, %r12d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB20_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %edi
@ -1207,7 +1207,7 @@ define void @simple_urem_to_sel_non_zero_start_through_add(i32 %N, i32 %rem_amt_
; CHECK-NEXT: orl $16, %ebx
; CHECK-NEXT: negl %r14d
; CHECK-NEXT: movl $7, %r15d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB21_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r15d, %eax
@ -1259,7 +1259,7 @@ define void @simple_urem_to_sel_non_zero_start_through_add_fail_missing_nuw(i32
; CHECK-NEXT: orl $16, %ebx
; CHECK-NEXT: negl %r14d
; CHECK-NEXT: movl $7, %r15d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB22_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r15d, %eax
@ -1310,7 +1310,7 @@ define void @simple_urem_to_sel_non_zero_start_through_add_fail_no_simplify_rem(
; CHECK-NEXT: movl %edi, %r14d
; CHECK-NEXT: negl %r14d
; CHECK-NEXT: movl $7, %r15d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB23_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r15d, %eax
@ -1363,7 +1363,7 @@ define void @simple_urem_to_sel_non_zero_start_through_sub(i32 %N, i32 %rem_amt,
; CHECK-NEXT: xorl %r15d, %r15d
; CHECK-NEXT: xorl %r14d, %r14d
; CHECK-NEXT: xorl %r12d, %r12d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB24_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r14d, %edi
@ -1412,7 +1412,7 @@ define void @simple_urem_to_sel_non_zero_start_through_sub_no_simplfy(i32 %N, i3
; CHECK-NEXT: movl %edi, %r14d
; CHECK-NEXT: negl %r14d
; CHECK-NEXT: addl $-2, %r15d
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB25_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %r15d, %eax

2
llvm/test/CodeGen/X86/fp-une-cmp.ll
View File

@ -109,7 +109,7 @@ define void @pr27750(ptr %b, float %x, i1 %y) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorps %xmm1, %xmm1
; CHECK-NEXT: jmp .LBB3_1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB3_3: # %for.end
; CHECK-NEXT: # in Loop: Header=BB3_1 Depth=1
; CHECK-NEXT: ucomiss %xmm1, %xmm0

12
llvm/test/CodeGen/X86/hoist-invariant-load.ll
View File

@ -43,7 +43,7 @@ define void @test(ptr %x) uwtable ssp {
; CHECK-NEXT: movl $10000, %ebp ## imm = 0x2710
; CHECK-NEXT: movq L_OBJC_SELECTOR_REFERENCES_(%rip), %r14
; CHECK-NEXT: movq _objc_msgSend@GOTPCREL(%rip), %r15
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_1: ## %for.body
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rbx, %rdi
@ -94,7 +94,7 @@ define void @test_unordered(ptr %x) uwtable ssp {
; CHECK-NEXT: movl $10000, %ebp ## imm = 0x2710
; CHECK-NEXT: movq L_OBJC_SELECTOR_REFERENCES_(%rip), %r14
; CHECK-NEXT: movq _objc_msgSend@GOTPCREL(%rip), %r15
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB1_1: ## %for.body
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq %rbx, %rdi
@ -139,7 +139,7 @@ define void @test_volatile(ptr %x) uwtable ssp {
; CHECK-NEXT: movq %rdi, %rbx
; CHECK-NEXT: movl $10000, %ebp ## imm = 0x2710
; CHECK-NEXT: movq _objc_msgSend@GOTPCREL(%rip), %r14
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB2_1: ## %for.body
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq L_OBJC_SELECTOR_REFERENCES_(%rip), %rsi
@ -182,7 +182,7 @@ define void @test_seq_cst(ptr %x) uwtable ssp {
; CHECK-NEXT: movq %rdi, %rbx
; CHECK-NEXT: movl $10000, %ebp ## imm = 0x2710
; CHECK-NEXT: movq _objc_msgSend@GOTPCREL(%rip), %r14
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB3_1: ## %for.body
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movq L_OBJC_SELECTOR_REFERENCES_(%rip), %rsi
@ -219,7 +219,7 @@ define void @test_multi_def(ptr dereferenceable(8) align(8) %x1,
; CHECK-NEXT: xorl %r8d, %r8d
; CHECK-NEXT: movq (%rdi), %rdx
; CHECK-NEXT: movq (%rsi), %rsi
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB4_2: ## %for.body
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: mulxq %rsi, %r9, %rdi
@ -267,7 +267,7 @@ define void @test_div_def(ptr dereferenceable(8) align(8) %x1,
; CHECK-NEXT: xorl %r9d, %r9d
; CHECK-NEXT: movl (%rdi), %edi
; CHECK-NEXT: movl (%rsi), %esi
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB5_2: ## %for.body
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movl %edi, %eax

8
llvm/test/CodeGen/X86/i128-mul.ll
View File

@ -115,7 +115,7 @@ define i64 @mul1(i64 %n, ptr nocapture %z, ptr nocapture %x, i64 %y) nounwind {
; X86-NOBMI-NEXT: xorl %edx, %edx
; X86-NOBMI-NEXT: xorl %ecx, %ecx
; X86-NOBMI-NEXT: movl $0, (%esp) # 4-byte Folded Spill
; X86-NOBMI-NEXT: .p2align 4, 0x90
; X86-NOBMI-NEXT: .p2align 4
; X86-NOBMI-NEXT: .LBB1_2: # %for.body
; X86-NOBMI-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NOBMI-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
@ -194,7 +194,7 @@ define i64 @mul1(i64 %n, ptr nocapture %z, ptr nocapture %x, i64 %y) nounwind {
; X86-BMI-NEXT: xorl %eax, %eax
; X86-BMI-NEXT: xorl %ebx, %ebx
; X86-BMI-NEXT: xorl %ebp, %ebp
; X86-BMI-NEXT: .p2align 4, 0x90
; X86-BMI-NEXT: .p2align 4
; X86-BMI-NEXT: .LBB1_2: # %for.body
; X86-BMI-NEXT: # =>This Inner Loop Header: Depth=1
; X86-BMI-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
@ -263,7 +263,7 @@ define i64 @mul1(i64 %n, ptr nocapture %z, ptr nocapture %x, i64 %y) nounwind {
; X64-NOBMI-NEXT: movq %rdx, %r8
; X64-NOBMI-NEXT: xorl %r10d, %r10d
; X64-NOBMI-NEXT: xorl %r9d, %r9d
; X64-NOBMI-NEXT: .p2align 4, 0x90
; X64-NOBMI-NEXT: .p2align 4
; X64-NOBMI-NEXT: .LBB1_2: # %for.body
; X64-NOBMI-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NOBMI-NEXT: movq %rcx, %rax
@ -287,7 +287,7 @@ define i64 @mul1(i64 %n, ptr nocapture %z, ptr nocapture %x, i64 %y) nounwind {
; X64-BMI-NEXT: movq %rdx, %rax
; X64-BMI-NEXT: xorl %r9d, %r9d
; X64-BMI-NEXT: xorl %r8d, %r8d
; X64-BMI-NEXT: .p2align 4, 0x90
; X64-BMI-NEXT: .p2align 4
; X64-BMI-NEXT: .LBB1_2: # %for.body
; X64-BMI-NEXT: # =>This Inner Loop Header: Depth=1
; X64-BMI-NEXT: movq %rcx, %rdx

4
llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
View File

@ -30,7 +30,7 @@ define i32 @eflagsLiveInPrologue() #0 {
; ENABLE-NEXT: movl (%eax), %eax
; ENABLE-NEXT: testl %eax, %eax
; ENABLE-NEXT: je LBB0_4
; ENABLE-NEXT: .p2align 4, 0x90
; ENABLE-NEXT: .p2align 4
; ENABLE-NEXT: LBB0_3: ## %for.body
; ENABLE-NEXT: ## =>This Inner Loop Header: Depth=1
; ENABLE-NEXT: jmp LBB0_3
@ -70,7 +70,7 @@ define i32 @eflagsLiveInPrologue() #0 {
; DISABLE-NEXT: movl (%eax), %eax
; DISABLE-NEXT: testl %eax, %eax
; DISABLE-NEXT: je LBB0_4
; DISABLE-NEXT: .p2align 4, 0x90
; DISABLE-NEXT: .p2align 4
; DISABLE-NEXT: LBB0_3: ## %for.body
; DISABLE-NEXT: ## =>This Inner Loop Header: Depth=1
; DISABLE-NEXT: jmp LBB0_3

4
llvm/test/CodeGen/X86/icmp-shift-opt.ll
View File

@ -18,7 +18,7 @@ define i128 @opt_setcc_lt_power_of_2(i128 %a) nounwind {
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_1: # %loop
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: addl $1, %edi
@ -47,7 +47,7 @@ define i128 @opt_setcc_lt_power_of_2(i128 %a) nounwind {
; X64: # %bb.0:
; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB0_1: # %loop
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: addq $1, %rax

6
llvm/test/CodeGen/X86/ifunc-asm.ll
View File

@ -8,7 +8,7 @@ entry:
; ELF: .type foo_resolver,@function
; ELF-NEXT: foo_resolver:
; MACHO: .p2align 4, 0x90
; MACHO: .p2align 4
; MACHO-NEXT: _foo_resolver
@ -23,10 +23,10 @@ entry:
; MACHO-NEXT: .quad _foo_ifunc.stub_helper
; MACHO-NEXT: .section __TEXT,__text,regular,pure_instructions
; MACHO-NEXT: .globl _foo_ifunc
; MACHO-NEXT: .p2align 0, 0x90
; MACHO-NEXT: .p2align 0
; MACHO-NEXT: _foo_ifunc:
; MACHO-NEXT: jmpl *_foo_ifunc.lazy_pointer(%rip)
; MACHO-NEXT: .p2align 0, 0x90
; MACHO-NEXT: .p2align 0
; MACHO-NEXT: _foo_ifunc.stub_helper:
; MACHO-NEXT: pushq %rax
; MACHO-NEXT: pushq %rdi

12
llvm/test/CodeGen/X86/innermost-loop-alignment.ll
View File

@ -25,12 +25,12 @@ define void @test(i32 %n, i32 %m) {
; DEFAULT-NEXT: xorl %esi, %esi
; DEFAULT-NEXT: movl {{[0-9]+}}(%esp), %edi
; DEFAULT-NEXT: movl {{[0-9]+}}(%esp), %ebx
; DEFAULT-NEXT: .p2align 4, 0x90
; DEFAULT-NEXT: .p2align 4
; DEFAULT-NEXT: .LBB0_1: # %outer
; DEFAULT-NEXT: # =>This Loop Header: Depth=1
; DEFAULT-NEXT: # Child Loop BB0_2 Depth 2
; DEFAULT-NEXT: movl %edi, %ebp
; DEFAULT-NEXT: .p2align 4, 0x90
; DEFAULT-NEXT: .p2align 4
; DEFAULT-NEXT: .LBB0_2: # %inner
; DEFAULT-NEXT: # Parent Loop BB0_1 Depth=1
; DEFAULT-NEXT: # => This Inner Loop Header: Depth=2
@ -74,12 +74,12 @@ define void @test(i32 %n, i32 %m) {
; ALIGN32-NEXT: xorl %esi, %esi
; ALIGN32-NEXT: movl {{[0-9]+}}(%esp), %edi
; ALIGN32-NEXT: movl {{[0-9]+}}(%esp), %ebx
; ALIGN32-NEXT: .p2align 4, 0x90
; ALIGN32-NEXT: .p2align 4
; ALIGN32-NEXT: .LBB0_1: # %outer
; ALIGN32-NEXT: # =>This Loop Header: Depth=1
; ALIGN32-NEXT: # Child Loop BB0_2 Depth 2
; ALIGN32-NEXT: movl %edi, %ebp
; ALIGN32-NEXT: .p2align 5, 0x90
; ALIGN32-NEXT: .p2align 5
; ALIGN32-NEXT: .LBB0_2: # %inner
; ALIGN32-NEXT: # Parent Loop BB0_1 Depth=1
; ALIGN32-NEXT: # => This Inner Loop Header: Depth=2
@ -123,12 +123,12 @@ define void @test(i32 %n, i32 %m) {
; ALIGN64-NEXT: xorl %esi, %esi
; ALIGN64-NEXT: movl {{[0-9]+}}(%esp), %edi
; ALIGN64-NEXT: movl {{[0-9]+}}(%esp), %ebx
; ALIGN64-NEXT: .p2align 5, 0x90
; ALIGN64-NEXT: .p2align 5
; ALIGN64-NEXT: .LBB0_1: # %outer
; ALIGN64-NEXT: # =>This Loop Header: Depth=1
; ALIGN64-NEXT: # Child Loop BB0_2 Depth 2
; ALIGN64-NEXT: movl %edi, %ebp
; ALIGN64-NEXT: .p2align 6, 0x90
; ALIGN64-NEXT: .p2align 6
; ALIGN64-NEXT: .LBB0_2: # %inner
; ALIGN64-NEXT: # Parent Loop BB0_1 Depth=1
; ALIGN64-NEXT: # => This Inner Loop Header: Depth=2

4
llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
View File

@ -23,7 +23,7 @@ define void @FontChange(i1 %foo) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB0_9
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %bb366
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: testb $1, %dil
@ -31,7 +31,7 @@ define void @FontChange(i1 %foo) nounwind {
; CHECK-NEXT: # %bb.2: # %bb428
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: je .LBB0_9
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_3: # %bb650
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpb $0, 0

4
llvm/test/CodeGen/X86/issue76416.ll
View File

@ -12,7 +12,7 @@ define dso_local void @vga_load_state() #0 {
; CHECK-NEXT: movl $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: cmpl $3, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: jg .LBB0_3
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %for.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: xorl %eax, %eax
@ -23,7 +23,7 @@ define dso_local void @vga_load_state() #0 {
; CHECK-NEXT: jle .LBB0_2
; CHECK-NEXT: .LBB0_3: # %for.end
; CHECK-NEXT: movl $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_4: # %for.cond1
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: #APP

8
llvm/test/CodeGen/X86/kcfi-patchable-function-prefix.ll
View File

@ -1,6 +1,6 @@
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s
; CHECK: .p2align 4, 0x90
; CHECK: .p2align 4
; CHECK-LABEL: __cfi_f1:
; CHECK-COUNT-11: nop
; CHECK-NEXT: movl $12345678, %eax
@ -13,7 +13,7 @@ define void @f1(ptr noundef %x) !kcfi_type !1 {
ret void
}
; CHECK: .p2align 4, 0x90
; CHECK: .p2align 4
; CHECK-NOT: __cfi_f2:
; CHECK-NOT: nop
; CHECK-LABEL: f2:
@ -23,7 +23,7 @@ define void @f2(ptr noundef %x) {
ret void
}
; CHECK: .p2align 4, 0x90
; CHECK: .p2align 4
; CHECK-LABEL: __cfi_f3:
; CHECK-NOT: nop
; CHECK-NEXT: movl $12345678, %eax
@ -35,7 +35,7 @@ define void @f3(ptr noundef %x) #0 !kcfi_type !1 {
ret void
}
; CHECK: .p2align 4, 0x90
; CHECK: .p2align 4
; CHECK-NOT: __cfi_f4:
; CHECK-COUNT-16: nop
; CHECK-LABEL: f4:

2
llvm/test/CodeGen/X86/kcfi.ll
View File

@ -2,7 +2,7 @@
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=finalize-isel < %s | FileCheck %s --check-prefixes=MIR,ISEL
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=kcfi < %s | FileCheck %s --check-prefixes=MIR,KCFI
; ASM: .p2align 4, 0x90
; ASM: .p2align 4
; ASM: .type __cfi_f1,@function
; ASM-LABEL: __cfi_f1:
; ASM-NEXT: nop

8
llvm/test/CodeGen/X86/known-bits.ll
View File

@ -14,13 +14,13 @@ define void @knownbits_zext_in_reg(ptr) nounwind {
; X86-NEXT: shrl $14, %edx
; X86-NEXT: movzbl %al, %ecx
; X86-NEXT: xorl %ebx, %ebx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_1: # %CF
; X86-NEXT: # =>This Loop Header: Depth=1
; X86-NEXT: # Child Loop BB0_2 Depth 2
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: divb %dl
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_2: # %CF237
; X86-NEXT: # Parent Loop BB0_1 Depth=1
; X86-NEXT: # => This Inner Loop Header: Depth=2
@ -37,13 +37,13 @@ define void @knownbits_zext_in_reg(ptr) nounwind {
; X64-NEXT: shrl $14, %edx
; X64-NEXT: movzbl %cl, %ecx
; X64-NEXT: xorl %esi, %esi
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB0_1: # %CF
; X64-NEXT: # =>This Loop Header: Depth=1
; X64-NEXT: # Child Loop BB0_2 Depth 2
; X64-NEXT: movl %ecx, %eax
; X64-NEXT: divb %dl
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB0_2: # %CF237
; X64-NEXT: # Parent Loop BB0_1 Depth=1
; X64-NEXT: # => This Inner Loop Header: Depth=2

4
llvm/test/CodeGen/X86/lea-opt-cse2.ll
View File

@ -7,7 +7,7 @@
define void @foo(ptr nocapture %ctx, i32 %n) local_unnamed_addr #0 {
; X64-LABEL: foo:
; X64: # %bb.0: # %entry
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB0_1: # %loop
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movl (%rdi), %eax
@ -32,7 +32,7 @@ define void @foo(ptr nocapture %ctx, i32 %n) local_unnamed_addr #0 {
; X86-NEXT: .cfi_offset %edi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB0_1: # %loop
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl (%eax), %edx

4
llvm/test/CodeGen/X86/lea-opt-cse4.ll
View File

@ -59,7 +59,7 @@ define void @foo(ptr nocapture %ctx, i32 %n) local_unnamed_addr #0 {
define void @foo_loop(ptr nocapture %ctx, i32 %n) local_unnamed_addr #0 {
; X64-LABEL: foo_loop:
; X64: # %bb.0: # %entry
; X64-NEXT: .p2align 4, 0x90
; X64-NEXT: .p2align 4
; X64-NEXT: .LBB1_1: # %loop
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: movl (%rdi), %ecx
@ -88,7 +88,7 @@ define void @foo_loop(ptr nocapture %ctx, i32 %n) local_unnamed_addr #0 {
; X86-NEXT: .cfi_offset %edi, -8
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .p2align 4
; X86-NEXT: .LBB1_1: # %loop
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: movl (%eax), %esi

2
llvm/test/CodeGen/X86/licm-symbol.ll
View File

@ -6,7 +6,7 @@
; CHECK: pushl
; CHECK: movl $176, %esi
; CHECK: addl L___sF$non_lazy_ptr, %esi
; CHECK: .p2align 4, 0x90
; CHECK: .p2align 4
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-darwin8"

2
llvm/test/CodeGen/X86/loop-search.ll
View File

@ -12,7 +12,7 @@ define zeroext i1 @search(i32 %needle, ptr nocapture readonly %haystack, i32 %co
; CHECK-NEXT: ## %bb.1: ## %for.body.preheader
; CHECK-NEXT: movslq %edx, %rax
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_2: ## %for.body
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
; CHECK-NEXT: cmpl %edi, (%rsi,%rcx,4)

2
llvm/test/CodeGen/X86/loop-strength-reduce5.ll
View File

@ -13,7 +13,7 @@ define void @foo(i32 %N) nounwind {
; CHECK-NEXT: # %bb.1: # %bb.preheader
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %bb
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: movw %dx, X

4
llvm/test/CodeGen/X86/loop-strength-reduce7.ll
View File

@ -13,13 +13,13 @@ define fastcc void @outer_loop(ptr nocapture %gfp, ptr nocapture %xr, i32 %targ_
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: movl $88, %eax
; CHECK-NEXT: movl $168, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_2: ## %bb28.i37
; CHECK-NEXT: ## =>This Loop Header: Depth=1
; CHECK-NEXT: ## Child Loop BB0_3 Depth 2
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: movl %eax, %esi
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: LBB0_3: ## %bb29.i38
; CHECK-NEXT: ## Parent Loop BB0_2 Depth=1
; CHECK-NEXT: ## => This Inner Loop Header: Depth=2

10
llvm/test/CodeGen/X86/lsr-addrecloops.ll
View File

@ -16,7 +16,7 @@ define void @in4dob_(ptr nocapture writeonly %0, ptr nocapture readonly %1, ptr
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: jmp .LBB0_1
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_20: # in Loop: Header=BB0_1 Depth=1
; CHECK-NEXT: incq %r10
; CHECK-NEXT: addq %r9, %rax
@ -46,7 +46,7 @@ define void @in4dob_(ptr nocapture writeonly %0, ptr nocapture readonly %1, ptr
; CHECK-NEXT: andq $-8, %r10
; CHECK-NEXT: xorl %r9d, %r9d
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_6: # %vector.body807
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leaq (%rdi,%r9), %r11
@ -68,7 +68,7 @@ define void @in4dob_(ptr nocapture writeonly %0, ptr nocapture readonly %1, ptr
; CHECK-NEXT: addq %rdi, %r9
; CHECK-NEXT: xorl %r10d, %r10d
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_9: # %vector.body807.epil
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leaq (%r9,%r10), %r11
@ -95,7 +95,7 @@ define void @in4dob_(ptr nocapture writeonly %0, ptr nocapture readonly %1, ptr
; CHECK-NEXT: andq $-8, %rdx
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_14: # %vector.body847
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leaq (%rdi,%rcx), %r8
@ -117,7 +117,7 @@ define void @in4dob_(ptr nocapture writeonly %0, ptr nocapture readonly %1, ptr
; CHECK-NEXT: leaq 96(%rcx,%rdi), %rcx
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_17: # %vector.body847.epil
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
; CHECK-NEXT: leaq (%rcx,%rdx), %rdi

4
llvm/test/CodeGen/X86/lsr-interesting-step.ll
View File

@ -10,12 +10,12 @@ define void @foo() nounwind {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl $2, %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_1: # %bb7
; CHECK-NEXT: # =>This Loop Header: Depth=1
; CHECK-NEXT: # Child Loop BB0_2 Depth 2
; CHECK-NEXT: movl $2, %ecx
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %bb11
; CHECK-NEXT: # Parent Loop BB0_1 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2

8
llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll
View File

@ -22,7 +22,7 @@ define void @t(ptr nocapture %in, ptr nocapture %out, ptr nocapture %rk, i32 %r)
; GENERIC-NEXT: movq _Te1@GOTPCREL(%rip), %rax
; GENERIC-NEXT: movq _Te3@GOTPCREL(%rip), %r10
; GENERIC-NEXT: movq %rcx, %r11
; GENERIC-NEXT: .p2align 4, 0x90
; GENERIC-NEXT: .p2align 4
; GENERIC-NEXT: LBB0_1: ## %bb
; GENERIC-NEXT: ## =>This Inner Loop Header: Depth=1
; GENERIC-NEXT: movzbl %r8b, %r14d
@ -105,7 +105,7 @@ define void @t(ptr nocapture %in, ptr nocapture %out, ptr nocapture %rk, i32 %r)
; ATOM-NEXT: movq _Te3@GOTPCREL(%rip), %r10
; ATOM-NEXT: decl %ecx
; ATOM-NEXT: movq %rcx, %r11
; ATOM-NEXT: .p2align 4, 0x90
; ATOM-NEXT: .p2align 4
; ATOM-NEXT: LBB0_1: ## %bb
; ATOM-NEXT: ## =>This Inner Loop Header: Depth=1
; ATOM-NEXT: movl %r15d, %ebx
@ -315,7 +315,7 @@ define i32 @f(i32 %i, ptr nocapture %a) nounwind uwtable readonly ssp {
; GENERIC-NEXT: leaq (%rsi,%rax,4), %rcx
; GENERIC-NEXT: xorl %eax, %eax
; GENERIC-NEXT: xorl %edx, %edx
; GENERIC-NEXT: .p2align 4, 0x90
; GENERIC-NEXT: .p2align 4
; GENERIC-NEXT: LBB1_2: ## %for.body
; GENERIC-NEXT: ## =>This Inner Loop Header: Depth=1
; GENERIC-NEXT: movl (%rcx), %esi
@ -339,7 +339,7 @@ define i32 @f(i32 %i, ptr nocapture %a) nounwind uwtable readonly ssp {
; ATOM-NEXT: xorl %edx, %edx
; ATOM-NEXT: leaq (%rsi,%rax,4), %rcx
; ATOM-NEXT: xorl %eax, %eax
; ATOM-NEXT: .p2align 4, 0x90
; ATOM-NEXT: .p2align 4
; ATOM-NEXT: LBB1_2: ## %for.body
; ATOM-NEXT: ## =>This Inner Loop Header: Depth=1
; ATOM-NEXT: movl (%rcx), %esi

6
llvm/test/CodeGen/X86/lsr-negative-stride.ll
View File

@ -23,12 +23,12 @@ define i32 @t(i32 %a, i32 %b) nounwind {
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: retl
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %bb.outer
; CHECK-NEXT: # =>This Loop Header: Depth=1
; CHECK-NEXT: # Child Loop BB0_3 Depth 2
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_3: # %bb
; CHECK-NEXT: # Parent Loop BB0_2 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
@ -40,7 +40,7 @@ define i32 @t(i32 %a, i32 %b) nounwind {
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: jne .LBB0_3
; CHECK-NEXT: jmp .LBB0_6
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_5: # %cond_false
; CHECK-NEXT: # in Loop: Header=BB0_2 Depth=1
; CHECK-NEXT: subl %edx, %ecx

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