3458 Commits

Author SHA1 Message Date
Nikita Popov
03cb46d248
[CodeGen] Use getSignedConstant() in more places (#127501)
Use getSignedConstant() in a few more places, based on a search of
`\bgetConstant(-`. Most of these were fine as-is (e.g. because they work
on 64-bits), but I think it's better to use getSignedConstant()
consistently for negative numbers.
2025-02-18 09:29:25 +01:00
Craig Topper
62254f6615
[Targets] Move *TargetStreamer.h files into their MCTargetDesc directory. (#127433)
These files are included from MCTargetDesc so should be there instead of in
the main directory for the target.
2025-02-17 09:51:01 -08:00
Brian Cain
788cb725d8
[Hexagon] Explicitly truncate constant in UAddSubO (#127360)
After #117558 landed, this code would assert "Value is not an N-bit
unsigned value" in getConstant(), from a test case in zig.

Co-authored-by:  Craig Topper <craig.topper@sifive.com>
Fixes #127296
2025-02-17 09:30:48 -06:00
Kazu Hirata
d49776634e
[Hexagon] Avoid repeated map lookups (NFC) (#127447) 2025-02-17 01:32:47 -08:00
Craig Topper
d150101160 [Hexagon] Use MCRegister. NFC 2025-02-16 14:00:51 -08:00
Kazu Hirata
7e7a3623b4
[Hexagon] Avoid repeated map lookups (NFC) (#127304) 2025-02-15 01:38:00 -08:00
Jason Eckhardt
96ce8cadf9
[NFC][Lanai][Hexagon] Define DEBUG_TYPE after including Debug.h. (#125440)
This patch fixes some warnings/errors that occur with certain
compilers-- due to existing code not following the idiom mentioned in
`Debug.h`:

```
// LLVM_DEBUG() requires the DEBUG_TYPE macro to be defined. Set it to "foo"
// specify that your debug code belongs to class "foo". **Be careful that you only
// do this after including Debug.h and not around any #include of headers.**
```
2025-02-12 08:32:59 -06:00
quic-areg
1bf1f13be9
[Hexagon][Disassembler] Set CommentStream of Disassembler (#126766)
Sets CommentStream after assert added in #125962.
2025-02-11 13:20:38 -06:00
Sudharsan Veeravalli
27c034a9c6
[Hexagon] Fix typos discovered by codespell (NFC) (#126233)
Found using https://github.com/codespell-project/codespell

```
codespell Hexagon --write-changes \
     --ignore-words-list=CarryIn,CreateOr,ORE,COPYs,ArchVer,predicable,UE,MIs,isNT,Vor,CountR,DUM,GEs,AddD,ToI, \
     CopyIn,TheI,TotalIn,vor,MOne,contigious,Contigious 
```
2025-02-11 11:31:31 +05:30
Kazu Hirata
46f5662ebc
[Hexagon] Avoid repeated map lookups (NFC) (#126185) 2025-02-07 07:58:49 -08:00
Kazu Hirata
e9dd4a8409
[Hexagon] Avoid repeated map lookups (NFC) (#125815) 2025-02-05 07:19:05 -08:00
Christudasan Devadasan
a47c35a699
[CodeGen] Move MISched target hooks into TargetMachine (#125700)
The createSIMachineScheduler & createPostMachineScheduler
target hooks are currently placed in the PassConfig interface.
Moving it out to TargetMachine so that both legacy and
the new pass manager can effectively use them.
2025-02-05 11:41:37 +05:30
Brian Cain
048f533244
[Hexagon] Fix -Wuninitialized warning (#125565)
`gcc (GCC) 14.2.1 20240910` reports the warning below on the baseline,
this change fixes the warning.

In file included from
/home/user/CLionProjects/llvm-project/llvm/lib/Target/Hexagon/BitTracker.cpp:55:

/home/user/CLionProjects/llvm-project/llvm/lib/Target/Hexagon/BitTracker.h:
In constructor ‘llvm::BitTracker::UseQueueType::UseQueueType()’:

/home/user/CLionProjects/llvm-project/llvm/lib/Target/Hexagon/BitTracker.h:75:27:
warning: member ‘llvm::BitTracker::UseQueueType::Dist’ is used
uninitialized [-Wuninitialized]
       75 |     UseQueueType() : Uses(Dist) {}
          |                           ^~~~

Fixes #125545
2025-02-04 22:11:15 -06:00
Kazu Hirata
546d03cf8b
[Hexagon] Avoid repeated hash lookups (NFC) (#125459) 2025-02-03 12:28:31 -08:00
Craig Topper
473953a15f
[CodeGen] Use non-static Register::virtRegIndex() instead of static Register::virtReg2Index. NFC (#125031)
These are the the ones where we already had a Register object being
used. Some places are still using unsigned which I did not convert.
2025-01-30 00:14:08 -08:00
Craig Topper
dd3edc8365
[CodeGen] Add Register::stackSlotIndex(). Replace uses of Register::stackSlot2Index. NFC (#125028) 2025-01-29 23:02:07 -08:00
quic-areg
61ea63baaf
[Hexagon] Add support for decoding PLT symbols (#123425)
Describes PLT entries for hexagon.
2025-01-29 15:37:23 -06:00
Jay Foad
aa2952165c
Fix typo "tranpose" (#124929) 2025-01-29 17:49:54 +00:00
Jeremy Morse
34b139594a
[NFC][DebugInfo] Switch more call-sites to using iterator-insertion (#124283)
To finalise the "RemoveDIs" work removing debug intrinsics, we're
updating call sites that insert instructions to use iterators instead.
This set of changes are those where it's not immediately obvious that
just calling getIterator to fetch an iterator is correct, and one or two
places where more than one line needs to change.

Overall the same rule holds though: iterators generated for the start of
a block such as getFirstNonPHIIt need to be passed into insert/move
methods without being unwrapped/rewrapped, everything else can use
getIterator.
2025-01-27 16:44:14 +00:00
Jeremy Morse
e14962a39c
[NFC][DebugInfo] Use iterators for instruction insertion in more places (#124291)
As part of the "RemoveDIs" work to eliminate debug intrinsics, we're
replacing methods that use Instruction*'s as positions with iterators.
This patch changes some more complex call-sites, those crossing file
boundaries and where I've had to perform some minor rewrites.
2025-01-27 15:25:17 +00:00
Jeremy Morse
6292a808b3
[NFC][DebugInfo] Use iterator-flavour getFirstNonPHI at many call-sites (#123737)
As part of the "RemoveDIs" project, BasicBlock::iterator now carries a
debug-info bit that's needed when getFirstNonPHI and similar feed into
instruction insertion positions. Call-sites where that's necessary were
updated a year ago; but to ensure some type safety however, we'd like to
have all calls to getFirstNonPHI use the iterator-returning version.

This patch changes a bunch of call-sites calling getFirstNonPHI to use
getFirstNonPHIIt, which returns an iterator. All these call sites are
where it's obviously safe to fetch the iterator then dereference it. A
follow-up patch will contain less-obviously-safe changes.

We'll eventually deprecate and remove the instruction-pointer
getFirstNonPHI, but not before adding concise documentation of what
considerations are needed (very few).

---------

Co-authored-by: Stephen Tozer <Melamoto@gmail.com>
2025-01-24 13:27:56 +00:00
Jeremy Morse
8e70273509
[NFC][DebugInfo] Use iterator moveBefore at many call-sites (#123583)
As part of the "RemoveDIs" project, BasicBlock::iterator now carries a
debug-info bit that's needed when getFirstNonPHI and similar feed into
instruction insertion positions. Call-sites where that's necessary were
updated a year ago; but to ensure some type safety however, we'd like to
have all calls to moveBefore use iterators.

This patch adds a (guaranteed dereferenceable) iterator-taking
moveBefore, and changes a bunch of call-sites where it's obviously safe
to change to use it by just calling getIterator() on an instruction
pointer. A follow-up patch will contain less-obviously-safe changes.

We'll eventually deprecate and remove the instruction-pointer
insertBefore, but not before adding concise documentation of what
considerations are needed (very few).
2025-01-24 10:53:11 +00:00
Hua Tian
a9d2834508
[llvm][CodeGen] Fix the issue caused by live interval checking in window scheduler (#123184)
At some corner cases, the cloned MI still retains an old slot index,
which leads to the compiler crashing. This patch update the slot index
map before delete the recycled MI.

https://github.com/llvm/llvm-project/issues/123165
2025-01-23 09:39:03 +08:00
Venkata Ramanaiah Nalamothu
f7d8336a2f
[llvm] Pass MachineInstr flags to storeRegToStackSlot/loadRegFromStackSlot (NFC) (#120622)
This patch is in preparation to enable setting the MachineInstr::MIFlag
flags, i.e. FrameSetup/FrameDestroy, on callee saved register
spill/reload instructions in prologue/epilogue. This eventually helps in
setting the prologue_end and epilogue_begin markers more accurately.

The DWARF Spec in "6.4 Call Frame Information" says:

The code that allocates space on the call frame stack and performs the
save
operation is called the subroutine’s prologue, and the code that
performs
the restore operation and deallocates the frame is called its epilogue.

which means the callee saved register spills and reloads are part of
prologue (a.k.a frame setup) and epilogue (a.k.a frame destruction),
respectively. And, IIUC, LLVM backend uses FrameSetup/FrameDestroy flags
to identify instructions that are part of call frame setup and
destruction.

In the trunk, while most targets consistently set
FrameSetup/FrameDestroy on save/restore call frame information (CFI)
instructions of callee saved registers, they do not consistently set
those flags on the actual callee saved register spill/reload
instructions.

I believe this patch provides a clean mechanism to set
FrameSetup/FrameDestroy flags on the actual callee saved register
spill/reload instructions as needed. And, by having default argument of
MachineInstr::NoFlags for Flags, this patch is a NFC.

With this patch, the targets have to just pass FrameSetup/FrameDestroy
flag to the storeRegToStackSlot/loadRegFromStackSlot calls from the
target derived spillCalleeSavedRegisters and restoreCalleeSavedRegisters
to set those flags on callee saved register spill/reload instructions.

Also, this patch makes it very easy to set the source line information
on callee saved register spill/reload instructions which is needed by
the DwarfDebug.cpp implementation to set prologue_end and epilogue_begin
markers more accurately.

As per DwarfDebug.cpp implementation:

prologue_end is the first known non-DBG_VALUE and non-FrameSetup
location
    that marks the beginning of the function body

epilogue_begin is the first FrameDestroy location that has been seen in
the
    epilogue basic block

With this patch, the targets have to just do the following to set the
source line information on callee saved register spill/reload
instructions, without hampering the LLVM's efforts to avoid adding
source line information on the artificial code generated by the
compiler.

    <Foo>InstrInfo::storeRegToStackSlot() {
    ...
      DebugLoc DL =
Flags & MachineInstr::FrameSetup ? DebugLoc() : MBB.findDebugLoc(I);
    ...
    }

    <Foo>InstrInfo::loadRegFromStackSlot() {
    ...
      DebugLoc DL =
Flags & MachineInstr::FrameDestroy ? MBB.findDebugLoc(I) : DebugLoc();
    ...
    }

While I understand this patch would break out-of-tree backend builds, I
think it is in the right direction.

One immediate use case that can benefit from this patch is fixing
#120553 becomes simpler.
2025-01-22 13:36:39 +05:30
yingopq
754ed95b66
[Mips] Fix compiler crash when returning fp128 after calling a functi… (#117525)
…on returning { i8, i128 }

Fixes https://github.com/llvm/llvm-project/issues/96432.
2025-01-20 16:47:40 +08:00
Patryk Wychowaniec
814b34f31e
[AVR] Force relocations for non-encodable jumps (#121498)
This commit changes the branch emission logic so that instead of
throwing the "branch target out of range" error, we emit a relocation
instead.
2025-01-20 09:23:57 +08:00
Brian Cain
d8a68fe680
[Hexagon] Omit calls to specialized {float,fix} routines (#117423)
These were introduced in 1213a7a57fdc (Hexagon backend support,
2011-12-12) but they aren't present in libclangrt.builtins-hexagon. The
generic versions of these functions are present in the builtins, though.
So it should suffice to call those instead.
2025-01-15 14:21:48 -06:00
Ikhlas Ajbar
71f238a221
[Hexagon] Add missing builtins for V79 (#122916)
This patch adds new builtins that were added in V79 architecture.
2025-01-14 12:21:40 -06:00
Santanu Das
9d7df23f4d
[Hexagon] Add missing pattern for v8i1 type (#120703)
HexagonISD::PFALSE and PTRUE patterns do not form independently in
general as they are treated like operands of all 0s or all 1s. Eg: i32 =
transfer HEXAGONISD::PFALSE.
In this case, v8i1 = HEXAGONISD::PFALSE is formed independently without
accompanying opcode.

This patch adds a pattern to transfer all 0s or all 1s to a scalar
register and then use that register and this PFALSE/PTRUE opcode to
transfer to a predicate register like v8i1.
2025-01-10 09:54:02 -06:00
swalk-qualcomm
75781fa3c7
Hexagon loop idiom pass segfaults when -debug present (#121828)
There was an unprotected use of a function that could return the null
pointer.

---------

Co-authored-by: Steve Walk <walk@qti.qualcomm.com>
2025-01-08 13:58:49 -06:00
Ikhlas Ajbar
c2b89fc9e4
[Hexagon] Add V79 support to compiler and assembler (#120983)
This patch introduces support for the Hexagon V79 architecture. It
includes instruction formats, definitions, encodings, scheduling
classes, and builtins/intrinsics. It also adds missing Hexagon v73
builtins to clang.
2024-12-23 13:36:28 -06:00
Fangrui Song
3fa5b52714 [MC] Decrease direct access to getContents()
to make it easier to store fragment contents out-of-line. Loosely based
on Alexis Engelke's prototype.
2024-12-21 17:14:26 -08:00
Ikhlas Ajbar
8b37c1c71b
[Hexagon] Add V75 support to compiler and assembler (#120773)
This patch introduces support for the Hexagon V75 architecture. It
includes instruction formats, definitions, encodings, scheduling
classes, and builtins/intrinsics.
2024-12-20 14:01:58 -06:00
Santanu Das
6780ab371f
[Hexagon] Add support for addrspacecast lowering (#119195)
This patch adds support for addrspacecast lowering. At the moment, there
are no separate address spaces for Hexagon target, hence this
instruction is treated as a noop.
2024-12-20 11:20:37 -06:00
Ikhlas Ajbar
8177bf5022
[Hexagon] Only handle simple types memory accesses (#120654)
The code was asserting because allowsMemoryAccess() was called with
Extended Value Type INVALID_SIMPLE_VALUE_TYPE in
HexagonISelLowering.cpp.
Fixes https://github.com/llvm/llvm-project/issues/118881
2024-12-20 09:41:30 -06:00
Craig Topper
f139bde8d8
[SelectionDAG] Move SDNode::use_iterator::getOperandNo to SDUse. (#120536)
This allows us to write more range based for loops because we no
longer need the iterator. It also matches IR's Use class.
2024-12-19 09:07:42 -08:00
Craig Topper
e6b2495545
[SelectionDAG] Split SDNode::use_iterator into user_iterator and use_iterator. (#120531)
SDNode::use_iterator now returns an SDUse& when dereferenced.
SDNode::user_iterator returns SDNode*. SDNode::use_begin/use_end/uses
work on use_iterator. SDNode::user_begin/user_end/users work on
user_iterator.

We can now write range based for loops using SDUse& and SDNode::uses().
I've converted many of these in this patch. I didn't update loops that
have additional variables updated in their for statement.

Some loops use SDNode::use_iterator::getOperandNo() which also prevents
using range based for loops. I plan to move this into SDUse in a follow
up patch.
2024-12-19 08:35:32 -08:00
Craig Topper
bd261ecc5a
[SelectionDAG] Add SDNode::user_begin() and use it in some places (#120509)
Most of these are just places that want the first user and aren't
iterating over the whole list.

While there I changed some use_size() == 1 to hasOneUse() which
is more efficient.

This is part of an effort to rename use_iterator to user_iterator
and provide a use_iterator that dereferences to SDUse&. This patch
helps reduce the diff on later patches.
2024-12-18 22:13:04 -08:00
Craig Topper
104ad9258a
[SelectionDAG] Rename SDNode::uses() to users(). (#120499)
This function is most often used in range based loops or algorithms
where the iterator is implicitly dereferenced. The dereference returns
an SDNode * of the user rather than SDUse * so users() is a better name.

I've long beeen annoyed that we can't write a range based loop over
SDUse when we need getOperandNo. I plan to rename use_iterator to
user_iterator and add a use_iterator that returns SDUse& on dereference.
This will make it more like IR.
2024-12-18 20:09:33 -08:00
Ramkumar Ramachandra
4a0d53a0b0
PatternMatch: migrate to CmpPredicate (#118534)
With the introduction of CmpPredicate in 51a895a (IR: introduce struct
with CmpInst::Predicate and samesign), PatternMatch is one of the first
key pieces of infrastructure that must be updated to match a CmpInst
respecting samesign information. Implement this change to Cmp-matchers.

This is a preparatory step in migrating the codebase over to
CmpPredicate. Since we no functional changes are desired at this stage,
we have chosen not to migrate CmpPredicate::operator==(CmpPredicate)
calls to use CmpPredicate::getMatching(), as that would have visible
impact on tests that are not yet written: instead, we call
CmpPredicate::operator==(Predicate), preserving the old behavior, while
also inserting a few FIXME comments for follow-ups.
2024-12-13 14:18:33 +00:00
paperchalice
1562b70eaf
Reapply "[DomTreeUpdater] Move critical edge splitting code to updater" (#119547)
This relands commit #115111.
Use traditional way to update post dominator tree, i.e. break critical
edge splitting into insert, insert, delete sequence.
When splitting critical edges, the post dominator tree may change its
root node, and `setNewRoot` only works in normal dominator tree...
See

6c7e5827ed/llvm/include/llvm/Support/GenericDomTree.h (L684-L687)
2024-12-13 11:43:09 +08:00
Owen Anderson
6f3f08abdc
CodeGen: Eliminate dynamic relocations in the register superclass tables. (#119487)
This reapplies #119122 with a fix for UBSAN errors in the X86 backend
related
to incrementing a nullptr.
2024-12-12 10:17:32 +13:00
paperchalice
553058f825
Revert "[DomTreeUpdater] Move critical edge splitting code to updater" (#119512)
Reverts llvm/llvm-project#115111 Causes #119511
2024-12-11 14:25:17 +08:00
paperchalice
79047fac65
[DomTreeUpdater] Move critical edge splitting code to updater (#115111)
Support critical edge splitting in dominator tree updater. Continue the
work in #100856.

Compile time check:
https://llvm-compile-time-tracker.com/compare.php?from=87c35d782795b54911b3e3a91a5b738d4d870e55&to=42b3e5623a9ab4c3648564dc0926b36f3b438a3a&stat=instructions%3Au
2024-12-11 11:31:42 +08:00
Owen Anderson
e940353fd2 Revert "CodeGen: Eliminate dynamic relocations in the register superclass tables. (#119122)"
Reverting due to UBSan failures in X86RegisterInfo::getLargestLegalSuperClass

This reverts commit c4873819a98f59ce4e2664f94c73c2dfec3393f8.
2024-12-11 13:45:17 +13:00
Owen Anderson
c4873819a9
CodeGen: Eliminate dynamic relocations in the register superclass tables. (#119122) 2024-12-11 12:36:51 +13:00
Brian Cain
7748492c37
[hexagon] Add support for llvm.debugtrap (#117049)
Also: set `hasSideEffects` on `Y2_break` instruction.
2024-12-04 12:10:29 -06:00
Nikita Popov
4851dbb8d6 [Hexagon] Use getSignedConstant for RoundTo8 XForm
To handle negative offset addrmodes correctly.

Fixes https://github.com/llvm/llvm-project/pull/117558#issuecomment-2510208764.
2024-12-02 09:57:51 +01:00
Craig Topper
bc282605df
[SelectionDAG] Require last operand of (STRICT_)FP_ROUND to be a TargetConstant. (#117639)
Fix all the places I could find that did't do this. We were already
mostly correct for FP_ROUND after
9a976f36615dbe15e76c12b22f711b2e597a8e51, but not STRICT_FP_ROUND.
2024-11-25 21:36:33 -08:00
Yashas Andaluri
028d41d7cf
[Hexagon] Add Hexagon Load Widening Pass (#116330)
Extend existing store widening pass to widen load instructions.

This patch also borrows the alias check algorithm from AMDGPU's load
store widening pass.

Widened load instruction is inserted before the first candidate load
instruction.
Widened store instruction is inserted after the last candidate store
instruction.
This method helps avoid moving uses/defs when replacing load/store
instructions with their widened equivalents.

The pass has also been extended to
* Generate 64-bit widened stores
* Handle 32-bit post increment load/store
* Handle stores of non-immediate values
* Handle stores where the offset is a GlobalValue
2024-11-22 15:17:30 -06:00