27637 Commits

Author SHA1 Message Date
David Sherwood
ceb02379a9
[LoopVectorize] Improve algorithm for hoisting runtime checks (#73515)
When attempting to hoist runtime checks out of a loop we currently avoid
creating pointer diff checks and prefer to do expanded range checks
instead. This gives us the opportunity to hoist runtime checks out of a
loop, since these checks are loop invariant. However, in some cases the
pointer diff checks would also be loop invariant and so will naturally
get hoisted. Therefore, since diff checks are cheaper so we should
prefer to use those instead.
2023-12-12 09:10:39 +00:00
Nilanjana Basu
41a3828838
[LV] Added pre-commit tests for changing loop interleaving count computation (#74689)
Added more pre-commit tests for evaluating changes to loop interleaving count computation in (https://github.com/llvm/llvm-project/pull/73766). The new set of tests address the change in IC computation to minimize the remainder TC of the vectorized loop while maximizing the IC when the
remainder TC is the same.
2023-12-12 11:09:25 +05:30
Nikita Popov
97efd8aa43 [InstCombine] Preserve inalloca tag when transforming alloca
This is not meaningful in any practical sense, and just makes sure
we don't cause verifier failures.
2023-12-11 14:27:00 +01:00
Florian Hahn
19918ac34d
[VPlan] Mark Select VPInstructions as not having sideeffects.
Select VPInstructions don't have sideeffects, mark them accordingly.
2023-12-11 12:26:32 +00:00
Wang Pengcheng
6aa6ef73ec
[MemCpyOpt] Don't perform call slot opt if alloc type is scalable (#75027)
This fixes #75010.
2023-12-11 19:45:13 +08:00
paperchalice
cd6e462d01
[CodeGen] Port InterleavedAccess to new pass manager (#74904) 2023-12-10 19:15:51 +08:00
Yingwei Zheng
312cb34da6
[Reassociate] Preserve NUW flags after expr tree rewriting (#72360)
Alive2: https://alive2.llvm.org/ce/z/38KiC_
2023-12-09 16:45:48 +08:00
Florian Hahn
a5891fa4d2
[VPlan] Initial modeling of VF * UF as VPValue. (#74761)
This patch starts initial modeling of VF * UF in VPlan.
Initially, introduce a dedicated VFxUF VPValue, which is then
populated during VPlan::prepareToExecute. Initially, the VF * UF
applies only to the main vector loop region. Once we extend the
scope of VPlan in the future, we may want to associate different VFxUFs
with different vector loop regions (e.g. the epilogue vector loop)

This allows explicitly parameterizing recipes that rely on the
VF * UF, like the canonical induction increment. At the moment, this
mainly helps to avoid generating some duplicated calls to vscale with
scalable vectors. It should also allow using EVL as induction increments
explicitly in D99750. Referring to VF * UF is also needed in other
places that we plan to migrate to VPlan, like the minimum trip count
check during skeleton creation.

The first version creates the value for VF * UF directly in
prepareToExecute to limit the scope of the patch. A follow-on patch will
model VF * UF computation explicitly in VPlan using recipes.

Moved from Phabricator (https://reviews.llvm.org/D157322)
2023-12-08 18:30:30 +00:00
Nikita Popov
7686d49517 [ValueTracking] Handle returned attribute with mismatched type
The returned attribute can be used when it is possible to
"losslessly bitcast" between the argument and return type,
including between two vector types.

computeKnownBits() would crash in this case, isKnownNonZero()
would potentially produce a miscompile.

Fixes https://github.com/llvm/llvm-project/issues/74722.
2023-12-08 17:05:13 +01:00
Nikita Popov
4a2a6397f1 [InstCombine] Relax one-use check for icmp of gep fold
Instead of checking whether the GEP as a whole is constant, only
check whether it has constant incides. This matches what we do in
other places in this code.

This has little practical impact, because it is mostly already
handled through other cases anyway. We see a difference for
non-inbounds equality comparisons.
2023-12-08 15:45:58 +01:00
Nikita Popov
cf029a22bd [InstCombine] Add some more multi-use icmp gep folding tests (NFC) 2023-12-08 15:45:58 +01:00
Florian Hahn
5ea6a3fc6d
[VPlan] Compute scalable VF in preheader for induction increment. (#74762)
UF * VF is loop invariant and can be computed directly in the preheader.
This prepares the code for #74761 and reduces the test changes.
2023-12-08 12:18:31 +00:00
XiangZhang
1d6a678591
[LoopUnroll] Make use of MaxTripCount for loops with "#pragma unroll" (#74703)
Fix loop unroll fail caused by branches folding.

For example:
SimplifyCFG foldloop branches then cause loop unroll failed for "#program unroll" loop.
```
#program unroll
for (int I = 0; I < ConstNum; ++I) { // folding "I < ConstNum" and "Cond2"
  if (Cond2) {
  break;
  }
  xxx loop body;
}
```

The pragma unroll metadata only takes effect if there is an exact trip
count, but not if there is an upper bound trip count. This patch make it
work with an upper bound trip count as well in shouldPragmaUnroll().

Loop unroll is important in stack nervous devices (e.g. GPU, and that is
why a lot of GPU code mark loop with "#program unroll").
It usually much simplify the address (offset) calculations in old
iterations, then we can do a lot of others optimizations, e.g, SROA, for
these simplifed address (escape alloca the whole aggregates).
2023-12-08 19:43:10 +08:00
Florian Hahn
633fe60149
[VPlan] Print flags for VPWidenCastRecipe.
Update VPWidenCastRecipe to also print flags. Simplify nneg printing
test and replace hard-coded value number references with patterns.
2023-12-08 10:48:54 +00:00
Nikita Popov
cf47af493b
[InstCombine] Generalize folds for inversion of icmp operands (#74317)
We have a bunch of folds that basically perform X pred Y to ~Y pred ~X
for various special cases where this saves an instruction.

Generalize these folds to use isFreeToInvert(). We have to make sure
that we consume an instruction in either of the inversions, otherwise
we're just going to swap the icmp back and forth.

Fixes https://github.com/llvm/llvm-project/issues/74302.
2023-12-08 11:25:41 +01:00
Graham Hunter
d0d5ef8133
[LV] Add support for linear arguments for vector function variants (#73941)
If we have vectorized variants of a function which take linear
parameters, we should be able to vectorize assuming the strides match.
2023-12-08 10:24:05 +00:00
Ramkumar Ramachandra
b0f560b8ea
LoopVectorize/test: fix opt invocations with -march (NFC) (#74462)
opt accepts the -march command-line argument, but this argument only
makes sense in conjunction with -mtriple. Fix a couple of tests under
LoopVectorize that invoke opt with -march but without -mtriple, to avoid
confusing users.
2023-12-08 09:56:55 +00:00
Sizov Nikita
827f8a7ef6
Add opt with ctlz and shifts of power of 2 constants (#74175)
This patch does the following simplifications:
```
cttz(shl(C, X), 1) -> add(cttz(C, 1), X)
cttz(lshr exact(C, X), 1) -> sub(cttz(C, 1), X)
ctlz(lshr(C, X), 1) --> add(ctlz(C, 1), X)
ctlz(shl nuw (C, X), 1) --> sub(ctlz(C, 1), X)
```
Alive2: https://alive2.llvm.org/ce/z/9KHlKc
Closes #41333
2023-12-08 15:06:23 +08:00
Craig Topper
09a05f5dcb [InstCombine] Drop poison generating flags on Or in simplifyAssocCastAssoc.
Fixes #74739.
2023-12-07 13:35:28 -08:00
Craig Topper
c54cbf82b8 [InstCombine] Add test case for #74739. NFC 2023-12-07 13:35:28 -08:00
Philip Reames
ffb2af3ed6
[SCEVExpander] Attempt to reinfer flags dropped due to CSE (#72431)
LSR uses SCEVExpander to generate induction formulas. The expander
internally tries to reuse existing IR expressions. To do that, it needs
to strip any poison generating flags (nsw, nuw, exact, nneg, etc..)
which may not be valid for the newly added users.

This is conservatively correct, but has the effect that LSR will strip
nneg flags on zext instructions involved in trip counts in loop
preheaders. To avoid this, this patch adjusts the expanded to reinfer
the flags on the CSE candidate if legal for all possible users.

This should fix the regression reported in
https://github.com/llvm/llvm-project/issues/71200.

This should arguably be done inside canReuseInstruction instead, but
doing it outside is more conservative compile time wise. Both
canReuseInstruction and isGuaranteedNotToBePoison walk operand lists, so
right now we are performing work which is roughly O(N^2) in the size of
the operand graph. We should fix that before making the per operand step
more expensive. My tenative plan is to land this, and then rework the
code to sink the logic into more core interfaces.
2023-12-07 13:20:36 -08:00
Alexey Bataev
dd0e38eb34 [SLP]Add a test for missed insert_subvector pattern detection, NFC. 2023-12-07 10:46:14 -08:00
Philip Reames
04cbfcc33a [test][lsr] Add term-folding test cases with estimated trip counts 2023-12-07 10:34:29 -08:00
alex-t
d8cd7fc1f4
AlignmentFromAssumptions should only track pointer operand users (#73370)
AlignmentFromAssumptions uses SCEV to update the load/store alignment.
It tracks down the use-def chains for the pointer which it takes from
the assumption cache until it reaches the load or store instruction. It
mistakenly adds to the worklist the users of the load result
irrespective of the fact that the load result has no connection with the
original pointer, moreover, it is not a pointer at all in most cases.
Thus the def-use chain contains irrelevant load users. When it is a
store instruction the algorithm attempts to adjust its alignment to the
alignment of the original pointer. The problem appears when the load and
store memory operand pointers belong to different address spaces and
possibly have different sizes.
The 4bf015c035e4e5b63c7222dfb15ff274a5ed905c was an attempt to address a
similar problem. The truncation or zero extension was added to make
pointers the same size. That looks strange to me because the zero
extension of the pointer is not legal. The test in the
4bf015c035e4e5b63c7222dfb15ff274a5ed905c does not work any longer as for
the explicit address spaces conversion the addrspacecast is generated.
Summarize:
1. For the alloca to global address spaces conversion addrspacecasts are
used, so the code added by the 4bf015c035e4e5b63c7222dfb15ff274a5ed905c
is no longer functional.
2. The AlignmentFromAssumptions algorithm should not add the load users
to the worklist as they have nothing to do with the original pointer.
3. Instead we only track users that are: GetelementPtrIns, PHINodes.
2023-12-07 17:35:35 +01:00
Nikita Popov
9026dff382 [InstCombine] Add extra tests for known bits from dominating conds (NFC)
This adds test coverage for conditions with and/or.
2023-12-07 16:23:20 +01:00
Nikita Popov
6e8b17d821 [InstCombine] Support or disjoint in displaced shift fold
When I originally added this fold, it did not actually fix my
motivation case, where the add was represented as an or. Now that
we have the disjoint flag this can finally be cleanly supported.
2023-12-07 15:00:40 +01:00
Nikita Popov
04697aa18a [InstCombine] Add test for displaced shift fold with or disjoint (NFC) 2023-12-07 15:00:40 +01:00
Nikita Popov
f2f077898f [LoopVectorize] Regenerate test checks (NFC)
This test contains an annoying mix of generated and hand-written
check lines. Generate the whole test.
2023-12-07 14:37:10 +01:00
Nikita Popov
753c51bf88
[AST] Fix size merging for MustAlias sets (#73820)
AST checks aliasing with MustAlias sets by only checking the
representative pointer (getSomePointer). This is only correct if the
Size and AATags information of that pointer also includes the
Size/AATags of all other pointers in the set.

When we add a new pointer to the AliasSet, we do perform this update
(see the code in AliasSet::addPointer). However, if a pointer already in
the MustAlias set is used with a new size, we currently do not update
the representative pointer, resulting in miscompilations. Fix this by
adding the missing update.

This is a targeted fix using the current representation. There are a
couple of alternatives:
* For MustAlias sets, don't store per-pointer Size/AATags at all. This
would make it clear that there is only one set of common Size/AATags for
all pointers.
* Check against all pointers in the set even for MustAlias. This is what
https://github.com/llvm/llvm-project/pull/65731 proposes to do as part
of a larger change to AST representation.

Fixes https://github.com/llvm/llvm-project/issues/64897.
2023-12-07 10:45:48 +01:00
Craig Topper
533a0856bf Recommit "[Reassociate] Use disjoint flag to convert Or to Add. (#72772)"
Original message:
We still have to keep the noCommonBitsSet call to handle multiple reassociations in one pass. We'll lose the flag on the first reassociation.
2023-12-06 14:16:56 -08:00
Craig Topper
92fccea2e5 Revert "[Reassociate] Use disjoint flag to convert Or to Add. (#72772)"
This reverts commit 78964457cf1bafe57a54629fafbd081452a9e528.

Looks like I didn't rebase this correctly before commit
2023-12-06 13:50:21 -08:00
Craig Topper
78964457cf
[Reassociate] Use disjoint flag to convert Or to Add. (#72772)
We still have to keep the noCommonBitsSet call to handle multiple reassociations in one pass. We'll lose the flag on the first reassociation.
2023-12-06 13:48:15 -08:00
Oskar Wirga
81360ec582
[CFI] Fix Direct Call Issues in CFI Dispatch Table (#69663)
I discovered two issues for when a CFI dispatch table entry is used as a
direct call.
# Inlining
There is the possibility that the dispatch table entry contains only a
single function pointer:
```
; Function Attrs: naked nocf_check
define private void @.cfi.jumptable() #6 align 8 { entry:
  call void asm sideeffect "jmp ${0:c}@plt\0Aint3\0Aint3\0Aint3\0A", "s"(ptr @_Z7throw_ei)
  unreachable
}
```
If this function is inlined, the unreachable follows and ruins the
containing function.
# Exception Handling
The dispatch table is always marked NoUnwind. This is fine if the
entries are never used directly, but if a direct call is used which the
containing function expects to throw, it will no longer throw and the
exception handling code will be lost.
2023-12-06 12:56:59 -08:00
Alexey Bataev
0e1a9e3084 [SLP]Fix PR74607: Fix dependency between buildvector nodes with user
nodes, having same last instruction.

If the user nodes has the same last-instruction, used as insert points
for the buildvector nodes, finding the proper dependency is crucial.
  Before, it depended on the indices of the buildvectors themselves but
  looks like it should depend on indices of the user nodes, because it
  identifies the vectorization order and, thus, properly aligns
  buildvector nodes in terms of def-use chain.
2023-12-06 10:15:01 -08:00
Jeremy Morse
f85a38e21c Follow up to d0858bffa11, add missing REQUIRES x86 2023-12-06 17:48:50 +00:00
Jeremy Morse
d0858bffa1
[DebugInfo][RemoveDIs] Maintain DPValues on skipped instrs in CGP (#74602)
It turns out that CodeGenPrepare will skip over consecutive select
instructions as it knows it can optimise them all at the same time. This
is unfortunate for the RemoveDIs project to remove intrinsic-based
debug-info, because that means debug-info attached to those skipped
instructions doesn't get seen by optimizeInst and so updated. Add code
to handle debug-info on those skipped instructions manually.

This code will also have been slower when it had dbg.values stuffed in
between instructions, but with RemoveDIs it'll go faster because the
dbg.values won't break up the select sequence.
2023-12-06 17:25:33 +00:00
Nikita Popov
d77067d08a
[ValueTracking] Add dominating condition support in computeKnownBits() (#73662)
This adds support for using dominating conditions in computeKnownBits()
when called from InstCombine. The implementation uses a
DomConditionCache, which stores which branches may provide information
that is relevant for a given value.

DomConditionCache is similar to AssumptionCache, but does not try to do
any kind of automatic tracking. Relevant branches have to be explicitly
registered and invalidated values explicitly removed. The necessary
tracking is done inside InstCombine.

The reason why this doesn't just do exactly the same thing as
AssumptionCache is that a lot more transforms touch branches and branch
conditions than assumptions. AssumptionCache is an immutable analysis
and mostly gets away with this because only a handful of places have to
register additional assumptions (mostly as a result of cloning). This is
very much not the case for branches.

This change regresses compile-time by about ~0.2%. It also improves
stage2-O0-g builds by about ~0.2%, which indicates that this change results
in additional optimizations inside clang itself.

Fixes https://github.com/llvm/llvm-project/issues/74242.
2023-12-06 14:17:18 +01:00
Graham Hunter
f0f899932b
[LV] Linear argument tests for vectorization of function calls (#73936)
Tests to exercise vectorization of function calls where a vector variant
takes a linear parameter.
2023-12-06 11:55:03 +00:00
Nikita Popov
ea4ce16da2
[ConstraintElim] Use disjoint flag for decomposition (#74478)
Use the or disjoint flag for decomposing or into add, which will handle
cases that haveNoCommonBitsSet() may not be able to reinfer (e.g.
because they require context-sensitive facts, which the call here does
not use.)
2023-12-06 10:36:55 +01:00
Craig Topper
5c3496ff33
[InstCombine] Check isGuaranteedNotToBeUndef in haveNoCommonBitsSetSpecialCases. (#74390)
It's not safe for InstCombine to add disjoint metadata when converting
Add to Or otherwise.

I've added noundef attribute to preserve existing test behavior.
2023-12-05 10:33:44 -08:00
Florian Hahn
bbd1941a38
[VPlan] Add disjoint flag to VPRecipeWithIRFlags. (#74364)
A new disjoint flag was added for OR instructions in #72583. 

Update VPRecipeWithIRFlags to also support the new flag. This
allows printing and preserving the disjoint flag in vectorized code.
2023-12-05 15:21:59 +00:00
Nikita Popov
410bf5e142 [InstCombine] Use disjoint flag in mul of or fold
Slightly more powerful if the information used to infer disjoint
was lost.
2023-12-05 15:24:50 +01:00
Alexey Bataev
056367bb19
[LV]Support dropping of nneg flag for zext widencast recipes. (#74112)
Compiler crashes when the assertion triggered for zext nneg instruction,
that checks that the instruction cannot produce poison. Changed the base
class for widencast recipe to handle dropping nneg flag to avoid
compiler crash.
2023-12-05 09:17:23 -05:00
Nikita Popov
e4710872e9 [InstCombine] Use disjoint flag in add of or fold
Use disjoint instead of haveNoCommonBitsSet(), which is slightly
stronger in case the information used to infer disjoint has been
lost.

Introduce the m_DisjointOr() matcher to make handling cases like
this cleaner.
2023-12-05 15:06:40 +01:00
Nikita Popov
cd865e36db [InstCombine] Use disjoint flag instead of haveNoCommonBitsSet()
Slightly stronger, if disjoint was inferred earlier with information
that is no longer available.
2023-12-05 14:44:48 +01:00
Nikita Popov
eecb99c5f6 [Tests] Add disjoint flag to some tests (NFC)
These tests rely on SCEV looking recognizing an "or" with no common
bits as an "add". Add the disjoint flag to relevant or instructions
in preparation for switching SCEV to use the flag instead of the
ValueTracking query. The IR with disjoint flag matches what
InstCombine would produce.
2023-12-05 14:09:36 +01:00
Jeremy Morse
b21175258b
[DebugInfo][RemoveDIs] Avoid crash and output-difference in loop-rotate (#74093)
Avoid editing a range of DPValues and then remapping them. This occurs
when we try to de-duplicate dbg.values, but then re-use the same
iterator range. We can instead remap them, and then erase any
duplicates.

At the same time refactor the computation of seen-intrinsic hashes, and
account for a peculiarity of loop-rotates existing behaviour: it will
only deduplicate dbg.values that are immediately before the preheaders
branch instruction, not just any dbg.value in the preheader.
2023-12-05 11:22:07 +00:00
Mikhail Goncharov
0d0c229855 Revert "Reapply "ValueTracking: Identify implied fp classes by general fcmp (#66505)""
This reverts commit d55692d60d218f402ce107520daabed15f2d9ef6.

See discussion in #66505: assertion fires in OSS build of TensorFlow.
2023-12-05 11:10:24 +01:00
Nikita Popov
383e35048e [CaptureTracking] Treat vector GEPs as captures
Because AA does not support vectors of pointers, we have to
treat pointers that are inserted into a vector as captures. We
mostly already do so, but missed the case where getelementptr
is used to produce a vector.
2023-12-05 10:09:52 +01:00
Nikita Popov
292ecb8b81 [GVN] Add test for capture via vector GEP (NFC)
Reported at:
https://github.com/llvm/llvm-project/pull/69931#issuecomment-1839475854
2023-12-05 10:09:52 +01:00