27637 Commits

Author SHA1 Message Date
Joshua Cao
72ffaa9156
[IR][TRE] Support associative intrinsics (#74226)
There is support for intrinsics in Instruction::isCommunative, but there
is no equivalent implementation for isAssociative. This patch builds
support for associative intrinsics with TRE as an application. TRE can
now have associative intrinsics as an accumulator. For example:
```
struct Node {
  Node *next;
  unsigned val;
}

unsigned maxval(struct Node *n) {
  if (!n) return 0;
  return std::max(n->val, maxval(n->next));
}
```
Can be transformed into:
```
unsigned maxval(struct Node *n) {
  struct Node *head = n;
  unsigned max = 0; // Identity of unsigned std::max
  while (true) {
    if (!head) return max;
    max = std::max(max, head->val);
    head = head->next;
  }
  return max;
}
```
This example results in about 5x speedup in local runs.

We conservatively only consider min/max and as associative for this
patch to limit testing scope. There are probably other intrinsics that
could be considered associative. There are a few consumers of
isAssociative() that could be impacted. Testing has only required to
Reassociate pass be updated.
2023-12-04 22:35:59 -08:00
Joshua Cao
1334030f12 [TRE] Add tests for intrinsic accumulators 2023-12-04 22:25:38 -08:00
hev
a8874cf50b
[llvm][IR] Add per-global code model attribute (#72077)
This adds a per-global code model attribute, which can override the
target's code model to access global variables.

Suggested-by: Arthur Eubanks <aeubanks@google.com>
Link: https://discourse.llvm.org/t/how-to-best-implement-code-model-overriding-for-certain-values/71816
Link: https://discourse.llvm.org/t/rfc-add-per-global-code-model-attribute/74944
2023-12-05 09:42:53 +08:00
zhongyunde 00443407
d6f4d5209f [CGP][AArch64] Rebase the common base offset for better ISel
When all the large const offsets masked with the same value from bit-12 to bit-23.
Fold
  add     x8, x0, #2031, lsl #12
  add     x8, x8, #960
  ldr     x9, [x8, x8]
  ldr     x8, [x8, #2056]

into
  add     x8, x0, #2031, lsl #12
  ldr     x9, [x8, #960]
  ldr     x8, [x8, #3016]
2023-12-05 09:01:41 +08:00
Florian Hahn
d00c502ee5
[LV] Add tests for preserving and printing the new disjoint flag.
Tests for support for the disjoint flag added in #72583.
2023-12-04 20:12:11 +00:00
Florian Hahn
cd4348349a
[VPlan] Sink cases where no truncate is needed in truncateMinimalBWs.
MinBWs contains entries that specify the minimum required bitwidth. In
some cases, the old and new bitwidths can be equal (see test case) and
in those cases no truncations are needed, so skip those cases.

Fixes #74307.
2023-12-04 15:35:54 +00:00
Nikita Popov
8f40ef3479 [IndVarSimplify] Regenerate test checks (NFC) 2023-12-04 15:49:35 +01:00
Florian Hahn
99aa5311ee
[VPlan] Add missing output of live-ins to VPlan dot printing.
Split off live-in printing to VPlan::printLiveIns and use it to print
Live-ins when printing in the DOT format.
2023-12-04 13:41:28 +00:00
shaojingzhi
9a99a1a39e
[InstCombine] Add one-use limitation to box multiply fold (#72876)
Check the operands of I are used in no more than one place, which can
not be deleted, cause a mul instruction has far more weight than add and
shl instruction in IR, thus this method cannot achieve the goal of
simplifying instructions, just return null.
2023-12-04 14:14:59 +01:00
Florian Hahn
efec4cc501
[LV] Remove unused CHECK lines, remove IR references from test.
Clean up sve-tail-folding-option.ll by removing the unused
CHECK-TF-NEOVERSE-V1 prefix (note the use of non-opaque pointers) and
remove IR value references.
2023-12-04 13:06:30 +00:00
Nikita Popov
40a61458f5 [InstCombine] Add tests for #74302 (NFC) 2023-12-04 12:58:31 +01:00
Nikita Popov
1623292706 [InstCombine] Add test for #74242 (NFC) 2023-12-04 10:32:20 +01:00
Joshua Cao
4042fb8ce4 [TRE] Generate tests for accumulator recursion 2023-12-03 15:22:51 -08:00
Craig Topper
3e7ca05e93
[InstCombine] Use disjoint flag instead of calling haveNoCommonBitsSet. (#74222) 2023-12-03 12:34:49 -08:00
Florian Hahn
c890582912
[VPlan] Account for live-in entries in MinBW used by replicate recipes.
In some cases MinBWs may contain entries for live-ins that are not used
by VPWidenRecipe or VPWidenSelectRecipes. In those cases, the live-ins
won't get processed, so make sure we include them in the count when used
as operands in VPWidenCast and VPWidenSelectRecipe.

Fixes https://github.com/llvm/llvm-project/issues/74231
2023-12-03 11:15:29 +00:00
Craig Topper
5db1c6ed48 Revert "[InstCombine] Fix missed opportunity to fold 'or' into 'mul' operand. (#74225)"
This reverts commit e3b3c91dd0bbc8bd6f1ee562641daf1e554eb1b6.

This is causing an infinite loop on stage 2 builds.
2023-12-03 01:50:44 -08:00
Craig Topper
e3b3c91dd0
[InstCombine] Fix missed opportunity to fold 'or' into 'mul' operand. (#74225)
We were able to fold
or (mul X, Y), X --> mul X, (add Y, 1) (when the multiply has no common
bits with X)
    
This patch makes the transform work if the mul operands are commuted.
2023-12-03 00:51:22 -08:00
Craig Topper
7ec4f6094e
[InstCombine] Infer disjoint flag on Or instructions. (#72912)
The disjoint flag was recently added to IR in #72583

We already set it when we turn an add into an or. This patch sets it on Ors that weren't converted from an Add.
2023-12-02 14:11:12 -08:00
Mircea Trofin
bb6497ffa6
[BPI] Reuse the AsmWriter's BB naming scheme in BranchProbabilityPrinterPass (#73593)
When using `BranchProbabilityPrinterPass`, if a BB has no name, we get pretty unusable information like `edge -> has probability...` (i.e. we have no idea what the vertices of that edge are).

This patch uses `printAsOperand`, which uses the same naming scheme as `Function::dump`, so for example during debugging sessions, the IR obtained from a function and the names used by `BranchProbabilityPrinterPass` will match.

A shortcoming is that `printAsOperand` will result in the numbering algorithm re-running for every edge and every vertex (when `BranchProbabilityPrinterPass` is run on a function). If, for the given scenario, this is a problem, we can revisit this subsequently.

Another nuance is that the entry basic block will be numbered, which may be slightly confusing when it's anonymous, but it's easily identifiable - the first edge would have it as source (and the number should be easily recognizable)
2023-12-02 13:01:48 -08:00
Joshua Cao
5602636835
[LoopPeel] Peel iterations based on and, or conditions (#73413)
For example, this allows us to peel this loop with a `and`:
```
for (int i = 0; i < N; ++i) {
  if (i % 2 == 0 && i < 3) // can peel based on || as well
    f1();
  f2();
```
into:
```
for (int i = 0; i < 3; ++i) { // peel three iterations
  if (i % 2 == 0)
    f1();
  f2();
}
for (int i = 3; i < N; ++i)
  f2();
```
2023-12-02 11:24:02 -08:00
Florian Hahn
70535f5e60
[VPlan] Replace IR based truncateToMinimalBitwidths with VPlan version.
This patch replaces the IR based truncateToMinimalBitwidths with a VPlan
version. This has 3 benefits:
1) the VPlan-based version is simpler; we don't need to implement
   special codegen for each supported instruction type like the IR based
   one.
2) Removes a dependency on the cost-model after VPlan execution and
3) Removes a use of getVPValue that uses underlying values after VPlan
   execution (See removed FIXME).

Depends on D149081.

Depends on D149079.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D149903
2023-12-02 16:12:38 +00:00
Florian Hahn
cbf7b52a65
[VPlan] Properly update reduction live-out after placing select.
After inserting a select for the final value, update the VPlan def-use
chains. At the moment, the incorrect live-out doesn't cause a
mis-compile, as computing the final reduction value is not yet modeled
in VPlan.
2023-12-02 15:22:09 +00:00
Alexey Bataev
279b1ea65f [SLP]Improve gathering of the scalars used in the graph.
Currently we emit gathers for scalars being vectorized in the tree as
a pair of extractelement/insertelement instructions. Instead we can try
to find all required vectors and emit shuffle vector instructions
directly, improving the code and reducing compile time.

Part of non-power-of-2 vectorization.

Differential Revision: https://reviews.llvm.org/D110978
2023-12-01 11:23:57 -08:00
Nikita Popov
faebb1b2e6 Reapply [InstCombine] Support inverting lshr with non-negative operand
My initial patch contained a typo, resulting in the wrong value
being checked for non-negativeness.

-----

If the lshr operand is non-negative, we can treat it the same
way as an ashr. Ideally we would represent this as "lshr nneg",
but for now just perform the necessary ValueTracking query.

Proof: https://alive2.llvm.org/ce/z/Ahg4ri
2023-12-01 16:09:54 +01:00
Nikita Popov
7007919cfd [InstCombine] Add additional test for invert of lshr (NFC) 2023-12-01 16:09:54 +01:00
Nikita Popov
8c130996c0 Revert "[InstCombine] Support inverting lshr with non-negative operand"
This reverts commit b92693ac6afc522ea56bede0b9805ca7c138754c.

I've made a silly typo in the condition. Will reapply the corrected
version.
2023-12-01 16:05:17 +01:00
Nikita Popov
b92693ac6a [InstCombine] Support inverting lshr with non-negative operand
If the lshr operand is non-negative, we can treat it the same
way as an ashr. Ideally we would represent this as "lshr nneg",
but for now just perform the necessary ValueTracking query.

Proof: https://alive2.llvm.org/ce/z/Ahg4ri
2023-12-01 15:55:27 +01:00
Nikita Popov
dd5c5349e1 [InstCombine] Add tests for invert of lshr (NFC) 2023-12-01 15:55:26 +01:00
Nikita Popov
460faa0c87 [InstSimplify] Check common operand with constant earlier
If both icmps have the same operands and the RHS is constant, we
would currently go into the isImpliedCondMatchingOperands() code
path, instead of the isImpliedCondCommonOperandWithConstants()
path. Both are correct, but the latter can produce more accurate
results if the implication is dependent on the sign.
2023-12-01 12:18:59 +01:00
Nikita Popov
89b0044ca9 [InstSimplify] Add test for implied cond with equal ops and constant (NFC) 2023-12-01 12:18:27 +01:00
Nikita Popov
cd31cf5989 [InstSimplify] Fix or disjoint miscompile with op replacement
Make sure %x does not get folded to "or disjoint %x, %x" without
dropping the flag, as this would be a derefinement.
2023-12-01 11:45:09 +01:00
Nikita Popov
5a1020bb00 [InstSimplify] Add test for disjoint or miscompile (NFC)
The absorption case is already handled correctly, but the
idempentence case is not.
2023-12-01 11:45:09 +01:00
Matt Arsenault
d55692d60d Reapply "ValueTracking: Identify implied fp classes by general fcmp (#66505)"
This reverts commit 96a0d714d58e48c363ee6abbbcdfd7a6ce646ac1.

Avoid assert with dynamic denormal-fp-math We don't recognize compares
with 0 as an exact class test if we don't know the denormal mode. We could
try to do better here, but it's probably not worth it.

Fixes asserts reported after 1adce7d8e47e2438f99f91607760b825e5e3cc37
2023-12-01 17:51:46 +09:00
Allen
ab3fdbdfbe
[ValueTracking] Support srem/urem for isKnownNonNullFromDominatingCondition (#74021)
Similar to div, the rem should also proof its second operand is
non-zero, otherwise it is a UB.

Fix https://github.com/llvm/llvm-project/issues/71782
2023-12-01 16:20:38 +08:00
lifengxiang1025
340cb19e15
[MemProf] Expand optimization scope to internal linkage function (#73236)
Now MemProf can't do IR annotation right in the local linkage function
and global initial function __cxx_global_var_init. In llvm-profdata
which convert raw memory profile to memory profile, it uses function
name in dwarf to create GUID. But when llvm consumes memory profile, it
use `getIRPGOFuncName` or `getPGOFuncName` which returns local linkage
function as `FileName;FunctionName` or `FileName:FunctionName` to get
function name and create GUID. So profile creator's GUID is not same as
profile consumer.
So I think MemProf should be used with `unique-internal-linkage-names`
and don't use PGOFuncName.
__cxx_global_var_init is created later than where
UniqueInternalLinkageNames works. So I add uniq suffix to
__cxx_global_var_init additionally.

Co-authored-by: lifengxiang <lifengxiang.1025@bytedance.com>
2023-12-01 14:20:19 +08:00
paperchalice
3bd5172057
Reland "[CodeGen] Port SafeStack to new pass manager (#74027)
Forgot to update related code in `CodeGenPassBuilder.h`, also update it
for `CallBrPreparePass`.
Fix build when `LLVM_ENABLE_MODULES:BOOL=ON`.
2023-12-01 13:55:05 +09:00
Paul Kirth
cfe1ece833
[clang][llvm][fatlto] Avoid cloning modules in FatLTO (#72180)
https://github.com/llvm/llvm-project/issues/70703 pointed out that
cloning LLVM modules could lead to miscompiles when using FatLTO.

This is due to an existing issue when cloning modules with labels (see
#55991 and #47769). Since this can lead to miscompilation, we can avoid
cloning the LLVM modules, which was desirable anyway.

This patch modifies the EmbedBitcodePass to no longer clone the module
or run an input pipeline over it. Further, it make FatLTO always perform
UnifiedLTO, so we can still defer the Thin/Full LTO decision to
link-time. Lastly, it removes dead/obsolete code related to now defunct
options that do not work with the EmbedBitcodePass implementation any
longer.
2023-11-30 17:09:34 -08:00
Mircea Trofin
284da049f5
[coro][pgo] Don't promote pgo counters in the suspend basic block (#71263)
If a suspend happens in the resume part (this can happen in the case of chained coroutines), and that's part of a loop, the pre-split CFG has the suspend block as an exit of that loop. PGO Counter Promotion will then try to commit the temporary counter to the global in that "exit" block (it also does that in the other loop exit BBs, which also includes
the "destroy" case). This interferes with symmetric transfer.

We don't need to commit the counter in the suspend case - it's not a loop exit from the perspective of the behavior of the program. The regular loop exit, together with the "destroy" case, completely cover any updates that may need to happen to the global counter.
2023-11-30 11:58:26 -08:00
Shubham Sandeep Rastogi
2eff36b7d3
Revert "[CodeGen] Port SafeStack to new pass manager (#73747)" (#73965)
This reverts commit a4d5fd4d2ee9470e55345a9540f6b6fb6faf66e1.

The above commit breaks greendragon lldb bots:
Link to failing builds:
https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/63300/
https://green.lab.llvm.org/green/view/LLDB/job/as-lldb-cmake/10345/

I found this PR to be the offending one after using git bisect with the
cmake invocation:

cmake -G Ninja ../llvm -DCMAKE_BUILD_TYPE=Release
-DCMAKE_EXPORT_COMPILE_COMMANDS=ON
'-DLLVM_TARGETS_TO_BUILD=X86;ARM;AArch64'
-DLLVM_ENABLE_ASSERTIONS:BOOL=TRUE
-DLLVM_ENABLE_MODULES=On
-DLLVM_ENABLE_PROJECTS='clang;lld;lldb;cross-project-tests'
-DLLVM_VERSION_PATCH=99
'-DLLVM_ENABLE_RUNTIMES=libcxx;libcxxabi;compiler-rt'

and running
ninja lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/CodeGenPassBuilder.cpp.o
2023-11-30 09:53:15 -08:00
Jeremy Morse
4424903156
[DebugInfo][RemoveDIs] Handle DPValues at remaining dbg.value using sites (#73788)
This patch updates the last few places in LLVM using findDbgValues that
don't also collect and handle DPValue objects. This largely involves
instcombine and mem2reg changes, and are largely mechanical, calling
existing utilities on collections of DPValues instead of just
DbgValuesInsts.

A variety of tests have had RemoveDIs RUN lines added to them to cover
these behaviours. We have some technical debt of the instcombine sinking
code for DPValues not being implemented yet, so I've left FIXME stubs
indicating that we intend to cover tests with RemoveDIs but haven't yet.
2023-11-30 16:30:32 +00:00
Nikita Popov
ea602cb806 [IR] Support or disjoint in hasPoisonGeneratingFlags()
This fixed incorrect removal of freeze instructions.
2023-11-30 17:26:23 +01:00
Nikita Popov
ca5a01d8e4 [InstSimplify] Add test for incorrect freeze of or disjoint (NFC) 2023-11-30 17:26:23 +01:00
Nikita Popov
07c18a05e2 [InstSimplify] Fix select bit test miscompile with disjoint
The select condition ensures the disjointness here. The transform
is not valid without dropping the flag, which InstSimplify can't
do.
2023-11-30 16:55:32 +01:00
Nikita Popov
c89553ae82 [InstSimplify] Add test for or disjoint miscompile (NFC) 2023-11-30 16:55:32 +01:00
Jeremy Morse
3ef98bcd46 [DebugInfo][RemoveDIs] Support maintaining DPValues in CodeGenPrepare (#73660)
CodeGenPrepare needs to support the maintenence of DPValues, the
non-instruction replacement for dbg.value intrinsics. This means there are
a few functions we need to duplicate or replicate the functionality of:
 * fixupDbgValue for setting users of sunk addr GEPs,
 * The remains of placeDbgValues needs a DPValue implementation for sinking
 * Rollback of RAUWs needs to update DPValues
 * Rollback of instruction removal needs supporting (see github #73350)
 * A few places where we have to use iterators rather than instructions.

There are three places where we have to use the setHeadBit call on
iterators to indicate which portion of debug-info records we're about to
splice around. This is because CodeGenPrepare, unlike other optimisation
passes, is very much concerned with which block an operation occurs in and
where in the block instructions are because it's preparing things to be in
a format that's good for SelectionDAG.

There isn't a large amount of test coverage for debuginfo behaviours in
this pass, hence I've added some more.
2023-11-30 15:29:05 +00:00
Nikita Popov
d8bc546533 [InstCombine] Fix phi or icmp fold with disjoint flag
We're changing the operand of the or here, such that the disjoint
flag may no longer hold. Clear it.
2023-11-30 16:23:00 +01:00
Nikita Popov
b7af286a4e [InstCombine] Add test for "or disjoint" miscompile (NFC) 2023-11-30 16:23:00 +01:00
Alexey Bataev
1f88e62db4 [SLP]Fix/improve minbitwidth mapping to use TreeEntry as a key.
Currently, MinBWs map uses Value* as a key and stores mapping for each
value to be demoted. It make is it hard to get the actual MinBWs value
for the buildvector scalars(constants), since same constant might be
  used in different nodes with the different MinBWs values/decisions.
Also, it consumes extra memory for the vectorized values/instructions
 from the same nodes.
Better to map actual nodes. It fixes the bitwidth data fetching for
buildvector scalars and improves memory consumption/analysis time for
other instructions.
2023-11-30 06:33:31 -08:00
Antonio Frighetto
3f6a8e9b18 [InstCombine] Switch to use FileCheck as UTC was favoured (NFC)
FileCheck was previously missing while moving to UTC, as part of
regenerating other tests within InstCombine.
2023-11-30 14:14:21 +01:00
Jeremy Morse
5ba5211a47
[DebugInfo][RemoveDIs] Have LICM insert at iterator positions (#73671)
Because we're storing some extra debug-info information in the iterator
class, we need to insert new LICM-created stores using such iterators.
Switch LICM to storing iterators instead of pointers when it promotes
variables in loops, add a test for the desired behaviour, and enable
RemoveDIs instrumentation on a variety of other LICM tests for good
measure.

(This would appear to be the only pass in LLVM that needs to store
iterators on the heap).
2023-11-30 13:00:26 +00:00