251119 Commits

Author SHA1 Message Date
Philip Reames
33314693f5 Revert "[RISCV][InsertVSETVLI] Avoid VL toggles for extractelement patterns"
This reverts commit 657d20dc75252f0c8415ada5214affccc3c98efe.  A correctness problem was reported against the review and the fix warrants re-review.
2023-05-10 10:58:46 -07:00
Michael Maitland
1a855819a8 [RISCV] Add support for V extenstion in SiFive7
Add scheduling information for vector extension in SiFive7,
while using new LMUL & SEW scheduling constructs.

Differential Revision: https://reviews.llvm.org/D149495
2023-05-10 10:33:55 -07:00
Craig Topper
57a9522f87 [RISCV] Remove redundant F and D extension implication from V. NFC
We recently added implications for F and D to Zve32f and Zve64d
which V implies. So these have become redundant.
2023-05-10 10:00:59 -07:00
Manoj Gupta
9fb9c7776e Revert "[SCEV] Replace IsAvailableOnEntry with block disposition"
This reverts commit 103fc0f629aa6218783f65dff0197f257137cade.
Causes a clang crash in ChromeOS builds.
Testcase provided at D149344.
2023-05-10 09:57:48 -07:00
Vasileios Porpodas
dda2a5d457 [SLP][NFC] Rename a couple of variables and replace an if-else with an std::min
- Rename `LimitForRegisterSize` to `MaxVFOnly` to make the meaning of the limit less ambiguous
- Rename `OpsWidth` to `ActualVF`, which makes it clear that this is the VF we are using for vectorization.
- Replace the if-else code for the initialization of OpsWidth with an std::min.

Differential Revision: https://reviews.llvm.org/D150241
2023-05-10 09:37:58 -07:00
Fangrui Song
689715f335 [Object] Fix handling of Elf_Nhdr with sh_addralign=8
The generic ABI says:

> Padding is present, if necessary, to ensure 8 or 4-byte alignment for the next note entry (depending on whether the file is a 64-bit or 32-bit object). Such padding is not included in descsz.

Our parsing code currently aligns n_namesz. Fix the bug by aligning the start
offset of the descriptor instead. This issue has been benign because the primary
uses of sh_addralign=8 notes are `.note.gnu.property`, where
`sizeof(Elf_Nhdr) + sizeof("GNU") = 16` (already aligned by 8).

In practice, many 64-bit systems incorrectly use sh_addralign=4 notes.
We can use sh_addralign (= p_align) to decide the descriptor padding.
Treat an alignment of 0 and 1 as 4. This approach matches modern GNU readelf
(since 2018).

We have a few tests incorrectly using sh_addralign=0. We may make our behavior
stricter after fixing these tests.

Linux kernel dumped core files use `p_align=0` notes, so we need to support the
case for compatibility.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D150022
2023-05-10 09:36:58 -07:00
LLVM GN Syncbot
ae63d5be37 [gn build] Port f041b3472a87 2023-05-10 16:23:50 +00:00
Nico Weber
b21909c0fc Revert "[lli] Honor -mtriple option in -jit-kind=orc mode."
This reverts commit 624dcd8d53c1ffe10fbc936b186a98ec7fa1c865.
Breaks check-llvm on Windows, see https://reviews.llvm.org/D149996#4332381
2023-05-10 17:59:02 +02:00
Konstantin Zhuravlyov
fae9e7d46c AMDGPU: Factor out GFX9.4 common features into a feature set
Differential Revision: https://reviews.llvm.org/D149985
2023-05-10 11:51:06 -04:00
Konstantin Zhuravlyov
9d05727972 AMDGPU: Add basic gfx942 target
Differential Revision: https://reviews.llvm.org/D149983
2023-05-10 11:51:06 -04:00
Konstantin Zhuravlyov
1fc70210a6 AMDGPU: Add basic gfx941 target
Differential Revision: https://reviews.llvm.org/D149982
2023-05-10 11:51:06 -04:00
Yingwei Zheng
e5532fb493
[RISCV] Enable signed truncation check transforms for i8
This patch enables signed truncation check transforms for i8 on rv32 when XVT is i64 and Zbb is enabled.

It is a small improvement of D149977.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D150177
2023-05-10 22:53:24 +08:00
Benjamin Kramer
a414db1d8e Revert "[SimpleLoopUnswitch] unswitch selects"
This reverts commit 21f226fc4591db6e98faf380137a42067c909582. Crashes on
this test case:

define void @test2() nounwind {
entry:
  br label %bb.nph

bb.nph:                                           ; preds = %entry
  %and.i13521 = and <4 x i1> undef, undef
  br label %for.body

for.body:                                         ; preds = %for.body, %bb.nph
  %or.i = select <4 x i1> %and.i13521, <4 x i32> undef, <4 x i32> undef
  br i1 false, label %for.body, label %for.end

for.end:                                          ; preds = %for.body, %entry
  ret void
}
2023-05-10 15:12:21 +02:00
Matt Devereau
004bf170c6 [AArch64] Emit FNMADD instead of FNEG(FMADD)
Emit FNMADD instead of FNEG(FMADD) for optimization levels
above Oz when fast-math flags (nsz+contract) permit it.

Differential Revision: https://reviews.llvm.org/D149260
2023-05-10 12:45:54 +00:00
Jonas Paulsson
655f0fc4b9 Reapply "[SystemZ] Bugfix in expansion of memmem operations."
The new test case showed that the NoPHIs flag needs to be cleared.

Original commit message:

[SystemZ] Bugfix in expansion of memmem operations.

Since NC, OC, and XC clobber CC, the EXRL_Pseudo targeting these must also be
marked to do so.

Original patch by uweigand.

Reviewed by: uweigand

Differential Revision: https://reviews.llvm.org/D150251

Fixes: https://github.com/llvm/llvm-project/issues/62572
2023-05-10 12:40:57 +02:00
LLVM GN Syncbot
7e2fbeb017 [gn build] Port 62a090f958ce 2023-05-10 10:39:33 +00:00
Diana Picus
7591a7b6ea [AMDGPU][MC] Clean up DPP bound_ctrl handling
At the moment, we set the BC bit in DPP for both bound_ctrl:0 and
bound_ctrl:1, for compatibility with sp3 (see PR35397). However, this
hack is only needed for GFX8. For newer GFXs, sp3 behaves as expected,
i.e. it sets the bit when bound_ctrl:1 and clears it when bound_ctrl:0.

This patch updates LLVM to do the same for GFX11 or newer. We preserve
the current behaviour for GFX9 and 10 so we don't break any existing
code.

Differential Revision: https://reviews.llvm.org/D149254
2023-05-10 11:40:53 +02:00
Jonas Paulsson
dfa42a69b8 Revert "[SystemZ] Bugfix in expansion of memmem operations."
Sorry - mir test fails with expensive checks on build bot.

Seems to relate to the fact that there are no PHIs in the .mir input, but after
they are created the verifyer reports "Found PHI instruction with NoPHIs property
set".

This reverts commit 00454a17f361d677d5423905c888daca1a80661a.
2023-05-10 11:34:55 +02:00
Jonas Paulsson
00454a17f3 [SystemZ] Bugfix in expansion of memmem operations.
Since NC, OC, and XC clobber CC, the EXRL_Pseudo targeting these must also be
marked to do so.

Original patch by uweigand.

Reviewed by: uweigand

Differential Revision: https://reviews.llvm.org/D150251

Fixes: https://github.com/llvm/llvm-project/issues/62572
2023-05-10 11:05:13 +02:00
Joshua Cao
21f226fc45 [SimpleLoopUnswitch] unswitch selects
The old LoopUnswitch pass unswitched selects, but the changes were never
ported to the new SimpleLoopUnswitch.

We unswitch by turning:

```
S = select %cond, %a, %b
```

into:

```
head:
br %cond, label %then, label %tail

then:
br label %tail

tail:
S = phi [ %a, %then ], [ %b, %head ]
```

Unswitch selects are always nontrivial, since the successors do not exit
the loop and the loop body always needs to be cloned.

Unswitch selects always need to freeze the conditional if the
conditional could be poison or undef. Selects don't propagate
poison/undef, and branches on poison/undef causes UB.

Reviewed By: nikic, kachkov98, vitalybuka

Differential Revision: https://reviews.llvm.org/D138526
2023-05-10 00:40:28 -07:00
Mikael Holmen
6647f3cd01 [CombinerHelper] Fix gcc warning [NFC]
Without the fix gcc complains with
 ../lib/CodeGen/GlobalISel/CombinerHelper.cpp:1652:52: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
  1652 |          SrcDef->getOpcode() == TargetOpcode::G_OR && "Unexpected op");
       |          ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~
2023-05-10 09:08:06 +02:00
Matt Arsenault
cc54f8eec7 AMDGPU: Add baseline tests for fmed3 shrinking combine 2023-05-10 08:02:11 +01:00
Matt Arsenault
62eac3e068 GlobalISel: Fold out G_FPTRUNC(G_FPEXT) 2023-05-10 08:01:27 +01:00
Matt Arsenault
a4610c2064 TableGen: Fix missing C++ mode comments 2023-05-10 08:01:27 +01:00
luxufan
f470922a29 Revert "Revert "[ValutTracking] Use isGuaranteedNotToBePoison in impliesPoison""
This reverts commit 706e8110573c83f140a63b40803d6370c86c1414.
2023-05-10 14:35:55 +08:00
Lang Hames
624dcd8d53 [lli] Honor -mtriple option in -jit-kind=orc mode.
Useful for lli debugging / experiments. See, for example, discussion at
https://reviews.llvm.org/D149996.
2023-05-09 23:35:38 -07:00
Craig Topper
7c5209d017 [LegalizeTypes] Simplify code for UndefinedBooleanContent in PromoteIntOp_VECREDUCE.
We can treat UndefinedBooleanContent the same as ZeroOrOneBooleanContent.
There's no reason to consider sign extending.
2023-05-09 23:16:27 -07:00
Lang Hames
cf4477dec1 [lli] Improve support for MinGW by implementing __main as a no-op.
Without this function lli will error out on MinGW with a missing symbol error
for __main.

Cygwin and MinGW insert calls from the main function to the runtime function
__main. The __main function is responsible for setting up main's environment
(e.g. running static constructors), however this is not needed when running
under lli: the executor process will have run non-JIT ctors, and ORC will take
care of running JIT'd ctors. To avoid a missing symbol error we just implement
__main as a no-op.
2023-05-09 22:50:39 -07:00
Craig Topper
c582146a49 [LegalizeTypes] Use ISD::isTrueWhenEqual to simplify code. NFC 2023-05-09 22:49:22 -07:00
Serguei Katkov
92663cd464 [X86] Add test cases for fminimum/fmaximum with vector zero operands. 2023-05-10 11:54:51 +07:00
Chen Zheng
309fdbb49b fix bot failure https://lab.llvm.org/buildbot/#/builders/38/builds/11709
Some generic cases have empty prologue on some platforms like hexagon,
but non empty prologue on some other platform like PPC.

Remove the checks for the optimized lines hit by D147506.
2023-05-10 03:06:38 +00:00
Jianjian GUAN
7ab9478560 [RISCV] Make Zvfh depend on Zfhmin.
According to the v spec, the Zvfh extension depends on the Zve32f and Zfhmin extensions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D150016
2023-05-10 09:46:19 +08:00
Enna1
11dd1fe32f [NFC][HWASAN] replace redundant calls to IRBuilder::get*Ty() with saved types
Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D149628
2023-05-10 09:29:32 +08:00
Chen Zheng
fb45493562 [DebugLine] save one debug line entry for empty prologue
Reland D147506 after fixing the failure in bot
https://lab.llvm.org/buildbot/#/builders/247/builds/4125

Some debuggers like DBX on AIX assume the address in debug line
entries is always incremental. But clang generates two entries (entry
for file scope line and entry for prologue end) with same address if
prologue is empty

And if the prologue is empty, seems the first debug line entry for the
function is unnecessary(i.e. removing the first entry won't impact the
behavior in GDB on Linux), so I implement this for all debuggers.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D147506
2023-05-10 01:21:02 +00:00
Chen Zheng
9a89347c74 [DebugInfo] add test case for D147506, NFC
[DebugLine] save one debug line entry for empty prologue
2023-05-10 01:20:56 +00:00
Alexey Vishnyakov
9c07aa75b9 [TableGen] Fix null pointer dereferences in TreePattern::ParseTreePattern()
Bugs were found by Svace static analysis tool. Null pointers are
dereferenced right after error checking that does not return from
function.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D147706
2023-05-09 18:06:10 -07:00
Douglas Yung
e8ea7d2d78 Revert "[test] [llvm-config] Assume unix style lib names on mingw targets"
This reverts commit 38db3795e706b212a34140a395d642195b9d150e.

This change was causing a test failure on the PS5 Windows bot:
https://lab.llvm.org/buildbot/#/builders/216/builds/20982
2023-05-09 17:42:28 -07:00
Noah Goldstein
2647547ee4 Re-revert "[ValueTracking] Use knownbits interface for determining if div/rem are safe to speculate"
Seems to be causing a bug in CorrelatedValuePropegation. Reverting
while the issue is investigated.

This reverts commit 6c667abf3294d61e4fbe1238e1755c79f7547f1b.
2023-05-09 19:11:21 -05:00
Sami Tolvanen
9e869efc1b [KCFI] Expand the KCFI term in comments (NFC) 2023-05-09 23:17:33 +00:00
Nathan Sidwell
03fde97d49 [NFC] Refactor loop metadata movement
* Use 'if (T v = expr)' idiom
* llvm.loop is a fixed metadata ID

Differential Revision: https://reviews.llvm.org/D150109

Reviewed By: kazu
2023-05-09 18:43:59 -04:00
Martin Storsjö
38db3795e7 [test] [llvm-config] Assume unix style lib names on mingw targets
Assume the MSVC style naming only for "windows-msvc" targets.

Differential Revision: https://reviews.llvm.org/D149998
2023-05-10 01:06:01 +03:00
Arthur Eubanks
16a0a69aad [gn build] Manually port e9569748de 2023-05-09 14:46:02 -07:00
Florian Hahn
faa8f582b9
[VPlan] Add printing test with fast-math flags.
Add missing test coverage for D150029.
2023-05-09 22:43:03 +01:00
Alexey Vishnyakov
9a564a61a2 [ARM] ARMMachObjectWriter::recordRelocation: reduce strength on a condition
Reviewed By: MaskRay, dmgreen

Differential Revision: https://reviews.llvm.org/D147931
2023-05-09 14:40:43 -07:00
Zhenkai Weng
39b6a7f06e [FuzzMutate] Module size heuristics
IRMutation::mutateModule() currently requires the bitcode size of the module.
To compute the bitcode size, one way is to write the module to a buffer using
BitcodeWriter and calculating the buffer size. This would be fine for a single
mutation, but infeasible for repeated mutations due to the large overhead. It
turns out that the only IR strategy weight calculation method that depends on
the current module size is InstDeleterStrategy, which deletes instructions more
frequently as the module size approaches a given max size. However, there is no
real need for the size to be in bytes of bitcode, so we can use a different
metric. One alternative is to let the size be the number of objects in the
Module, including instructions, basic blocks, globals, and aliases. Although
getting the number of instructions is still O(n), it should have significantly
less overhead than BitcodeWriter. This suggestion would cause a change to the
IRMutator API, since IRMutator::mutateModule() can calculate the Module size
itself.

Reviewed By: Peter

Differential Revision: https://reviews.llvm.org/D149989
2023-05-09 13:58:10 -07:00
Fangrui Song
bcaa0b26aa PrologEpilogInserter: Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds 2023-05-09 13:23:58 -07:00
Aaron Ballman
f08b94d5c2 Further amend 945f6e65be0d20b3446e7c1537c64151de618af4
This addresses the ARM issue found by:
https://lab.llvm.org/buildbot/#/builders/109/builds/63726

(This test wouldn't run for me locally, hence missing it in the last fix.)
2023-05-09 16:16:07 -04:00
Aaron Ballman
b97527f144 Fix test failure from 945f6e65be0d20b3446e7c1537c64151de618af4
It seems we were testing the behavior of the debug messages!
2023-05-09 16:09:55 -04:00
Aaron Ballman
945f6e65be Wrap debug code with the LLVM_DEBUG macro; NFC
While investigating a bug in Clang, I noticed that -Wframe-larger-than
was emitting extra debug information along with the diagnostic. It
turns out that 2e1e2f52f357768186ecfcc5ac53d5fa53d1b094 fixed an issue
with the diagnostic, but accidentally left in some debug code that was
exposed in all builds.

So now we no longer emit things like:
8/4294967304 (0.00%) spills, 4294967296/4294967304 (100.00%) variables
along with the diagnostic
2023-05-09 15:53:24 -04:00
Aaron Ballman
8c2c6af02e Fix LLVM sphinx build
This addresses the issues found by:
https://lab.llvm.org/buildbot/#/builders/30/builds/34937
2023-05-09 15:28:38 -04:00