27 Commits

Author SHA1 Message Date
Kai
751a546fa9
[HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (#167946)
Issue: https://github.com/llvm/llvm-project/issues/99172
- [x] Implement `WavePrefixSum` clang builtin
- [x] Link `WavePrefixSum` clang builtin with `hlsl_intrinsics.h`
- [x] Add sema checks for `WavePrefixSum` to
`CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [x] Add codegen for `WavePrefixSum` to `EmitHLSLBuiltinExpr` in
`CGBuiltin.cpp`
- [x] Add codegen tests to
`clang/test/CodeGenHLSL/builtins/WavePrefixSum.hlsl`
- [x] Add sema tests to
`clang/test/SemaHLSL/BuiltIns/WavePrefixSum-errors.hlsl`
- [x] Create the `int_dx_WavePrefixSum` intrinsic in
`IntrinsicsDirectX.td`
- [x] Create the `DXILOpMapping` of `int_dx_WavePrefixSum` to `121` in
`DXIL.td`
- [x] Create the `WavePrefixSum.ll` and `WavePrefixSum_errors.ll` tests
in `llvm/test/CodeGen/DirectX/`
- [x] Create the `int_spv_WavePrefixSum` intrinsic in
`IntrinsicsSPIRV.td`
- [x] In SPIRVInstructionSelector.cpp create the `WavePrefixSum`
lowering and map it to `int_spv_WavePrefixSum` in
`SPIRVInstructionSelector::selectIntrinsic`.
- [x] Create SPIR-V backend test case in
`llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WavePrefixSum.ll`

I also added a new macro
`GENERATE_HLSL_INTRINSIC_FUNCTION_SELECT_UNSIGNED` in conjunction with
the new function `getUnsignedIntrinsicVariant` to make selecting
unsigned variants of the intrinsic easier. As a result, I was able to
replace `getWaveActiveSumIntrinsic`, `getWaveActiveMaxIntrinsic`, and
`getWaveActiveMinIntrinsic` using the new macro.
2026-02-03 03:00:45 -05:00
Tim Corringham
d5f405558d
[HLSL] Implement f32tof16() intrinsic (#172469)
Implement the f32tof16() intrinsic, DXIL and SPIRV codegen, and related
tests.

Fixes #99113

---------

Co-authored-by: Tim Corringham <tcorring@amd.com>
2026-01-26 15:06:48 +00:00
Alexander Johnston
4ca2caeab6
[HLSL] Implement ddx/ddy_fine intrinsics (#168874)
Implements the HLSL ddx_fine and ddy_fine intrinsics.
For the SPIRV backend the intrinsics are ensured to be unavailable in
opencl (as they require fragment execution stage).

Closes https://github.com/llvm/llvm-project/issues/99098
Closes https://github.com/llvm/llvm-project/issues/99101
2025-12-12 09:34:41 -08:00
Alexander Johnston
ed60cd2563
[HLSL] Implement ddx/ddy_coarse intrinsics (#164831)
Closes https://github.com/llvm/llvm-project/issues/99097
Closes https://github.com/llvm/llvm-project/issues/99100

As ddx and ddy are near identical implementations I've combined them in
this PR. This aims to unblock
https://github.com/llvm/llvm-project/pull/161378

---------

Co-authored-by: Alexander Johnston <alexander.johnston@amd.com>
2025-11-18 16:41:07 +01:00
Tim Corringham
89ec96b8b4
[HLSL] Implement the f16tof32() intrinsic (#165860)
Implement the f16tof32() intrinsic, including DXILand SPIRV codegen, and
associated tests.

Fixes #99112

---------

Co-authored-by: Tim Corringham <tcorring@amd.com>
2025-11-04 17:04:39 +00:00
Sietze Riemersma
bfd4935fa3
[HLSL][DXIL][SPRIV] Added WaveActiveMin intrinsic (#164385)
Adds the WaveActiveMin intrinsic from #99169. I think I did all of the
required things on the checklist:
- [x]  Implement `WaveActiveMin` clang builtin,
- [x]  Link `WaveActiveMin` clang builtin with `hlsl_intrinsics.h`
- [x] Add sema checks for `WaveActiveMin` to
`CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [x] Add codegen for `WaveActiveMin` to `EmitHLSLBuiltinExpr` in
`CGBuiltin.cpp`
- [x] Add codegen tests to
`clang/test/CodeGenHLSL/builtins/WaveActiveMin.hlsl`
- [x] Add sema tests to
`clang/test/SemaHLSL/BuiltIns/WaveActiveMin-errors.hlsl`
- [x] Create the `int_dx_WaveActiveMin` intrinsic in
`IntrinsicsDirectX.td`
- [x] Create the `DXILOpMapping` of `int_dx_WaveActiveMin` to `119` in
`DXIL.td`
- [x] Create the `WaveActiveMin.ll` and `WaveActiveMin_errors.ll` tests
in `llvm/test/CodeGen/DirectX/`
- [x] Create the `int_spv_WaveActiveMin` intrinsic in
`IntrinsicsSPIRV.td`
- [x] In SPIRVInstructionSelector.cpp create the `WaveActiveMin`
lowering and map it to `int_spv_WaveActiveMin` in
`SPIRVInstructionSelector::selectIntrinsic`.
- [x] Create SPIR-V backend test case in
`llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveMin.ll

But as some of the code has changed and was moved around (E.G.
`CGBuiltin.cpp` -> `CGHLSLBuiltins.cpp`) I mostly followed how
`WaveActiveMax()` is implemented.

I have not been able to run the tests myself as I am unsure which
project runs the correct test. Any guidance on how I can test myself
would be helpful.

Also added some tests to the offload-test-suite
https://github.com/llvm/offload-test-suite/pull/478
2025-10-28 11:01:13 -07:00
Dan Brown
df420ee2ba
Implements isnan() HLSL intrinsic for DXIL and SPIR-V targets. (#157733)
Addresses #99132.
2025-09-25 12:34:47 -04:00
Kaitlin Peng
bd741975bc
Scalarize vector mad operations for integer types (#152228)
Fixes #152220.

- Adds `dx_imad` and `dx_umad` to
`isTargetIntrinsicTriviallyScalarizable`
- Adds tests that confirm the intrinsic is now scalarizing
2025-08-07 09:34:42 -07:00
Ashley Coleman
21423c7fdc
[DirectX] Make firstbithigh intrinsic use first arg as overload type (#145401)
Sibling to https://github.com/llvm/llvm-project/pull/145350 part of
https://github.com/llvm/llvm-project/issues/144966

firstbituhigh and firstbitshigh should use the first arg for overloads
instead of the return type since the return is always i32
2025-06-24 12:00:21 -06:00
Farzon Lotfi
0f173a0f9a
[DirectX] make firstbitlow intrinsic use first argument instead of return for overload type (#145350)
fixes #144966
Easy fix just add `dx_firstbitlow` to
`DirectXTTIImpl::isTargetIntrinsicWithOverloadTypeAtArg`
2025-06-23 14:04:06 -04:00
Sarah Spall
2a1af502d4
[DirectX] scalarize the dx.isinf intrinsic (#140638)
The DXIL IsInf op only takes scalars.
Closes #140577
2025-05-20 10:26:58 -07:00
Sergei Barannikov
0014b49482
[TTI] Make all interface methods const (NFCI) (#136598)
Making `TargetTransformInfo::Model::Impl` `const` makes sure all
interface methods are `const`, in `BasicTTIImpl`, its bases, and in all
derived classes.

Pull Request: https://github.com/llvm/llvm-project/pull/136598
2025-04-22 06:27:29 +03:00
Justin Bogner
0afa872a0d
[DirectX] Scalarize the dx.saturate intrinsic (#134381)
The DXIL Saturate op only takes scalars.

Fixes #134378.
2025-04-08 08:54:10 +09:00
Justin Bogner
77cfa38dcb
[DirectX][TTI] Sort switch statements. NFC (#134379) 2025-04-04 22:26:46 +09:00
Adam Yang
aab25f20f6
[HLSL][SPIRV][DXIL] Implement WaveActiveMax intrinsic (#123428)
```    - add clang builtin to Builtins.td
      - link builtin in hlsl_intrinsics
      - add codegen for spirv intrinsic and two directx intrinsics to retain
        signedness information of the operands in CGBuiltin.cpp
      - add semantic analysis in SemaHLSL.cpp
      - add lowering of spirv intrinsic to spirv backend in
        SPIRVInstructionSelector.cpp
      - add lowering of directx intrinsics to WaveActiveOp dxil op in
    DXIL.td

      - add test cases to illustrate passespendent pr merges.
```
Resolves #99170
2025-01-27 23:26:56 -08:00
Adam Yang
4446a9849a
[HLSL][SPIRV][DXIL] Implement WaveActiveSum intrinsic (#118580)
```    - add clang builtin to Builtins.td
      - link builtin in hlsl_intrinsics
      - add codegen for spirv intrinsic and two directx intrinsics to retain
        signedness information of the operands in CGBuiltin.cpp
      - add semantic analysis in SemaHLSL.cpp
      - add lowering of spirv intrinsic to spirv backend in
        SPIRVInstructionSelector.cpp
      - add lowering of directx intrinsics to WaveActiveOp dxil op in
    DXIL.td

      - add test cases to illustrate passespendent pr merges.
```
Resolves #70106

---------

Co-authored-by: Finn Plummer <canadienfinn@gmail.com>
2025-01-16 10:35:23 -08:00
Ashley Coleman
4f48abff0f
[HLSL] Implement elementwise firstbitlow builtin (#116858)
Closes https://github.com/llvm/llvm-project/issues/99116

Implements `firstbitlow` by extracting common functionality from
`firstbithigh` into a shared function while also fixing a bug for an edge
case where `u64x3` and larger vectors will attempt to create vectors
larger than the SPRIV max of 4.
---------

Co-authored-by: Steven Perron <stevenperron@google.com>
2025-01-15 15:36:50 -07:00
Finn Plummer
45c01e8a33
[NFC][TargetTransformInfo][VectorUtils] Consolidate isVectorIntrinsic... api (#117635)
- update `VectorUtils:isVectorIntrinsicWithScalarOpAtArg` to use TTI for
all uses, to allow specifiction of target specific intrinsics
- add TTI to the `isVectorIntrinsicWithStructReturnOverloadAtField` api
- update TTI api to provide `isTargetIntrinsicWith...` functions and
  consistently name them
- move `isTriviallyScalarizable` to VectorUtils
  
- update all uses of the api and provide the TTI parameter

Resolves #117030
2024-12-19 11:54:26 -08:00
Finn Plummer
a5f501e347
[HLSL][DXIL] Implement asdouble intrinsic (#114847)
- define intrinsic as builtin in Builtins.td
- link intrinsic in hlsl_intrinsics.h
- add semantic analysis to SemaHLSL.cpp
- lower to `llvm` or a `dx` intrinsic when applicable in CGBuiltin.cpp
- define DXIL intrinsic in IntrinsicsDirectX.td
- add DXIL op and mapping in DXIL.td
- enable scalarization of intrinsic

- add basic sema checking to asdouble-errors.hlsl
    
 Resolves #99081
2024-11-22 10:23:30 -08:00
Finn Plummer
8663b8777e
[NFC][VectorUtils][TargetTransformInfo] Add isVectorIntrinsicWithOverloadTypeAtArg api (#114849)
This changes allows target intrinsics to specify and overwrite overloaded types.

- Updates `ReplaceWithVecLib` to not provide TTI as there most probably won't be a use-case
- Updates `SLPVectorizer` to use available TTI
- Updates `VPTransformState` to pass down TTI
- Updates `VPlanRecipe` to use passed-down TTI

This change will let us add scalarization for `asdouble`:  #114847
2024-11-21 11:04:25 -08:00
Sarah Spall
fb90733e19
[HLSL] implement elementwise firstbithigh hlsl builtin (#111082)
Implements elementwise firstbithigh hlsl builtin.
Implements firstbituhigh intrinsic for spirv and directx, which handles
unsigned integers
Implements firstbitshigh intrinsic for spirv and directx, which handles
signed integers.
Fixes #113486
Closes #99115
2024-11-06 07:31:39 -08:00
Farzon Lotfi
dcbf2c2ca0
[Scalarizer][DirectX] support structs return types (#111569)
Based on this RFC:
https://discourse.llvm.org/t/rfc-allow-the-scalarizer-pass-to-scalarize-vectors-returned-in-structs/82306

LLVM intrinsics do not support out params. To get around this limitation
implementers will make intrinsics return structs to capture a return
type and an out param. This implementation detail should not impact
scalarization since these cases should be elementwise operations.

## Three changes are needed. 
- The CallInst visitor needs to be updated to handle Structs
- A new visitor is needed for `ExtractValue` instructions
- finsh needs to be update to handle structs so that insert elements are
properly propogated.

## Testing changes
- Add support for `llvm.frexp`
- Add support for `llvm.dx.splitdouble`

fixes https://github.com/llvm/llvm-project/issues/111437
2024-10-21 12:51:01 -04:00
Luke Drummond
b55c52c047 Revert "Renormalize line endings whitespace only after dccebddb3b80"
This reverts commit 9d98acb196a40fee5229afeb08f95fd36d41c10a.
2024-10-18 21:16:50 +01:00
Luke Drummond
9d98acb196 Renormalize line endings whitespace only after dccebddb3b80
Line ending policies were changed in the parent, dccebddb3b80. To make
it easier to resolve downstream merge conflicts after line-ending
policies are adjusted this is a separate whitespace-only commit. If you
have merge conflicts as a result, you can simply `git add --renormalize
-u && git merge --continue` or `git add --renormalize -u && git rebase
--continue` - depending on your workflow.
2024-10-17 14:49:26 +01:00
Finn Plummer
835feaaf35
[DXIL] Add scalarization support for WaveReadLaneAt (#112570)
- Implement trivial scalarization for the `WaveReadLaneAt` DXIL
intrinsic
- Add test case to demonstrate the lowering path

Resolves #70104
2024-10-16 11:31:28 -07:00
Farzon Lotfi
63a0a81e73
[NFC][Scalarizer][TargetTransformInfo] Add isTargetIntrinsicWithScalarOpAtArg api (#111441)
This change allows target intrinsics can have scalar args

fixes [111440](https://github.com/llvm/llvm-project/issues/111440)

This change will let us add scalarization for WaveReadLaneAt:
https://github.com/llvm/llvm-project/pull/111010
2024-10-07 19:57:07 -04:00
Farzon Lotfi
0f97b4824a
[Scalarizer][DirectX] Add support for scalarization of Target intrinsics (#108776)
Since we are using the Scalarizer pass in the backend we needed a way to
allow this pass to operate on Target intrinsics.
We achieved this by adding `TargetTransformInfo ` to the Scalarizer
pass. This allowed us to call a function available to the DirectX
backend to know if an intrinsic is a target intrinsic that should be
scalarized.
2024-09-17 11:35:42 -04:00