19461 Commits

Author SHA1 Message Date
Aiden Grossman
6e6f76026d [MLIR][OpenMP] Fix unused variable warning
7c07cb6542a0c5e4340e09a9a247e3e5123c6567 introduced a variable created
in an if statement that is only used in an assertion. Per the coding
guidelines, mark it [[maybe_unused]].
2026-02-10 20:40:29 +00:00
RattataKing
d380b29a7c
[MLIR][Python] Remove partial LLVM APIs in python bindings (5/n) (#180644)
This PR continues work from
https://github.com/llvm/llvm-project/pull/178290
Added local helper functions to avoid dependency on LLVM APIs.

---------

Co-authored-by: Jakub Kuderski <kubakuderski@gmail.com>
2026-02-10 15:24:56 -05:00
Razvan Lupusoru
a88274f008
[mlir][acc] Support lazy remark message construction (#180665)
The OpenACC remark emission utilities previously only accepted Twine for
message construction. However, complex remarks often require additional
logic to build messages, such as resolving variable names. This results
in unnecessary work when remarks are disabled.

Add an overload that accepts a lambda for message generation, which is
only invoked when remark emission is enabled. Update ACCLoopTiling to
use this lazy API for tile size reporting.

Additionally, getVariableName now returns numeric strings for constant
integer values. This is also being used by ACCLoopTiling along with the
lazy remark update.
2026-02-10 10:13:19 -08:00
Frank Schlimbach
a6929f7937
[mlir][shard,mpi] Allowing 2d-grids and simplifying lowering shard.all_gather (#180243)
- fixing incorrect assertion and related function name
- MPI_comm_split is not pure
- simplifying/standardizing permutation in all_gather

---------

Co-authored-by: Rolf Morel <rolfmorel@gmail.com>
2026-02-10 16:04:22 +01:00
Scott Manley
370a571597
[RegionUtils] replace uses in nested regions when isolating from above (#180548)
When making a region IsolatedFromAbove, replace uses in any region
within the parent region, not just the immediate parent region.
2026-02-10 07:36:47 -06:00
Matthias Springer
0d375463eb
[mlir][linalg] Remove abandoned Detensorize pass (#177579)
RFC:
https://discourse.llvm.org/t/how-to-deal-with-abandoned-unmaintained-code/89560
2026-02-10 13:29:19 +01:00
Roman-Pevnyi
9de84638b9
Extending UniformQuantizedType with interface-based support for new storage types in Quant dialect (#152966)
Currently, UniformQuantizedType only supports built-in MLIR storage
types such as Integer. LLM quantization research introducing feature of
using NF4 as a low precision datatype (see
https://arxiv.org/pdf/2305.14314). There is a growing need to make the
system extensible and maintainable as more types are added. Ensuring
that MLIR can natively support NF4 through a clean, extensible interface
is essential for both current and future quantization workflows.

**Current Approach and Its Limitations:**

- The present implementation relies on dynamic checks (e.g., type
switches or if-else chains) to determine the storage type and retrieve
type-specific information for legality checks.

- This approach works for a small, fixed set of types, but as the number
of supported types grows, the code becomes harder to read, maintain, and
extend.

**Proposed Interface-Based Approach:**

- Define a StorageTypeInterface that specifies the required methods any
storage type must implement to be used in UniformQuantizedType.
- Each storage type (Integer, Float8E5M2, Float8E4M3FN, and new types
like NF4) would implement this interface, encapsulating their
type-specific logic.
- When UniformQuantizedType needs to check legality or retrieve
information, it can use MLIR’s dyn_cast mechanism to check if the type
implements the interface and then call the required methods.
- This design decouples UniformQuantizedType from the specifics of each
storage type, making it easy to add new types (such as NF4) without
modifying the core logic or introducing more type checks.

**Benefits:**

- Extensibility: New storage types can be added by simply implementing
the interface, without touching the core UniformQuantizedType logic.
- Readability: The code is cleaner, as it avoids large switch statements
or if-else chains.
- Maintainability: Type-specific logic is encapsulated within each type,
reducing the risk of errors and making the codebase easier to understand
and update.
2026-02-10 09:56:24 +00:00
Chia-hung Duan
2c1d15a4b5 Revert "[mlir] Fix the order of operation attribute verification"
This reverts commit e1651717324e8e17052380c55d8755305552ac9b.

This was submitted by accident.
2026-02-10 07:39:53 +00:00
Chia-hung Duan
e165171732 [mlir] Fix the order of operation attribute verification
The verifiers of these attributes are supposed to verify additional
constraints which usually require the invariants, nested ops to be
verified first. Move it to the end of verification so that we don't
operate on malformed operations.
2026-02-10 07:36:35 +00:00
Longsheng Mou
9eca0a3b8b
[mlir][gpu] Validate argument count in gpu.launch parser (#180388)
This PR adds validation in the `gpu.launch` parser to ensure the launch
configuration provides exactly 3 arguments. Emit a parser error when the
argument count is not 3. Fixes #176426.
2026-02-10 11:16:43 +08:00
Twice
dfc8fa80c9
[MLIR][Python] Refine trait support in MLIR Python (#180550)
This PR is mainly to address review suggestions in #179705.
2026-02-10 10:14:23 +08:00
Jhalak Patel
ccd93180e0
[MLIR][Utils] Fix overflow in constantTripCount for narrow types (#179985)
Extend operands when computing ub - lb to avoid overflow in signed
arithmetic. E.g., i8: ub=127, lb=-128 yields 255, which overflows
without extension.
2026-02-09 14:58:47 -08:00
Krzysztof Drewniak
cba0e6ad8e
[mlir][AMDGPU] Change width of LDS barrier count (#180554)
Whoops, turns out I was off by 1 on how many bits are in the counts and
phases ind these new LDS barriers. This commit fixes this.

Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
2026-02-09 13:37:14 -08:00
Jianhui Li
470c5ca81c
[MLIR][XeGPU] Fix insert_strided_slice op in subgroup distribution (#180604)
The PR modifies the subgroup distribution pass to only sink
insert_strided_slice operation if it becomes the last op before yield.
It avoids sinking insert_strided_slice multiple times and cause
potential issue in worst case.
2026-02-09 13:29:46 -08:00
Twice
fccbdcb15a
[MLIR][Python] Support dynamic traits in python-defined dialects (#179705)
This is a follow-up PR of #169045 and the second part of #179086.

In #179086, we added support for defining regions in Python-defined ops,
but its usefulness was quite limited because we still couldn’t mark an
op as a `Terminator` or `NoTerminator`. In this PR, we port the
`DynamicOpTrait` (introduced on the C++ side for `DynamicDialect` in
#177735) to Python, so we can dynamically attach traits to
Python-defined ops.
2026-02-09 22:26:56 +08:00
Jakub Kuderski
dd356180b3
[mlir][spirv] Verify vector types when parsing (#180430)
Also remove some invalid test cases (replicated constants).

Fixes: https://github.com/llvm/llvm-project/issues/180419
2026-02-09 07:53:36 -05:00
Arun Thangamani
fe91384a5b
[mlir][vector] Wrapping populateFlattenVectorTransferPatterns as a transform pass. (#178134)
This PR covers the `mlir::vector::populateFlattenVectorTransferPatterns`
as a transform pass.
2026-02-09 15:10:51 +05:30
paperchalice
5c5677d7b8
[llvm] Remove "no-infs-fp-math" attribute support (#180083)
One of global options in `TargetMachine::resetTargetOptions`, now all
backends no longer support it, remove it.
2026-02-09 08:43:33 +08:00
Ayush Kumar Gaur
c381180536
[mlir][AMDGPU] Avoid verifier crash in DPPOp on vector operand types (#178887)
### whats the problem 
mlir-opt could crash while verifying amdgpu.dpp when its operands had
vector
types, such as ARM SME tile vectors produced by arm_sme.get_tile.
The crash occurred during IR verification, before any lowering or passes
ran.

### why it happens 
DPPOp::verify() called Type::getIntOrFloatBitWidth() on the operand
type.
When the operand was a VectorType, this hit an assertion because only
scalar
integer and float types have a bitwidth.

### whats the fix 
Query the bitwidth on the element type using getElementTypeOrSelf()
instead of
the container type.
Add a regression test to ensure amdgpu.dpp verification no longer
asserts on
vector operand types.

Fixes #178128
2026-02-07 08:25:03 -05:00
Abhishek Varma
060f325344
[mlir][Linalg] Promote lhs/rhs when vectorizing conv1D as outerproduct (#179883)
-- vector.outerproduct requires lhs/rhs to have same element type as the
   result.
-- This commit adds a fix to promote lhs/rhs to have result's element
   type when vectorizing conv1D slice to vector.outerproduct.
-- This is along the similar lines of what happens when we are
   vectorizing conv1D slice to vector.contract - the corresponding
   CHECK line was incorrect and this commit fixes that too.

Signed-off-by: Abhishek Varma <abhvarma@amd.com>
2026-02-07 10:32:50 +05:30
Nishant Patel
570055bf97
[MLIR][XeGPU] Propagate layout from anchor ops before Wg To Sg & Blocking Pass (#179490)
This PR calls recoverTemporaryLayout before the XeGPUWgtoSgDistribute &
XeGPUBlocking Pass to recover all the temporary operand layout which
might be required by the transformation patterns for checks and
verification
2026-02-06 15:56:09 -08:00
Jianhui Li
8102ebf6a3
[MLIR][XeGPU] Fixing PR179016 minor issues (#180295)
Fix two issues brough by PR179016: 
1. unused variable if build the option with
"DLLVM_ENABLE_ASSERTIONS=OFF"
2. Recover modification to recoverTemporaryLayouts() brought by
PR176737. Unintentionally lost during the merging process.
2026-02-06 14:51:40 -08:00
RattataKing
71a8973a3e
[MLIR][Python] Remove partial LLVM APIs in python bindings (4/n) (#180256)
This PR continues work from #178290 
It replaces some LLVM utilities with straightforward `std::`
equivalents.
2026-02-06 17:04:49 -05:00
Krzysztof Drewniak
762c32aa08
[mlir][AMDGPU] Add wrappers for in-memory barriers on gfx1250 (#180112)
This commit introduces the `!amdgpu.ds_barrier_state` type and
operations on that type, including extracting its components and (more
importantly) provides wrappers around the upcoming barrier-management
instructions that will be added in gfx1250.

This commit is loosely based on work done for Triton, but this commit
provides slightly more lower level-primitives (namely a known-atomic
load for getting the barrier state instead of providing a `wait`
operation that includes an entire spin-loop, though if people want one
we could consider adding it.) These operations will allow LDS barriers
to be interacted with in a more type-safe manner.

The types and operations use the Ds naming scheme to match the
underlying instructions and to avoid confusion with the "LDS barrier"
already present in the AMDGPU dialect that was a workaround for LLVM's
memory fencing support.

(To summarize a potential usage pattern, one can use a pair of these
barriers to communicate between wave(s) in a workgroup that load data
into memory and a separate wave(s) that compute with that data.)

---------

Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
2026-02-06 17:43:12 +00:00
Erich Keane
5283f46615
[CIR] Add tons of function infra, plus a handful of attributes (#179811)
This patch puts together a lot more of the CIR infrastructure for
function attributes, plus adds a bunch of 'TODO' messages for areas that
have been skipped.

Along the way, we also implement 8 attributes in some way: -Convergent
gets a little more work, to make the `noconvergent` C attribute have an
effect

-optsize/minsize are implemented, sourced from the command line

-nobuiltin is a call-only attribute that tells not to replace the
individual call with a builtin. This is a touch confusing, since
no-builtins is an attribute that means "don't replace anything in the
body of this function with builtins (from this list)". The spelling
confusion is existing, and it seems that changing the names away from
LLVM would be confusing.

-save_reg_params & zero_call_used_regs are boht pretty simple registers

-temp-func-name just passes a string to LLVM, consistent with existing
implementation.

-default-func-attrs is a difficult one. It takes command line arguments
and passes them as LLVM-IR attributes directly on functions/calls. In
the dialect, we are capturing these in their own attribute to pass them
on correctly. However, this is one we cannot recover from LLVM-IR for
obvious reasons, so we instead choose to let the 'passthrough' mechanism
work for those.
2026-02-06 14:37:48 +00:00
Jianhui Li
61b8a57839
[MLIR][XeGPU] Refactor layout propagation utilities (#179016)
This PR refactors layout propagation into two distinct components:
result/anchor layout setup and source layout inference from the result.

For operations that require a specific result layout due to semantic or
hardware constraints, the propagation logic explicitly sets up the
result or anchor layout. Otherwise, it infers the source layout from the
backward-propagated consumer layout.

The result or anchor layout may differ from the backward-propagated
consumer layout; any such discrepancies are resolved via the existing
layout-conflict mechanism.

**This PR introduces the following utility functions:**

Source layout inference:

> inferBroadcastSourceLayout()
> inferMultiReductionSourceLayout()
> inferBitCastSourceLayout()
> inferShapeCastSourceLayout()
> inferInsertStridedSliceSourceLayout()

Result / anchor layout setup:

> setupMultiReductionResultLayout()
> setupBitCastResultLayout()
> setupInsertStridedSliceResultLayout()
> setupLoadMatrixAnchorLayout()
> setupStoreMatrixAnchorLayout()
> setupLoadGatherAnchorLayout()
> setupStoreScatterAnchorLayout()

Part of subgroup distribution related code changes are separated and
created as PR https://github.com/llvm/llvm-project/pull/179018/changes.
2026-02-05 19:26:25 -08:00
Sang Ik Lee
972cd847ef
[MLIR][XeVM] Remove xevm to llvm from convert to llvm (#175672)
Remove xevm to llvm conversion pass from convert to llvm as it is a
backend dependent conversion.
And add legalization pattern for splitting large vector load that are
eventually split into smaller
vectors by shufflevector. shufflevector can be replaced with a smaller
load in such case.
2026-02-05 12:58:09 -08:00
RattataKing
059176dfed
[MLIR][Python] Add llvm raw fd ostream c api (#179770)
This PR adds a C API `MlirLlvmRawFdOstream` for `llvm::raw_fd_ostream`,
which cannot be safely replaced by `std::ofstream` on Windows.
`llvm::raw_fd_ostream` configures Win32 file sharing flags, allowing
other handles (e.g. Python temp file handles) to coexist, see details
[here](https://llvm.org/doxygen/Windows_2Path_8inc_source.html#l1281),
while `std::ofstream` disables file sharing by default.
2026-02-05 15:26:24 -05:00
Samarth Narang
7bf47e2e84
[mlir][tensor] Guard constant reshape folding (#179077) 2026-02-05 15:17:47 -05:00
Sang Ik Lee
4f97d093cd
[MLIR][XeGPU][XeVM] Update single element vector type handling. (#178558)
Type conversion rule for single element vector and materialization
function to support the conversion has a mismatch.
Update materialization function to match the type conversion rule.
2026-02-05 10:35:45 -08:00
Michael Platings
18ecdbfe6c
[mlir][vector-to-gpu]: Lower transposed strided transfer_read
Add support for lowering vector.transfer_read to
gpu.subgroup_mma_load_matrix with transpose permutation_map
with non-minor dimensions e.g. (d0, d1, d2) -> (d2, d0)
2026-02-05 16:40:59 +00:00
Matt Arsenault
2502e3b7ba
IR: Promote "denormal-fp-math" to a first class attribute (#174293)
Convert "denormal-fp-math" and "denormal-fp-math-f32" into a first
class denormal_fpenv attribute. Previously the query for the effective
denormal mode involved two string attribute queries with parsing. I'm
introducing more uses of this, so it makes sense to convert this
to a more efficient encoding. The old representation was also awkward
since it was split across two separate attributes. The new encoding
just stores the default and float modes as bitfields, largely avoiding
the need to consider if the other mode is set.

The syntax in the common cases looks like this:
  `denormal_fpenv(preservesign,preservesign)`
  `denormal_fpenv(float: preservesign,preservesign)`
  `denormal_fpenv(dynamic,dynamic float: preservesign,preservesign)`

I wasn't sure about reusing the float type name instead of adding a
new keyword. It's parsed as a type but only accepts float. I'm also
debating switching the name to subnormal to match the current
preferred IEEE terminology (also used by nofpclass and other
contexts).

This has a behavior change when using the command flag debug
options to set the denormal mode. The behavior of the flag
ignored functions with an explicit attribute set, per
the default and f32 version. Now that these are one attribute,
the flag logic can't distinguish which of the two components
were explicitly set on the function. Only one test appeared to
rely on this behavior, so I just avoided using the flags in it.

This also does not perform all the code cleanups this enables.
In particular the attributor handling could be cleaned up.

I also guessed at how to support this in MLIR. I followed
MemoryEffects as a reference; it appears bitfields are expanded
into arguments to attributes, so the representation there is
a bit uglier with the 2 2-element fields flattened into 4 arguments.
2026-02-05 13:31:26 +00:00
Jack Styles
8949c6d86b
[MLIR][OpenMP] Add Taskloop Collapse Support (#175924)
Following work completed in #174386 and #174623, this patch adds support
for collapse to Taskloop. Collapse allows for the user to compress
multiple loop nests into a single loop, and for this to work with
Taskloop, there needs to be some changes to how we process the loops,
and the tasks that run them.

This patch brings Taskloop equivalent to OpenMP 4.5 support for MLIR and
Flang.
2026-02-05 08:59:00 +00:00
ofri frishman
dbb42c9a4e
[mlir] update memref.cast cast compatible check (#179313)
Updating memref.cast check regarding if input and output are valid for
casting.
Currently in case of casting between dynamic and static dims with
different strides, the return value of the check is not symmetric and
depends if casting for dynamic to static or vice versa. Updating the
check logic to make this symmetric.
2026-02-05 10:07:42 +02:00
Charitha Saumya
d0f9373409
[mlir][gpu][pipeline] Add missing passes in XeGPU to XeVM pipeline (#179320) 2026-02-04 16:59:14 -08:00
RattataKing
b20fca82ab
[MLIR][Python] Remove partial LLVM APIs in python bindings (3/n) (#178984)
This PR continues work from #178290 
It cleans up multiple LLVM utilities in *.h files under
`mlir/Bindings/python`, along with the corresponding *.cpp files.
2026-02-04 13:18:32 -05:00
Frank Schlimbach
26b1f61c14
[mlir][shard,mpi] Fixing lowering allgather shard->mpi->llvm (#178870)
`shard.allgather` concatenates along a specified gather-axis. However,
`mpi.allgather` always concatenates along the first dimension and there
is no MPI operation that allows gathering along an arbitrary axis.
Hence, if gather-axis!=0, we need to create a temporary buffer where we
gather along the first dimension and then copy from that buffer to the
final output along the specified gather-axis. This is not ideal by far.

Along the way also
- fixing computation of memref size in mpitollvm
- adding a simple canonicalization pattern for comm_size for easier
debugging
- adding more tests
2026-02-04 18:36:03 +01:00
Krzysztof Drewniak
c08b2c75db
[milr][gpu] Make barrier elimination address-space aware (#178101)
Upgrade the barrier eliminiation pass to account for the address spaces
of accessed memory when deciding which barriers to eliminiate. In
particular, a loop that only reads and writes global memory that has a
workgoup-memory-fencing barrier inside of it will now have that barrier
marked for elimiination, as the global memory traffic is not being
synchronized by the barrier.

The pass is also adjusted to ignore barriers whose memory fencing list
is [], as those do not synchronize memory and therefore the logic in
this pass would potentially incorrectly remove them after proving that
fact.

---------

Co-authored-by: Jakub Kuderski <kubakuderski@gmail.com>
2026-02-04 08:39:44 -08:00
Andrzej Warzyński
10d80708d9
[mlir][emitc] Update the WrapFuncInClassPass pass (#179184)
Update the `WrapFuncInClassPass` pass so that, by default, the generated
method is named `operator()()` rather than `execute()`. This makes the
pass more generic, instead of catering to specific users expecting an
`execute()` method.

To preserve the original behaviour, add a new pass option to override
the method name: `func-name`. For example:

```bash
  mlir-opt file.mlir -wrap-emitc-func-in-class=func-name=execute
```

Additionally, make a couple of small editorial changes:
* Rename `populateFuncPatterns` to `populateWrapFuncInClass` to make it
    clear that the corresponding pattern is specific to the
    `WrapFuncInClass` pass.
  * Remove `// CHECK: module {` to reduce test noise.

For context, this change was proposed on Discourse:
  * https://discourse.llvm.org/t/rfc-emitc-support-for-mlgo
2026-02-04 16:30:59 +00:00
Chi-Chun, Chen
36dadddd74
[Flang][mlir][OpenMP] Add affinity clause to omp.task and Flang lowering (#179003)
- Add MLIR OpenMP affinity clause
- Lower flang task affinity to mlir
- Emit TODO for iterator modifier and update negative test
2026-02-04 10:30:35 -06:00
Luke Hutton
e9253f0e35
[mlir][tosa] Prevent creation of tosa.concat_shape for scalar shape values (#176120)
Updates `tosa.concat_shape` inline with the following specification
change: https://github.com/arm/tosa-specification/pull/30.
2026-02-04 15:24:36 +00:00
Luke Hutton
d20b90a2da
[mlir][tosa] Enhance resolveBroadcastShape to handle dynamic dims (#175932)
This commit improves `resolveBroadcastShape` when some input dims are
dynamic. Previously, this would result in shape inference failing,
meaning the output type of the operation would not be updated. Now the
output shape is correctly inferred, selecting the static dim if > 1,
otherwise selecting the dynamic dim.
2026-02-04 14:15:08 +00:00
Udaya Ranga
45aa84b405
[mlir][tosa]: Add MIN_SHAPE, MAX_SHAPE Ops folders (#179488)
Signed-off-by: Udaya Ranga <udaya.ranga@arm.com>
2026-02-04 09:28:07 +00:00
Twice
426374ed12
[MLIR][Python] Ignore the returned status of loadDialectModule in lookup functions (#179609)
Since `loadDialectModule` doesn't work for Python-defined dialects
(`mlir.dialects.ext`), currently we should lookup for
dialect/operation/opadaptor class even if the `loadDialectModule`
function fails. It's also because users can import some modules
manually, and we do already ignore it in some cases:

e2061328a8/mlir/lib/Bindings/Python/Globals.cpp (L163-L166)


Related to
https://github.com/llvm/llvm-project/pull/176920#discussion_r2762029022.
2026-02-04 15:25:07 +08:00
Tim Noack
254b3b137e
[mlir][tblgen] Add PredTypeTrait/PredAttrTrait support (#169153)
This patch adds support for `PredTypeTrait` and `PredAttrTrait` in type
and attribute definitions, enabling declarative predicate-based
verification similar to how `PredOpTrait` works for operations.

  ## Motivation

In 802bf02 (from 2021), `PredTypeTrait`/`PredAttrTrait` were defined in
TableGen but not implemented in the code generator. Using them causes
mlir-tblgen to crash with an assertion failure when trying to cast
`PredTrait` to `InterfaceTrait`. This patch fixes the crash and
implements the actual verification code generation.

  ## Usage

Use `$paramName` syntax in predicates to reference type/attribute
parameters:

  ```tablegen
  def MyType : MyDialect_Type<"MyType",
      [PredTypeTrait<"value must be positive", CPred<"$value > 0">>]> {
    let parameters = (ins "unsigned":$value);
    let mnemonic = "my_type";
    let assemblyFormat = "`<` $value `>`";
  }
  ```

  This generates verification code in `verifyInvariantsImpl()`:
```cpp
  if (!(value > 0)) {
    emitError() << "failed to verify that value must be positive";
    return ::mlir::failure();
  }
  ```
2026-02-03 14:00:56 -08:00
Ivan Butygin
d8350712b3
[mlir] GPUToROCDL: lower gpu.subgroup_id to the intrinsic where possible (#179422)
Lower `gpu.subgroup_id` to `wave.id` intrinsic on gfx12+, lower to
`linearized_thread_id / subgroup_size` on older.
2026-02-04 00:53:07 +03:00
Erich Keane
3db2fd8bf0
[CIR] Implement 'allocsize' function/call attribute lowering (#179342)
The alloc_size attribute takes the argument number(normalized to the
    index!) of the element size and count, for things like 'malloc' or
'calloc'.

This ends up being slightly more complicated than others, as this has
data that we have to decide on a format for. LLVM chooses to pack both
of these 32 bit values into a single i64, but unpacks it for the purpose
of input/output. The second value, the number of elements, is optional.

This patch uses a DenseI32ArrayAttr to store them for the LLVMIR
dialect, which gets us the packed nature, but doesn't require us doing
any work to unpack it.
2026-02-03 12:54:28 -08:00
neildhar
cbbb87720d
[MLIR] Enforce symbol visibility during symbol lookup (#179370)
Update symbol resolution to examine whether a nested symbol being
resolved is private, and fail in that case. This ensures that we
maintain invariants on symbol visibility that we depend on in
optimisations.
2026-02-03 18:01:59 +00:00
neildhar
9727cfe1fc
[NFC][MLIR] Simplify lookup of nested symbols (#179362)
Consolidate the handling of nested symbols in the loop over nested
references. This is an NFC refactor to make it simpler to enforce symbol
visibility here.
2026-02-03 09:34:08 -08:00
Jianhui Li
983d8663b0
[MLIR] [XeGPU] SG distribution: adding tests for alloca/create_memdesc and remove unncessary check from shape_cast op lowering (#179018)
This PR add subgroup distribution tests for memref.alloca and
xegpu.create_memdesc ops.
It also removes the slice layout requirement for shape_cast.
2026-02-03 09:17:25 -08:00