522051 Commits

Author SHA1 Message Date
Joshua Batista
6a01ac7d06
[HLSL] Add concepts for Structured buffers (#119643)
This PR adds concept validation to structured buffers, in the same way
that it was done for typed buffers (like RWBuffer) in
https://github.com/llvm/llvm-project/pull/116413.
This PR should also be responsible for introducing rejection of 0 size
elements for structured buffers.
Fixes https://github.com/llvm/llvm-project/issues/117406
2024-12-19 15:04:39 -08:00
Philip Reames
0517772b4a Delete unused PoisonChecking utility pass
This was introduced ~5yrs ago (by me), and has never really gotten
any adoption.  By now, it's significantly out of sync with new/changed
poison propoagation rules.  The idea is still reasonable, but the
imagined use case is largely covered by alive2 these days anyways.
2024-12-19 14:23:38 -08:00
Florian Hahn
5f096fd221
Revert "[LoopVectorizer] Add support for partial reductions (#92418)"
This reverts commit 060d62b48aeb5080ffcae1dc56e41a06c6f56701.

It looks like this is triggering an assertion when build llvm-test-suite
on ARM64 macOS.

Reproducer from MultiSource/Benchmarks/Ptrdist/bc/number.c

    target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128-Fn32"
    target triple = "arm64-apple-macosx15.0.0"

    define void @test(i64 %idx.neg, i8 %0) #0 {
    entry:
      br label %while.body

    while.body:                                       ; preds = %while.body, %entry
      %n1ptr.0.idx131 = phi i64 [ %n1ptr.0.add, %while.body ], [ %idx.neg, %entry ]
      %n2ptr.0.idx130 = phi i64 [ %n2ptr.0.add, %while.body ], [ 0, %entry ]
      %sum.1129 = phi i64 [ %add99, %while.body ], [ 0, %entry ]
      %n1ptr.0.add = add i64 %n1ptr.0.idx131, 1
      %conv = sext i8 %0 to i64
      %n2ptr.0.add = add i64 %n2ptr.0.idx130, 1
      %1 = load i8, ptr null, align 1
      %conv97 = sext i8 %1 to i64
      %mul = mul i64 %conv97, %conv
      %add99 = add i64 %mul, %sum.1129
      %cmp94 = icmp ugt i64 %n1ptr.0.idx131, 0
      %cmp95 = icmp ne i64 %n2ptr.0.idx130, -1
      %2 = and i1 %cmp94, %cmp95
      br i1 %2, label %while.body, label %while.end.loopexit

    while.end.loopexit:                               ; preds = %while.body
      %add99.lcssa = phi i64 [ %add99, %while.body ]
      ret void
    }

    attributes #0 = { "target-cpu"="apple-m1" }

> opt -p loop-vectorize
Assertion failed: ((VF.isScalar() || V->getType()->isVectorTy()) && "scalar values must be stored as (0, 0)"), function set, file VPlan.h, line 284.
2024-12-19 21:46:51 +00:00
Thurston Dang
d33a2c5811
[BoundsSan] Update BoundsChecking.cpp to use no-merge attribute where applicable (#120620)
https://github.com/llvm/llvm-project/pull/65972 introduced
-ubsan-unique-traps and -bounds-checking-unique-traps, which attach the
function size to the ubsantrap intrinsic.

https://github.com/llvm/llvm-project/pull/117651 changed
ubsan-unique-traps to use nomerge instead of the function size, but did
not update -bounds-checking-unique-traps. This patch adds nomerge to
bounds-checking-unique-traps.
2024-12-19 13:31:29 -08:00
Florian Hahn
9e322c56f7
[TySan] Don't report globals with external storage. (#120565)
Globals with external storage should have been initialized where they
are defined.

Fixes https://github.com/llvm/llvm-project/issues/120448

PR: https://github.com/llvm/llvm-project/pull/120565
2024-12-19 21:30:56 +00:00
LLVM GN Syncbot
4c3e13ebca [gn build] Port 34e0f9cd36e9 2024-12-19 21:21:14 +00:00
David Green
f000c053bf [VectorCombine] Add test coverage to shuffleToIdentity for fp casts. NFC 2024-12-19 21:19:06 +00:00
Michael Jones
0a94ee694f
[libc] update host build docs (#120147)
Update the host build docs to better reflect the current recommended
process.
2024-12-19 13:13:55 -08:00
Brox Chen
c2830b2180
[AMDGPU][True16][MC] added fake16 for gfx12 alias MC test (#120624)
This is a NFC.

Duplicate gfx12_asm_vop3_alias.s file to true16/fake16 version and
update `real-true16` flag on it.

This is preparing the upcoming changes for true16
2024-12-19 16:11:03 -05:00
Louis Dionne
34e0f9cd36
[libc++] Remove the need for uselocale() (#120158)
Instead of requiring `uselocale()` as part of the base locale API,
define __locale_guard in the few places that need it directly, without
making __locale_guard part of the base API.

In practice, most mainstream platforms never used __locale_guard, so
they also didn't need to define uselocale(), and after this patch they
actually don't define it anymore.
2024-12-19 16:06:08 -05:00
Kazu Hirata
5b5b241edf
[TableGen] Avoid repeated hash lookups (NFC) (#120619) 2024-12-19 13:02:55 -08:00
Nico Weber
8dfae0c462 Revert "[libcxx] Use alias for detecting overriden function (#114961)"
This reverts commit 62bd10f7d18ca6f544286767cae2c9026d493888.
Breaks building with -flto=thin, see
https://github.com/llvm/llvm-project/pull/114961#issuecomment-2555754056
2024-12-19 15:54:06 -05:00
Thurston Dang
cb8a90b7d1
[ubsan] Remove -ubsan-unique-traps (replace with -fno-sanitize-merge) (#120613)
-fno-sanitize-merge (introduced in
https://github.com/llvm/llvm-project/pull/120511) duplicates the
functionality of -ubsan-unique-traps but also allows individual checks
to be specified e.g.,
* "-fno-sanitize-merge" without arguments is equivalent to
-ubsan-unique-traps
* "-fno-sanitize-merge=bool,enum" will apply it only to those two checks

Additionally, the naming is more consistent with the rest of the
-fsanitize- family.

This patch therefore removes -ubsan-unique-traps. This breaks backwards
compatibility; we hope that this is acceptable since '-mllvm
-ubsan-unique-traps' was an experimental flag.

This patch also adds negative test examples to bounds-checking.c, and
strengthens the NOOPTARRAY assertion to prevent spurious matches.

"-bounds-checking-unique-traps" is unaffected by this patch.
2024-12-19 12:53:48 -08:00
Valentin Clement (バレンタイン クレメン)
7009b06993
[flang][cuda] Allow STOP in device context (#120625)
STOP statement is allowed in device procedure
2024-12-19 12:41:09 -08:00
Piotr Fusik
6e7312bda6
[RISCV] Select and/or/xor with certain constants to Zbb ANDN/ORN/XNOR (#120221)
(and X, (C<<12|0xfff)) -> (ANDN X, ~C<<12)
    (or  X, (C<<12|0xfff)) -> (ORN  X, ~C<<12)
    (xor X, (C<<12|0xfff)) -> (XNOR X, ~C<<12)

Emits better code, typically by avoiding an `ADDI HI, -1` instruction.

Co-authored-by: Craig Topper <craig.topper@sifive.com>
2024-12-19 21:38:20 +01:00
Ziqing Luo
4797437463
[clang][NFC] Increase NumStmtBits by 1 as we are approaching the limit (#120341)
We have already hit the limit of NumStmtBits downstream after
010d0115fc8e3834fc6f747f0841f3b1e467c4da, which adds 4 new StmtNodes.
2024-12-19 12:32:31 -08:00
Leandro Lupori
1fcb6a9754
[flang][OpenMP] Initialize allocatable members of derived types (#120295)
Allocatable members of privatized derived types must be allocated,
with the same bounds as the original object, whenever that member
is also allocated in it, but Flang was not performing such
initialization.

The `Initialize` runtime function can't perform this task unless
its signature is changed to receive an additional parameter, the
original object, that is needed to find out which allocatable
members, with their bounds, must also be allocated in the clone.
As `Initialize` is used not only for privatization, sometimes this
other object won't even exist, so this new parameter would need
to be optional.
Because of this, it seemed better to add a new runtime function:
`InitializeClone`.
To avoid unnecessary calls, lowering inserts a call to it only for
privatized items that are derived types with allocatable members.

Fixes https://github.com/llvm/llvm-project/issues/114888
Fixes https://github.com/llvm/llvm-project/issues/114889
2024-12-19 17:26:50 -03:00
erichkeane
bdf2555308 [OpenACC] Implement 'device_num' clause sema for 'init'/'shutdown'
This is a very simple sema implementation, and just required AST node
plus the existing diagnostics.  This patch adds tests and adds the AST
node required, plus enables it for 'init' and 'shutdown' (only!)
2024-12-19 12:21:51 -08:00
erichkeane
4bbdb018a6 [OpenACC] Implement 'init' and 'shutdown' constructs
These two constructs are very simple and similar, and only support 3
different clauses, two of which are already implemented.  This patch
adds AST nodes for both constructs, and leaves the device_num clause
unimplemented, but enables the other two.
2024-12-19 12:21:50 -08:00
Kazu Hirata
10d054e954
[memprof] Introduce IndexedCallstackIdConveter (NFC) (#120540)
This patch introduces IndexedCallstackIdConveter as a convenience
wrapper around FrameIdConverter and CallStackIdConverter just for
tests.

With the new wrapper, we get to replace idioms like:

  FrameIdConverter<decltype(MemProfData.Frames)> FrameIdConv(
      MemProfData.Frames);
  CallStackIdConverter<decltype(MemProfData.CallStacks)> CSIdConv(
      MemProfData.CallStacks, FrameIdConv);

with:

  IndexedCallstackIdConveter CSIdConv(MemProfData);

Unfortunately, this exact pattern occurs in tests only; the
combinations of the frame ID converter and call stack ID converter are
diverse in production code.
2024-12-19 12:20:25 -08:00
Niels Dekker
e3b571e632
[clang-tidy][NFC] Sync ContainerSizeEmptyCheck with container-size-empty doc (#118459)
Brought the class documentation in sync with the user documentation at
container-size-empty.rst:


bfb26202e0/clang-tools-extra/docs/clang-tidy/checks/readability/container-size-empty.rst (L7-L14)
2024-12-19 21:16:40 +01:00
Finn Plummer
45c01e8a33
[NFC][TargetTransformInfo][VectorUtils] Consolidate isVectorIntrinsic... api (#117635)
- update `VectorUtils:isVectorIntrinsicWithScalarOpAtArg` to use TTI for
all uses, to allow specifiction of target specific intrinsics
- add TTI to the `isVectorIntrinsicWithStructReturnOverloadAtField` api
- update TTI api to provide `isTargetIntrinsicWith...` functions and
  consistently name them
- move `isTriviallyScalarizable` to VectorUtils
  
- update all uses of the api and provide the TTI parameter

Resolves #117030
2024-12-19 11:54:26 -08:00
Ryosuke Niwa
b5d02786be
Revert "[WebKit checkers] Recognize adoptRef as a safe function" (#120626)
Reverts llvm/llvm-project#119846. Introduced a failing test.
2024-12-19 11:42:17 -08:00
Konstantina Mitropoulou
d3508ccd15
[AMDGPU] Emit S_CBRANCH_SCC for floating-point conditions. (#120588)
- **[AMDGPU] Add new test.**
- **[AMDGPU] Emit S_CBRANCH_SCC for floating-point conditions.**

---------

Co-authored-by: Konstantina Mitropoulou <KonstantinaMitropoulou@amd.com>
2024-12-19 11:20:43 -08:00
Justin Bogner
aa07f92210
[DirectX][SPIRV] Consistent names for HLSL resource intrinsics (#120466)
Rename HLSL resource-related intrinsics to be consistent with the naming
conventions discussed in [wg-hlsl:0014].

This is an entirely mechanical change, consisting of the following
commands and automated formatting.

```sh
git grep -l handle.fromBinding | xargs perl -pi -e \
  's/(dx|spv)(.)handle.fromBinding/$1$2resource$2handlefrombinding/g'
git grep -l typedBufferLoad_checkbit | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferLoad_checkbit/$1$2resource$2loadchecked$2typedbuffer/g'
git grep -l typedBufferLoad | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferLoad/$1$2resource$2load$2typedbuffer/g'
git grep -l typedBufferStore | xargs perl -pi -e \
  's/(dx|spv)(.)typedBufferStore/$1$2resource$2store$2typedbuffer/g'
git grep -l bufferUpdateCounter | xargs perl -pi -e \
  's/(dx|spv)(.)bufferUpdateCounter/$1$2resource$2updatecounter/g'
git grep -l cast_handle | xargs perl -pi -e \
  's/(dx|spv)(.)cast.handle/$1$2resource$2casthandle/g'
```

[wg-hlsl:0014]: https://github.com/llvm/wg-hlsl/blob/main/proposals/0014-consistent-naming-for-dx-intrinsics.md
2024-12-19 12:17:21 -07:00
Ryosuke Niwa
98c97d4a19
[WebKit checkers] Recognize adoptRef as a safe function (#119846)
adoptRef in WebKit constructs Ref/RefPtr so treat it as such in
isCtorOfRefCounted. Also removed the support for makeRef and makeRefPtr
as they don't exist any more.
2024-12-19 11:09:36 -08:00
Sylvestre Ledru
395a369056 [Xtensa] Fix build after splitting SDNode::use_iterator
Same as: 145ddf7ede28d9131a65b7f86ad07736a824ee21
2024-12-19 19:52:53 +01:00
alx32
1808255a44
[DWARFVerifier] Fix and enable broken test llvm-dwarfdump/X86/verify_no_overlap_error_icf.yaml (#120330)
Fixing broken test - calling `sed` in a cross-platform compatible way. 
Verified to pass on Mac (which uses BSD sed).
2024-12-19 10:50:44 -08:00
ChiaHungDuan
b71c44b9be
[scudo] Add the record of number of attempted page release (#120497)
This also removes the `RangesReleased` which doesn't give much insight
to whether we should adjust the heuristic of doing page release.
2024-12-19 10:47:44 -08:00
Maksim Panchenko
21684e38ee
[BOLT][Linux] Refactor reading of PC-relative addresses. NFCI (#120491)
Fix evaluation order problem identified in
https://github.com/llvm/llvm-project/pull/119088.
2024-12-19 10:40:25 -08:00
Kazu Hirata
2886576944
[memprof] clang-format MemProf-related files (NFC) (#120504) 2024-12-19 10:25:29 -08:00
Michael Maitland
3710050566
[RISCV][VLOPT] Set CommonVL as the largest of the users (#120349)
Prior to this patch, we required that all users had the same VL in order
to optimize. But as the FIXME said, we can use the largest VL to
optimize, as long as we can determine what the largest is. This patch
implements the FIXME.
2024-12-19 13:22:31 -05:00
Kazu Hirata
e504ece6c1
[LLVMIR] Migrate away from PointerUnion::{is,get} (NFC) (#120530)
Note that PointerUnion::{is,get} have been soft deprecated in
PointerUnion.h:

  // FIXME: Replace the uses of is(), get() and dyn_cast() with
  //        isa<T>, cast<T> and the llvm::dyn_cast<T>

I'm not touching PointerUnion::dyn_cast for now because it's a bit
complicated; we could blindly migrate it to dyn_cast_if_present, but
we should probably use dyn_cast when the operand is known to be
non-null.
2024-12-19 10:16:40 -08:00
Kazu Hirata
a03343daa6
[memprof] YAMLify the profile for memprof_missing_leaf.ll (NFC) (#120488)
This patch converts the profile for memprof_missing_leaf.ll to the
recently introduced YAML-based text format.
2024-12-19 10:16:10 -08:00
Jason Molenda
46e7823007
[lldb][debugserver] Read/write SME registers on arm64 (#119171)
**Note:** The register reading and writing depends on new register
flavor support in thread_get_state/thread_set_state in the kernel, which
will be first available in macOS 15.4.

The Apple M4 line of cores includes the Scalable Matrix Extension (SME)
feature. The M4s do not implement Scalable Vector Extension (SVE),
although the processor is in Streaming SVE Mode when the SME is being
used. The most obvious side effects of being in SSVE Mode are that (on
the M4 cores) NEON instructions cannot be used, and watchpoints may get
false positives, the address comparisons are done at a lowered
granularity.

When SSVE mode is enabled, the kernel will provide the Streaming Vector
Length register, which is a maximum of 64 bytes with the M4. Also
provided are SVCR (with bits indicating if SSVE mode and SME mode are
enabled), TPIDR2, SVL. Then the SVE registers Z0..31 (SVL bytes long),
P0..15 (SVL/8 bytes), the ZA matrix register (SVL*SVL bytes), and the M4
supports SME2, so the ZT0 register (64 bytes).

When SSVE/SME are disabled, none of these registers are provided by the
kernel - reads and writes of them will fail.

Unlike Linux, lldb cannot modify the SVL through a thread_set_state
call, or change the processor state's SSVE/SME status. There is also no
way for a process to request a lowered SVL size today, so the work that
David did to handle VL/SVL changing while stepping through a process is
not an issue on Darwin today. But debugserver should be providing
everything necessary so we can reuse all of David's work on resizing the
register contexts in lldb if it happens in the future. debugbserver
sends svl, svcr, and tpidr2 in the expedited registers when a thread
stops, if SSVE|SME mode are enabled (if the kernel allows it to read the
ARM_SME_STATE register set).

While the maximum SVL is 64 bytes on M4, the AArch64 maximum possible
SVL is 256; this would give us a 64k ZA register. If debugserver sized
all of its register contexts assuming the largest possible SVL, we could
easily use 2MB more memory for the register contexts of all threads in a
process -- and on iOS et al, processes must run within a small memory
allotment and this would push us over that.

Much of the work in debugserver was changing the arm64 register context
from being a static compile-time array of register sets, to being
initialized at runtime if debugserver is running on a machine with SME.
The ZA is only created to the machine's actual maximum SVL. The size of
the 32 SVE Z registers is less significant so I am statically allocating
those to the architecturally largest possible SVL value today.

Also, debugserver includes information about registers that share the
same part of the register file. e.g. S0 and D0 are the lower parts of
the NEON 128-bit V0 register. And when running on an SME machine, v0 is
the lower 128 bits of the SVE Z0 register. So the register maps used
when defining the VFP registers must differ depending on the
capabilities of the cpu at runtime.

I also changed register reading in debugserver, where formerly when
debugserver was asked to read a register, and the thread_get_state read
of that register failed, it would return all zero's. This is necessary
when constructing a `g` packet that gets all registers - because there
is no separation between register bytes, the offsets are fixed. But when
we are asking for a single register (e.g. Z0) when not in SSVE/SME mode,
this should return an error.

This does mean that when you're running on an SME capabable machine, but
not in SME mode, and do `register read -a`, lldb will report that 48 SVE
registers were unavailable and 5 SME registers were unavailable. But
that's only when `-a` is used.

The register reading and writing depends on new register flavor support
in thread_get_state/thread_set_state in the kernel, which is not yet in
a release. The test case I wrote is skipped on current OSes. I pilfered
the SME register setup from some of David's existing SME test files;
there were a few Linux specific details in those tests that they weren't
easy to reuse on Darwin.

rdar://121608074
2024-12-19 09:57:27 -08:00
MagentaTreehouse
254ba78495
[GenericDomTree][NFC] Remove unnecessary const_casts (#97638) 2024-12-19 09:46:03 -08:00
Piotr Fusik
01b96385fd [RISCV][test] Add zbb-logic-neg-imm.ll 2024-12-19 18:44:21 +01:00
Simon Pilgrim
434819c35f [PhaseOrdering][X86] Add test coverage for #34072
Add tests for horizontal add patterns with missing/undemanded elements - which typically prevents folding to the (add (shuffle a, b),(shuffle a, b)) optimal pattern
2024-12-19 17:32:18 +00:00
Nico Weber
c2dd612797
[llvm-lib] Add /llvmlibindex:no to disable writing an index (#120596)
This can be used with /llvmlibthin to create thin archives without an
index, which is a prerequisite for porting
https://reviews.llvm.org/D117284 to lld-link.

Creating files like this is already possible with `llvm-ar rcS`, so this
doesn't add additional problems.
2024-12-19 12:28:09 -05:00
Brox Chen
4044886c7c
Revert "[AMDGPU][True16][MC] true16 for v_minmax/maxmin_f16 (#119586)" (#120594)
This reverts commit e0526b0780f56eede09b05a859a93626ecdc6e4d.

The `v_minmax/maxmin_f16`(GFX11) needs to be updated to t16 with
`v_minmax/maxmin_num_f16`(GFX12) together since they share the same
codegen pattern. Revert the old patch and resubmit
2024-12-19 12:10:23 -05:00
Craig Topper
f139bde8d8
[SelectionDAG] Move SDNode::use_iterator::getOperandNo to SDUse. (#120536)
This allows us to write more range based for loops because we no
longer need the iterator. It also matches IR's Use class.
2024-12-19 09:07:42 -08:00
Thurston Dang
2b9abf0db2 Revert "[analyzer] Handle [[assume(cond)]] as __builtin_assume(cond) (#116462)"
This reverts commit 89da344e5879e5347b5057520d5230e40ae24831.

Reason: buildbot breakages e.g., https://lab.llvm.org/buildbot/#/builders/55/builds/4556 (for which the reverted patch is the only code change)
2024-12-19 17:02:16 +00:00
Jason Molenda
527595f927
[lldb][Mach-O] Initialize cputype/cpusubtype in test corefiles (#120518)
TestFirmwareCorefiles.py has a helper utility,
create-empty-corefile.cpp, which creates corefiles with different
metadata to specify the binary that should be loaded. It normally uses
an actual binary's UUID for the metadata, and it uses the binary's
cputype/cpusubtype for the corefile's mach header.

There is one test where it creates a corefile with metadata for a UUID
that cannot be found -- it is given no binary -- and in that case, the
cputype/cpusubtype it sets in the core file mach header was
uninitialized data. Through luck, on Darwin systems, the uninitialized
data typically matched a CPU_TYPE from machine.h and the test would
work. But when the value doens't match one of thoes defines, lldb would
reject the corefile entirely, and the test would fail. This has been an
infrequent failure on the CI bots for a while and I couldn't ever repo
it. There's a recent configuration where it was happening every time and
I was able to track it down.

rdar://141727563
2024-12-19 08:58:36 -08:00
Craig Topper
145ddf7ede [M68k] Fix build after splitting SDNode::use_iterator. 2024-12-19 08:55:58 -08:00
Peng Liu
fafdf97047
[libc++] Simplify vector<bool>::flip() and add new tests (#119607)
This PR simplifies the internal bitwise logic of the `flip()` function
for `vector<bool>`, and creates new tests to validate the changes.
2024-12-19 11:48:51 -05:00
Craig Topper
e6b2495545
[SelectionDAG] Split SDNode::use_iterator into user_iterator and use_iterator. (#120531)
SDNode::use_iterator now returns an SDUse& when dereferenced.
SDNode::user_iterator returns SDNode*. SDNode::use_begin/use_end/uses
work on use_iterator. SDNode::user_begin/user_end/users work on
user_iterator.

We can now write range based for loops using SDUse& and SDNode::uses().
I've converted many of these in this patch. I didn't update loops that
have additional variables updated in their for statement.

Some loops use SDNode::use_iterator::getOperandNo() which also prevents
using range based for loops. I plan to move this into SDUse in a follow
up patch.
2024-12-19 08:35:32 -08:00
Nico Weber
f8bcd93224
[lld/COFF] Fix -start-lib / -end-lib after reviews.llvm.org/D116434 (#120452)
That change forgot to set `lazy` to false before calling `addFile()` in
`forceLazy()` which caused `addFile()` to parse the file we want to
force a load for to be added as a lazy object again instead of adding
the file to `ctx.objFileInstances`.

This is caught by a pretty simple test (included).
2024-12-19 11:30:54 -05:00
Nico Weber
b05071de89
[lld/ELF] Add tests for start-lib / end-lib with eager loads (#120294)
Contains tests for the scenarios fixed in lld/COFF in #120292. They pass
without code changes, but I didn't see existing tests for this.
2024-12-19 11:23:09 -05:00
Nico Weber
2b6713d3b8
[lld/coff] Fix assert on /start-lib foo.obj /end-lib during eager loads (#120292)
If foo.obj is eagerly loaded (due to a prior undef referencing one if
its symbols) and has more than one symbol, we used to assert:
SymbolTable::addLazyObject() for the first symbol would set `lazy` to
false and load all symbols from the file, but the outer
ObjFile::parseLazy() loop would continue to run and call addLazyObject()
for the second symbol, which would assert.

Instead, just stop adding lazy symbols if the file got loaded for real
while adding a symbol.

(The ELF port has a similar early exit in `ObjFile<ELFT>::parseLazy()`.)
2024-12-19 11:22:29 -05:00
Peng Liu
4039a79de7
[libc++][test] Improve tests for assign in std::vector and vector<bool> (#119163)
This PR enhances the test coverage for std::vector::assign by adding new
tests for several important test cases that were previously missing, as
shown in the following table:

| test cases                        | forward_iterator | input_iterator |
|-----------------------------------|------------------|----------------|
| new_size > capacity()             | Yes              | Yes            |
| size() < new_size <= capacity()   | No               | No             |
| new_size <= size()                | No               | No             |

Similarly, no tests have previously covered `assign(InputIterator, InputIterator)`
and `assign(size_type, const value_type&)` for `vector<bool>`.

With this patch applied, all missing tests are covered.
2024-12-19 11:19:25 -05:00