8 Commits

Author SHA1 Message Date
Paul Walker
38fffa630e
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548) 2024-11-06 11:53:33 +00:00
Matt Arsenault
dab1f7c8d3
AMDGPU: Emit 1/llvm.sqrt(x) instead of rsqrt calls in libcall handling (#92863)
With the contract flag we should end up codegening to the rsqrt
instruction, or denormal corrected rsqrt sequence present in the
library.
2024-05-21 18:42:45 +02:00
Matt Arsenault
66b76faffb
AMDGPU: Directly emit sqrt intrinsic when folding rootn(x, 2) (#92598)
This avoids depending on pre/post link runs.

Depends #92595
2024-05-21 07:57:04 +02:00
Matt Arsenault
3cb1fe60fb
AMDGPU: Don't fold rootn(x, 1) to input for strictfp functions (#92595)
We need to insert a constrained canonicalize.

Depends #92594
2024-05-20 22:23:02 +02:00
Matt Arsenault
586ecd7560
AMDGPU: Relax vector restriction for rootn libcall folds (#92594)
We could try harder for nonsplat vectors but probably not worth the
effort.
2024-05-20 18:36:17 +02:00
Kevin P. Neal
f5296df97c
[FPEnv][AMDGPU] Correct AMDGPUSimplifyLibCalls handling of strictfp attribute. (#86705)
The AMDGPUSimplifyLibCalls pass was lowering function calls with the
strictfp attribute to sequences that included function calls incorrectly
lacking the attribute. This patch corrects that.

The pass now also emits the correct constrained fp call instead of
normal FP instructions when in a function with the strictfp attribute.
Replacing non-constrained calls with constrained calls when required
is still on the IRBuilder's TODO list.
2024-03-27 10:20:00 -04:00
Jessica Del
32f9983c06
[AMDGPU] - Add address space for strided buffers (#74471)
This is an experimental address space for strided buffers. These buffers
can have structs as elements and
a stride > 1.
These pointers allow the indexed access in units of stride, i.e., they
point at `buffer[index * stride]`.
Thus, we can use the `idxen` modifier for buffer loads.

We assign address space 9 to 192-bit buffer pointers which contain a
128-bit descriptor, a 32-bit offset and a 32-bit index. Essentially,
they are fat buffer pointers with an additional 32-bit index.
2023-12-15 15:49:25 +01:00
Matt Arsenault
3c86bc0ae9 AMDGPU: Add more tests for rootn libcall handling 2023-12-02 21:53:31 +07:00