176341 Commits

Author SHA1 Message Date
Tim Northover
6bf04e4512 SCCP: update for cmpxchg returning { iN, i1 } now.
I accidentally missed this one since its use looked OK locally.

llvm-svn: 210909
2014-06-13 14:54:09 +00:00
Zoran Jovanovic
a5acdcf924 [mips][mips64r6] Relocation R_MIPS_PC18_S3
Differential Revision: http://reviews.llvm.org/D3890

llvm-svn: 210908
2014-06-13 14:26:47 +00:00
Tim Northover
b49b04bbe0 IR-change: cmpxchg operations now return { iN, i1 }.
This is a minimal fix for clang. I'll soon add support for generating
weak variants when requested, but that's not really necessary for the
LLVM change in isolation.

llvm-svn: 210907
2014-06-13 14:24:59 +00:00
Tim Northover
d7756c5a68 Tests: use CHECK-LABEL to help debugging failures
llvm-svn: 210906
2014-06-13 14:24:48 +00:00
Tim Northover
675a0965ed Docs: remove extra {} around result types.
It makes the types look like they're single-element structures. And
when we have instructions that *do* result in a struct, that can get
confusing rather quickly.

llvm-svn: 210905
2014-06-13 14:24:23 +00:00
Tim Northover
1dcc9f90ed Docs: fix grammar error in description
llvm-svn: 210904
2014-06-13 14:24:16 +00:00
Tim Northover
420a216817 IR: add "cmpxchg weak" variant to support permitted failure.
This commit adds a weak variant of the cmpxchg operation, as described
in C++11. A cmpxchg instruction with this modifier is permitted to
fail to store, even if the comparison indicated it should.

As a result, cmpxchg instructions must return a flag indicating
success in addition to their original iN value loaded. Thus, for
uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The
second flag is 1 when the store succeeded.

At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been
added as the natural representation for the new cmpxchg instructions.
It is a strong cmpxchg.

By default this gets Expanded to the existing ATOMIC_CMP_SWAP during
Legalization, so existing backends should see no change in behaviour.
If they wish to deal with the enhanced node instead, they can call
setOperationAction on it. Beware: as a node with 2 results, it cannot
be selected from TableGen.

Currently, no use is made of the extra information provided in this
patch. Test updates are almost entirely adapting the input IR to the
new scheme.

Summary for out of tree users:
------------------------------

+ Legacy Bitcode files are upgraded during read.
+ Legacy assembly IR files will be invalid.
+ Front-ends must adapt to different type for "cmpxchg".
+ Backends should be unaffected by default.

llvm-svn: 210903
2014-06-13 14:24:07 +00:00
Samuel Benzaquen
3ca0a7b404 Do not store duplicate parents when memoization data is available.
Summary:
Do not store duplicate parents when memoization data is available.
This does not solve the duplication problem, but ameliorates it.

Reviewers: klimek

Subscribers: klimek, cfe-commits

Differential Revision: http://reviews.llvm.org/D4124

llvm-svn: 210902
2014-06-13 13:31:40 +00:00
Cameron McInally
ed5f645bf3 Fix bad copy-and-paste from r210652. AVX512 masked leading zero intrinsics.
llvm-svn: 210901
2014-06-13 13:20:01 +00:00
Daniel Sanders
c171f65a87 [mips] Add cache and pref instructions
Summary:
cache and pref were added in MIPS-III, and MIPS32 but were re-encoded in
MIPS32r6/MIPS64r6 to use a 9-bit offset rather than the 16-bit offset
available to earlier cores.

Resolved the decoding conflict between pref and lwc3.

Depends on D4115

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4116

llvm-svn: 210900
2014-06-13 13:15:59 +00:00
Daniel Sanders
af8b32e176 [mips][mips64r6] bc1any[24] are not available on MIPS32r6/MIPS64r6
Summary:
These MIPS-3D instructions have never been implemented in LLVM so we only
add testcases.

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4115

llvm-svn: 210899
2014-06-13 13:08:38 +00:00
Daniel Sanders
86cb398b9d [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal is a normal instruction
Summary:
b(ge|lt)zal have been removed in MIPS32r6/MIPS64r6. However, bal (an alias
for 'bgezal $zero, $offset') still remains with the same encoding it had
prior to MIPS32r6/MIPS64r6.

Updated the MipsNaCLELFStreamer, and MipsLongBranch to correctly handle the
MIPS32r6/MIPS64r6 BAL instruction in addition to the existing BAL_BR pseudo.

No changes were required to the CodeGen test that looks for BAL
(test/CodeGen/Mips/longbranch.ll) since the new instruction has the same
syntax.

Depends on D4113

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4114

llvm-svn: 210898
2014-06-13 13:02:52 +00:00
Daniel Sanders
e898236bc2 [mips][mips64r6] daddi is not available on MIPS64r6
Summary:
It's not emitted by the code generator so we only need assembler tests.

Also added missing daddi aliases from dsub mnemonics, and removed a couple
duplicate dsub tests.

Depends on D4112

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4113

llvm-svn: 210897
2014-06-13 12:49:06 +00:00
Jeroen Ketema
e2a0f050d8 Add files forgotten in the previous commit
llvm-svn: 210896
2014-06-13 12:33:40 +00:00
NAKAMURA Takumi
a2e405cb35 [Win32] Let utils/not aware of abort(), aka llvm_unreachable(), in msvcrt.
It has exit code as 3. abort(), aka unreachable, may be handled as crash.

FIXME: Could we move this into Win32/Program.inc?
llvm-svn: 210895
2014-06-13 12:23:56 +00:00
NAKAMURA Takumi
b8ed66de4d llvm/test/CodeGen/X86/fast-isel-args-fail2.ll: Don't expect to fail with -Asserts. It might or might not crash.
llvm-svn: 210894
2014-06-13 12:05:06 +00:00
Simon Atanasyan
f0f8207995 [Mips] Make exe-fileheader.test test case independent from external input files.
llvm-svn: 210893
2014-06-13 11:44:23 +00:00
Cameron McInally
c43c8f9458 Add HasCDI predicate to AVX512 VPBROADCASTM*.
llvm-svn: 210892
2014-06-13 11:40:31 +00:00
Jeroen Ketema
82aaa41286 Implementations for exp(float) and exp(double) v2
Use separate implementations instead of a macro
to ensure the constant multiplied with is of
higher precision.

v2: Use the correct formula, spotted by Dan Liew <daniel.liew@imperial.ac.uk>

Reviewed-by: Aaron Warty <awatry@gmail.com>
Reviewed-by: Tom Stellard <tom@stellard.net>
llvm-svn: 210891
2014-06-13 09:40:09 +00:00
Tim Northover
24fe2322a2 CPP backend: set volatile property on atomic instructions.
llvm-svn: 210890
2014-06-13 09:14:50 +00:00
Oliver Stannard
b5e596f7c3 ARM: Fix fastcc calling convention for Thumb1
When targetting Thumb1 on a processor which has a VFP unit (which
is not accessible from Thumb1), we were converting the fastcc calling
convention to AAPCS-VFP, which is not possible.

llvm-svn: 210889
2014-06-13 08:33:03 +00:00
Matt Arsenault
c02eea7f64 R600: Don't call setOperationAction with things that aren't opcodes.
CondCode actions are set with setCondCodeAction.
This should have been a harmless bug since the values seem to only
collide only with nodes that don't need to be handled, and these are
already correctly setup elsewhere.

llvm-svn: 210888
2014-06-13 07:44:38 +00:00
Daniel Jasper
5217a8b84f clang-format: [JS] Understand named function literals.
Before:
  return {a: function SomeFunction(){// ...
                                     return 1;
  }
  }
  ;

After:
  return {
    a: function SomeFunction() {
      // ...
      return 1;
    }
  };

llvm-svn: 210887
2014-06-13 07:02:04 +00:00
David Majnemer
5ef4fe7d8e MS ABI: Fix inheritance model calculation in CRTP
CRTP-like patterns involve a class which inherits from another class
using itself as a template parameter.

However, the base class itself may try to create a pointer-to-member
which involves the derived class.  This is problematic because we
may not have finished parsing the most derived classes' base specifiers
yet.

It turns out that MSVC simply uses the unspecified inheritance model
instead of doing anything fancy.

This fixes PR19987.

llvm-svn: 210886
2014-06-13 06:43:46 +00:00
Matt Arsenault
825fb0b094 R600/SI: Fix selection error on i64 rotl / rotr.
Evergreen is still broken due to missing shl_parts.

llvm-svn: 210885
2014-06-13 04:00:30 +00:00
Brad Smith
6d1dfdc011 Missed a space at the end of the line.
llvm-svn: 210884
2014-06-13 03:53:07 +00:00
Brad Smith
378e7f9b78 Use dwarf-2 by default on OpenBSD and FreeBSD.
The Tools.cpp part of the patch partially based on a patch from
FreeBSD's LLVM tree.

llvm-svn: 210883
2014-06-13 03:35:37 +00:00
Saleem Abdulrasool
6ae82a66ac Interpreter: kill some dead code
Remove commented out code and an unnecessary associated scope.  No functional
change.

llvm-svn: 210882
2014-06-13 03:30:47 +00:00
Saleem Abdulrasool
e014729d34 Interpreter: explicitly initialize base class
Initialise base class std::enable_shared_from_this explicitly.  Identified by
GCC.

llvm-svn: 210881
2014-06-13 03:30:45 +00:00
Saleem Abdulrasool
e8e4ae9f78 Core: address comparison of signed and unsigned types
Add a cast to ensure that the comparison is done with the same sign type.
Identified by GCC.

llvm-svn: 210880
2014-06-13 03:30:42 +00:00
Saleem Abdulrasool
3924d754e5 Remove unused variables
Address the 'variable set but not used' warning from GCC.  In some cases a few
additional calls were removed where there should be no visible side effects of
the calls (i.e. should not effect any cached state).

llvm-svn: 210879
2014-06-13 03:30:39 +00:00
Rafael Espindola
2cef13cf71 Remove a 'using std::error_code' I missed in the previous pass.
llvm-svn: 210878
2014-06-13 03:24:40 +00:00
Rafael Espindola
c049c6574b Remove the last uses of 'using std::error_code'
This finishes the transition to std::error_code.

llvm-svn: 210877
2014-06-13 03:20:08 +00:00
Rafael Espindola
4453e42945 Remove 'using std::error_code' from tools.
llvm-svn: 210876
2014-06-13 03:07:50 +00:00
Jason Molenda
567b1546ac whitespace cleanup
llvm-svn: 210875
2014-06-13 02:44:21 +00:00
Jason Molenda
705b180964 Initial merge of some of the iOS 8 / Mac OS X Yosemite specific
lldb support.  I'll be doing more testing & cleanup but I wanted to
get the initial checkin done.

This adds a new SBExpressionOptions::SetLanguage API for selecting a
language of an expression.

I added adds a new SBThread::GetInfoItemByPathString for retriving
information about a thread from that thread's StructuredData.

I added a new StructuredData class for representing
key-value/array/dictionary information (e.g. JSON formatted data).
Helper functions to read JSON and create a StructuredData object,
and to print a StructuredData object in JSON format are included.

A few Cocoa / Cocoa Touch data formatters were updated by Enrico
to track changes in iOS 8 / Yosemite.

Before we query a thread's extended information, the system runtime may 
provide hints to the remote debug stub that it will use to retrieve values
out of runtime structures.  I added a new SystemRuntime method 
AddThreadExtendedInfoPacketHints which allows the SystemRuntime to add 
key-value type data to the initial request that we send to the remote stub.

The thread-format formatter string can now retrieve values out of a thread's
extended info structured data.  The default thread-format string picks up
two of these - thread.info.activity.name and thread.info.trace_messages.

I added a new "jThreadExtendedInfo" packet in debugserver; I will
add documentation to the lldb-gdb-remote.txt doc soon.  It accepts
JSON formatted arguments (most importantly, "thread":threadnum) and
it returns a variety of information regarding the thread to lldb
in JSON format.  This JSON return is scanned into a StructuredData
object that is associated with the thread; UI layers can query the
thread's StructuredData to see if key-values are present, and if
so, show them to the user.  These key-values are likely to be
specific to different targets with some commonality among many
targets.  For instance, many targets will be able to advertise the
pthread_t value for a thread.

I added an initial rough cut of "thread info" command which will print
the information about a thread from the jThreadExtendedInfo result.
I need to do more work to make this format reasonably.

Han Ming added calls into the pmenergy and pmsample libraries if
debugserver is run on Mac OS X Yosemite to get information about the
inferior's power use.

I added support to debugserver for gathering the Genealogy information
about threads, if it exists, and returning it in the jThreadExtendedInfo
JSON result.

llvm-svn: 210874
2014-06-13 02:37:02 +00:00
Rafael Espindola
b4ad29be92 Fix build on windows.
llvm-svn: 210873
2014-06-13 02:36:09 +00:00
Richard Smith
71b09acb73 Extend AST dump to include 'used' and 'referenced' flags, and put 'invalid' flag in the right place.
llvm-svn: 210872
2014-06-13 02:24:47 +00:00
Rafael Espindola
db4ed0bdab Remove 'using std::errro_code' from lib.
llvm-svn: 210871
2014-06-13 02:24:39 +00:00
Juergen Ributzka
3453bcf64d [FastISel][X86] Add support for cvttss2si/cvttsd2si intrinsics.
This adds support for the cvttss2si/cvttsd2si intrinsics. Preceding
insertelement instructions are folded into the conversion instruction (if
possible).

llvm-svn: 210870
2014-06-13 02:21:58 +00:00
Tom Stellard
2e59a45f80 R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget
llvm-svn: 210869
2014-06-13 01:32:00 +00:00
Tom Stellard
d881e9195a R600: Drop use of cached TargetMachine in R600InstrInfo.cpp
llvm-svn: 210868
2014-06-13 01:31:56 +00:00
Tom Stellard
0ab103422d prepare-builtins: Use std:: prefix for error_code
This fixes the build with with newer LLVM.

llvm-svn: 210867
2014-06-13 01:30:14 +00:00
Rafael Espindola
bff5d0d16a Remove all uses of 'using std::error_code' from headers.
llvm-svn: 210866
2014-06-13 01:25:41 +00:00
Tom Stellard
bfd480d79f R600: Drop use of cached TargetMachine in AMDGPUInstrInfo.cpp
llvm-svn: 210865
2014-06-13 01:02:57 +00:00
Greg Clayton
a2715cf108 Added the ability to save core files:
(lldb) file /bin/ls
(lldb) b malloc
(lldb) run
(lldb) process save-core /tmp/ls.core

Each ObjectFile plug-in now has the option to save core files by registering a new static callback.

llvm-svn: 210864
2014-06-13 00:54:12 +00:00
Juergen Ributzka
454d374e37 [FastISel][X86] - Add branch weights
Add branch weights to branch instructions, so that the following passes can
optimize based on it (i.e. basic block ordering).

llvm-svn: 210863
2014-06-13 00:45:11 +00:00
Eric Christopher
030294e4c5 Move ARMSelectionDAGInfo from the TargetMachine to the subtarget.
llvm-svn: 210862
2014-06-13 00:20:39 +00:00
Eric Christopher
a47f6804d2 Move to a private function to initialize subtarget dependencies
so we can use initializer lists for the ARMSubtarget and then
use this to initialize a moved DataLayout on the subtarget from
the TargetMachine.

llvm-svn: 210861
2014-06-13 00:20:35 +00:00
Alexey Samsonov
0670cfaf01 [DWARF parser] Fix broken address ranges construction.
Previous algorithm for constructing [Address ranges]->[Compile Units]
mapping was wrong. It somewhat relied on the assumption that address ranges
for different compile units may not overlap. It is not so.
For example, two compile units may contain the definition of the same
linkonce_odr function. These definitions will be merged at link-time,
resulting in equivalent .debug_ranges entries for both these units

Instead of sorting and merging original address ranges (from .debug_ranges
and .debug_aranges), implement a different approach: save endpoints
of all ranges, and then use a sweep-line approach to construct
the desired mapping. If we find that certain address maps to
several compilation units, we just pick any of them.

llvm-svn: 210860
2014-06-12 23:58:49 +00:00