18278 Commits

Author SHA1 Message Date
Denis Antrushin
d1fd791e72 [TwoAddressInstruction] Handle pointer compare sunk past statepoint.
CodeGenPrepare pass can sink pointer comparison across statepoint
to the point of use (see comment in IR/SafepointIRVerifier.cpp)
Due to specifics of statepoints, it is still legal to have tied
def and use rewritten to the same register in TwoAddress pass.
However, properly updating LiveIntervals and LiveVariables becomes
complicated. For simplicity, let's fall back to generic handling of
tied registers when we detect such case.
TODO: This fixes functional (assertion) failure. Ideally we should
try to recompute new live range/liveness in place.

Reviewed By: skatkov

Differential Revision: https://reviews.llvm.org/D132255
2022-08-23 12:34:11 +03:00
Denis Antrushin
45e80d9801 Reapply "[NFC] Precommit test for D132255".
Changed check line to accomodate assertion text difference on
mac and windows; added 'REQUIRES: asserts' line.

This reverts commit 89aaae57eacf77a6902ef8d4af5c92a3d6c642c2.
2022-08-22 21:41:11 +07:00
Simon Pilgrim
fa96383506 [X86] Fold PMULUDQ(X,1) -> AND(X,(1<<32)-1) 'getZeroExtendInReg'
Fix cases where shl/srem/urem expansion results in a mulh/mul_lohi(x,1) 'pass through' that gets lowered to pmuludq.

Fixes #56684
2022-08-20 14:58:25 +01:00
Simon Pilgrim
8faf515a36 [X86] Add vector test coverage of 'one-bit-diff' and/or icmp ne/eq patterns 2022-08-20 14:13:44 +01:00
Nico Weber
89aaae57ea Revert "[NFC] Precommit test for D132255."
This reverts commit 01e3a376955864be6c20fe1134107eb4aa5f2e9c.
Breaks tests on mac and win, see comments on https://reviews.llvm.org/D132255
2022-08-19 17:53:36 -04:00
Denis Antrushin
01e3a37695 [NFC] Precommit test for D132255. 2022-08-20 01:36:05 +07:00
Matthias Braun
19ce5e515f RAGreedyStats: Ignore identity COPYs; count COPYs from/to physregs
Improve copy statistics:

- Count copies from or to physical registers: They are used to model function parameters and calling conventions and the register allocator optimizes for them.
- Check physical registers assigned to virtual registers and stop counting "identity" `COPY`s where source and destination is the same physical registers; they will be removed in the `virtregmap` pass anyway.

Differential Revision: https://reviews.llvm.org/D131932
2022-08-17 12:53:29 -07:00
Archit Saxena
e170d955fe Split EH code by default
The current machine function splitter is reliant on profile data to do profile summary analysis to split blocks into cold section. This may sometimes limit the usage of machine function splitter especially in cases where we could do some form of static analysis to split out cold blocks if profile data is absent or profile data which may be faulty (Consider Sample PGO).

Of all code that could statically be marked cold Exception handling blocks are one of them (In fact BFI framework also tends to mark them as cold), and the most in size contribution. In my experiments I found out Exception handling pads and all code reachable from there account for up to 6-8% of the .text section on modern production binaries. This patch introduces a flag to split out all Exception handling blocks and blocks only reachable from Exceptional Handling pad to cold section. This flag has shown to give a performance win of up to 0.1% in terms of average cycles and instructions executed on internal facebook search service.

Reviewed By: snehasish

Differential Revision: https://reviews.llvm.org/D131824
2022-08-17 12:40:31 -07:00
Nick Desaulniers
6b0e2fa6f0 [SelectionDAG] make INLINEASM_BR use MachineBasicBlocks instead of BlockAddresses
As part of re-architecting callbr to no longer use blockaddresses
(https://reviews.llvm.org/D129288), we don't really need them in MIR.
They make comparing MachineBasicBlocks of indirect targets during
MachineVerifier a PITA.

Suggested by @efriedma from the discussion:
https://reviews.llvm.org/D130290#3669531

Reviewed By: efriedma, void

Differential Revision: https://reviews.llvm.org/D130316
2022-08-17 09:34:31 -07:00
Sotiris Apostolakis
848e9e454f [SelectOpti] Remove test on loop-level analysis
Remove a test that relied on the underlying instruction latency modeling.
Such dependency blocks efforts such as D79483 to improve this cost modeling.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D132029
2022-08-17 16:13:33 +00:00
Eli Friedman
cfd2c5ce58 Untangle the mess which is MachineBasicBlock::hasAddressTaken().
There are two different senses in which a block can be "address-taken".
There can be a BlockAddress involved, which means we need to map the
IR-level value to some specific block of machine code.  Or there can be
constructs inside a function which involve using the address of a basic
block to implement certain kinds of control flow.

Mixing these together causes a problem: if target-specific passes are
marking random blocks "address-taken", if we have a BlockAddress, we
can't actually tell which MachineBasicBlock corresponds to the
BlockAddress.

So split this into two separate bits: one for BlockAddress, and one for
the machine-specific bits.

Discovered while trying to sort out related stuff on D102817.

Differential Revision: https://reviews.llvm.org/D124697
2022-08-16 16:15:44 -07:00
Alexander Shaposhnikov
d68ba43ad2 [Intrinsics] Add initial support for NonNull attribute
Add initial support for NonNull attribute.
(https://github.com/llvm/llvm-project/issues/57113)

Test plan:

verify that for
__thread int x;
int main() {

int* y = &x;
return *y;
}
(with this patch) clang -O -fsanitize=null -S -emit-llvm -o -
doesn't emit a null-pointer check

Differential revision: https://reviews.llvm.org/D131872
2022-08-16 21:28:23 +00:00
Arthur Eubanks
9181ce623f [Windows] Put init_seg(compiler/lib) in llvm.global_ctors
Currently we treat initializers with init_seg(compiler/lib) as similar
to any other init_seg, they simply have a global variable in the proper
section (".CRT$XCC" for compiler/".CRT$XCL" for lib) and are added to
llvm.used. However, this doesn't match with how LLVM sees normal (or
init_seg(user)) initializers via llvm.global_ctors. This
causes issues like incorrect init_seg(compiler) vs init_seg(user)
ordering due to GlobalOpt evaluating constructors, and the
ability to remove init_seg(compiler/lib) initializers at all.

Currently we use 'A' for priorities less than 200. Use 200 for
init_seg(compiler) (".CRT$XCC") and 400 for init_seg(lib) (".CRT$XCL"),
which do not append the priority to the section name. Priorities
between 200 and 400 use ".CRT$XCC${Priority}". This allows for
some wiggle room for people/future extensions that want to add
initializers between compiler and lib.

Fixes #56922

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D131910
2022-08-16 08:16:18 -07:00
Bing1 Yu
807b8cb06c [X86] Fix a lowering issue of mask.compress which has undef float passthrough
Previously, LegaizeDAG didn't check mask.compress's passthrough might be float, and this lead to getConstant crash since it doesn't support fp

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D131947
2022-08-16 17:54:45 +08:00
Rahman Lavaee
df2213f345 [EHStreamer] Omit @LPStart when function has no landing pads
When no landing pads exist for a function, `@LPStart` is undefined and must be omitted.

EH table is generally not emitted for functions without landing pads, except when the personality function is uknown (`!isNoOpWithoutInvoke(classifyEHPersonality(Per))`). In that case, we must omit `@LPStart` even when machine function splitting is enabled.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D131626
2022-08-15 17:09:46 -07:00
Simon Pilgrim
a7b85e4c0c [X86] Freeze shl(x,1) -> add(x,x) vector fold (PR50468)
Vector fold shl(x,1) -> add(freeze(x),freeze(x)) to avoid the undef issues identified in PR50468

Differential Revision: https://reviews.llvm.org/D106675
2022-08-15 16:17:21 +01:00
Simon Pilgrim
41bdb8cd36 [X86] Fold insert_vector_elt(undef, elt, 0) --> scalar_to_vector(elt)
I had hoped to make this a generic fold in DAGCombine, but there's quite a few regressions in Thumb2 MVE that need addressing first.

Fixes regressions from D106675.
2022-08-15 14:56:30 +01:00
Craig Topper
b8c5420d74 [X86][RISCV] Pre-commit tests for D130862. NFC
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D131442
2022-08-14 16:31:15 -07:00
Simon Pilgrim
8b47e29fa0 [X86] combineVectorShiftImm - fold (shl (add X, X), C) -> (shl X, (C + 1))
Noticed while investigating the regressions in D106675
2022-08-14 17:42:02 +01:00
Simon Pilgrim
b3452c95c6 [X86] Add test coverage for lshr/ashr with freeze 2022-08-14 15:29:59 +01:00
Simon Pilgrim
e2d13fd096 [DAG] canCreateUndefOrPoison - add freeze(shl(x,y)) -> shl(freeze(x),y) support
These are guaranteed not to create undef/poison if the shift amount is known to be in range
2022-08-14 14:38:10 +01:00
Simon Pilgrim
3dba35b62b [X86] Add test coverage for shl nsw with freeze 2022-08-14 13:42:35 +01:00
Simon Pilgrim
ed0074bd86 [X86] freeze-binary.ll - tweak freeze_mul_nsw test to avoid mul by pow-2
Enabling freeze(shl()) -> shl(freeze()) was affecting this test
2022-08-14 13:35:56 +01:00
Simon Pilgrim
59d0e0d92a [X86] Add test coverage for shl with freeze 2022-08-14 13:32:58 +01:00
Simon Pilgrim
a621d38bcb [DAG] canCreateUndefOrPoison - add freeze(and/or/xor(x,y)) -> and/or/xor(freeze(x),y) support
These are guaranteed not to create undef/poison
2022-08-14 13:14:53 +01:00
Simon Pilgrim
0f7ecba96a [X86] Add test coverage for and/or/xor with freeze 2022-08-14 13:14:53 +01:00
Phoebe Wang
8b69549dc5 [X86][FP16] Promote FP16->[U]INT to FP16->FP32->[U]INT
This is to avoid f16->i64 being lowered to `__fixhfdi/__fixunshfdi` on 32-bits since neither libgcc nor compiler-rt provide them. https://godbolt.org/z/cjWEsea5v

It also helps to improve the performance by promoting the vector type.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D131828
2022-08-14 09:37:33 +08:00
Simon Pilgrim
60534b8879 [DAG] canCreateUndefOrPoison - add freeze(add/sub/mul(x,y)) -> add/sub/mul(freeze(x),y,z) support
These are guaranteed not to create undef/poison as long as there are no poison generating flags
2022-08-13 20:58:00 +01:00
Simon Pilgrim
998853689a [X86] Add test coverage for add/sub/mul with freeze 2022-08-13 20:57:59 +01:00
James Y Knight
4d7f9b7489 X86: Don't fold TEST into ADD ...@GOTTPOFF/GOTNTPOFF/INDNTPOFF
The linker may convert such an ADD into a LEA, so we must not
use the EFLAGS output.

This causes miscompiles with -fsanitize=null after
bacdf80f42b46044262e97e98398d1bd0b75900d added
llvm.threadlocal.address -- previously, global variables were known to
be non-null, but the intrinsic is not currently known to return
nonnull. (That should be corrected, but it shouldn't've caused
miscompiles!)

Differential Revision: https://reviews.llvm.org/D131716
2022-08-12 20:52:00 +00:00
Filipp Zhinkin
1626ee6a95 [DAGCombine] Hoist shifts out of a logic operations tree.
Hoist and combine shift operations from logic operations tree:
logic (logic (SH x0, s), y), (logic (SH x1, s), z)  --> logic (SH (logic x0, x1), s), (logic y, z)

The transformation improves code generated for some cases related to the issue https://github.com/llvm/llvm-project/issues/49541.

Correctness:
https://alive2.llvm.org/ce/z/pVqVgY
https://alive2.llvm.org/ce/z/YVvT-q
https://alive2.llvm.org/ce/z/W5zTBq
https://alive2.llvm.org/ce/z/YfJsvJ
https://alive2.llvm.org/ce/z/3YSyDM
https://alive2.llvm.org/ce/z/Bs2kzk
https://alive2.llvm.org/ce/z/EoQpzU
https://alive2.llvm.org/ce/z/Jnc_5H
https://alive2.llvm.org/ce/z/_LP6k_
https://alive2.llvm.org/ce/z/KvZNC9

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D131189
2022-08-12 12:42:16 +03:00
Simon Pilgrim
6ba5fc2dee [X86] lowerShuffleWithVPMOV - support direct lowering to VPMOV on VLX targets
lowerShuffleWithVPMOV currently only matches shuffle(truncate(x)) patterns, but on VLX targets the truncate isn't usually necessary to make the VPMOV node worthwhile (as we're only targetting v16i8/v8i16 shuffles we're almost always ending up with a PSHUFB node instead). PACKSS/PACKUS are still preferred vs VPMOV due to their lower uop count.

Fixes the remaining regression from the fixes in rG293899c64b75
2022-08-11 17:40:07 +01:00
Simon Pilgrim
d4a4864c45 [X86] vector-rotate-128/265.ll - add VLX + NOVLX check prefixes to reduce CHECK duplication 2022-08-11 17:11:37 +01:00
Martin Storsjö
c5b3de6745 [COFF] Emit embedded -exclude-symbols: directives for hidden visibility for MinGW
This works with the automatic export of all symbols; in MinGW mode,
when a DLL has no explicit dllexports, it exports all symbols (except
for some that are hardcoded to be excluded, including some toolchain
libraries).

By hooking up the hidden visibility to the -exclude-symbols: directive,
the automatic export of all symbols can be controlled in an easier
way (with a mechanism that doesn't require strict annotation of every
single symbol, but which allows gradually marking more unnecessary
symbols as hidden).

The primary use case is dylib builds of LLVM/Clang. These can be done
in MinGW mode but not in MSVC mode, as MinGW builds can export all
symbols (and the calling code can use APIs without corresponding
dllimport directives). However, as all symbols are exported, it can
easily overflow the max number of exported symbols in a DLL (65536).

In the llvm-mingw distribution, only the X86, ARM and AArch64 backends
are enabled; for the LLVM 13.0.0 release, libLLVM-13.dll ended up with
58112 exported symbols. For LLVM 14.0.0, it was 62015 symbols. Current
builds of the 15.x branch end up at around 64650 symbols - i.e. extremely
close to the limit.

The msys2 packages of LLVM have had to progressively disable more
of their backends in their builds, to be able to keep building with a
dylib.

This allows improving the current mingw dylib situation significantly,
by using the same hidden visibility options and attributes as on Unix.
With those in place, a current build of LLVM git main ends up at 35142
symbols instead of 64650.

For code using hidden visibility, this now requires linking with either
a current git lld or ld.bfd. (Older lld error out on the unknown
directives, older ld.bfd will successfully link, but will print huge
amounts of warnings.)

Differential Revision: https://reviews.llvm.org/D130121
2022-08-11 12:00:08 +03:00
aqjune
02e56e2533 [CodeGen] Generate efficient assembly for freeze(poison) version of mm*_cast* intel intrinsics
This patch makes the variants of `mm*_cast*` intel intrinsics that use `shufflevector(freeze(poison), ..)` emit efficient assembly.
(These intrinsics are planned to use `shufflevector(freeze(poison), ..)` after shufflevector's semantics update; relevant thread: D103874)

To do so, this patch

1. Updates `LowerAVXCONCAT_VECTORS` in X86ISelLowering.cpp to recognize `FREEZE(UNDEF)` operand of `CONCAT_VECTOR` in addition to `UNDEF`
2. Updates X86InstrVecCompiler.td to recognize `insert_subvector` of `FREEZE(UNDEF)` vector as its first operand.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D130339
2022-08-11 13:36:21 +09:00
Amaury Séchet
9bceb8981d [X86] (0 - SetCC) | C -> (zext (not SetCC)) * (C + 1) - 1 if we can get a LEA out of it.
This adresses various regression in D131260 , as well as is a useful optimization in itself.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D131358
2022-08-10 15:12:00 +00:00
Edd Barrett
fa250250b2
Migrate llvm.experimental.patchpoint() to ptr.
This intrinsic used a typed pointer for a call target operand. This
change updates the operand to be an opaque pointer and updates all
pointers in all test files that use the intrinsic.

Differential revision: https://reviews.llvm.org/D131261
2022-08-10 13:18:02 +01:00
Simon Pilgrim
bbc27d0148 [DAG] canCreateUndefOrPoison - add freeze(truncate(x)) -> truncate(freeze(x)) support 2022-08-10 11:27:22 +01:00
Phoebe Wang
c7ec6e19d5 [X86][BF16] Make backend type bf16 to follow the psABI
X86 psABI has updated to support __bf16 type, the ABI of which is the
same as FP16. See https://discourse.llvm.org/t/patch-add-optional-bfloat16-support/63149

This is an alternative of D129858, which has less code modification and
supports the vector type as well.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D130832
2022-08-10 08:58:56 +08:00
Filipp Zhinkin
ea323a4bd5 [X86][ARM] Update tests for bitwise logic trees of shifts; NFC
Baseline tests for D131189.
2022-08-09 20:57:14 +03:00
Simon Pilgrim
8c2668032c [X86] Remove unnecessary _mm_undefined_pd() test from avx-intrinsics-fast-isel.ll
This is already in sse2-intrinsics-fast-isel.ll

Noticed in D104790
2022-08-09 18:11:56 +01:00
Simon Pilgrim
d79e7dc939 [DAG] SimplifyDemandedVectorElts - and/mul(x,y) - if a demanded element of y is known zero then we don't need to demand it in x
This fixes most of the remaining regressions from the fixes in rG293899c64b75
2022-08-09 16:24:08 +01:00
Simon Pilgrim
1eaa4de843 [X86] Regenerate statepoint-vreg.ll
Noticed on D131260
2022-08-09 14:43:09 +01:00
Simon Pilgrim
2724143551 [DAG] canCreateUndefOrPoison - add freeze(ctpop(x)) -> ctpop(freeze(x)) and freeze(parity(x)) -> parity(freeze(x)) support
Both are guaranteed not to create undef/poison
2022-08-09 10:10:29 +01:00
Amaury Séchet
2264f7ef27 [X86] Add 64bits test cases for D131358 2022-08-08 23:12:49 +00:00
Filipp Zhinkin
6c52f82d77 [X86][ARM] Add tests for bitwise logic trees of shifts; NFC
Baseline tests for D131189.
2022-08-08 21:09:14 +03:00
Simon Pilgrim
1b349bdaaa [X86] Add test coverage for ctpop/parity with freeze
These are safe to fold from freeze(unaryop(x)) -> unaryop(freeze(x))
2022-08-08 18:25:01 +01:00
Simon Pilgrim
6f2bee667a [DAG] canCreateUndefOrPoison - add freeze(bswap(x)) -> bswap(freeze(x)) and freeze(bitreverse(x)) -> bitreverse(freeze(x)) support
Both are guaranteed not to create undef/poison
2022-08-08 17:27:17 +01:00
Simon Pilgrim
e4b2c52420 [DAG] canCreateUndefOrPoison - add freeze(sext(x)) -> sext(freeze(x)) and freeze(zext(x)) -> zext(freeze(x)) support
Both are guaranteed not to create undef/poison
2022-08-08 16:43:40 +01:00
Simon Pilgrim
2d20fb00b3 [X86] Add test coverage for sext/zext/bswap/bitreverse with freeze
All of these are safe to fold from freeze(unaryop(x)) -> unaryop(freeze(x))
2022-08-08 15:44:00 +01:00