537977 Commits

Author SHA1 Message Date
Kazu Hirata
91a7085faf
[lld] Use llvm::stable_sort (NFC) (#140488) 2025-05-19 06:20:00 -07:00
Kazu Hirata
325281631a
[clang] Use *Map::try_emplace (NFC) (#140477)
We can simplify the code with *Map::try_emplace where we need
default-constructed values while avoding calling constructors when
keys are already present.
2025-05-19 06:19:53 -07:00
Kazu Hirata
2a277f9ff1
[clang] Use llvm::is_sorted (NFC) (#140468) 2025-05-19 06:18:53 -07:00
Kazu Hirata
52ca511f64
[mlir] Use llvm::is_contained (NFC) (#140467) 2025-05-19 06:18:46 -07:00
Kazu Hirata
25da043c55
[lldb] Use llvm::is_contained (NFC) (#140466) 2025-05-19 06:18:37 -07:00
Christian Sigg
c56e7f22f0
[mlir][arith] Canonicalize sitofp(truncf) -> sitofp, and uitofp. (#139925)
Add a canonicalization patterns that simplifies `truncf(sitofp(x))` to
`sitofp(x)` and `truncf(uitofp(x))` to `uitofp(x)`, if truncf has default rounding mode.

This assumes that the destination type of truncf is representable by the
intermediate type.

Note that the truncf semantics requires that the destination type is
narrower than the source type, so this is true for all types I can
possibly think of, but one could probably construct an artificial
counter example.

Somewhat related: https://github.com/llvm/llvm-project/pull/128096
2025-05-19 15:07:30 +02:00
Bart Chrzaszcz
6d8a52146c
[mlir] Fix bazel build after c798e19. (#140537)
`@llvm-project//mlir:LLVMDialect` builds fine without the header. Don't
think it was needed.
2025-05-19 13:46:34 +01:00
Pengcheng Wang
992458d26b
[RISCV][NFC] Fix the mismatch in comment (#140511)
There should be only one `vector_in`.

And we remove the surrounding double quotes.
2025-05-19 20:28:54 +08:00
Simon Pilgrim
52e1995eca [X86] Add tests showing failure to combine AVX512 shuffles to match "cross lane" SHLDQ/SRLDQ patterns using VALIGN
We match two input shuffles, but not if one input is zero
2025-05-19 13:27:57 +01:00
Sam Tebbs
70501ed2f0
[LoopVectorizer] Prune VFs based on plan register pressure (#132190)
This PR moves the register usage checking to after the plans are
created, so that any recipes that optimise register usage (such as
partial reductions) can be properly costed and not have their VF pruned
unnecessarily.

Depends on https://github.com/llvm/llvm-project/pull/137746
2025-05-19 13:27:17 +01:00
William
e8a307498d
[builtins][AArch32] Fix __gnu_* functions (#137638)
Move to a consistent calling convention for both Clang/GNU such that
they can be linked with each other.

All ARM targets now use the soft-float calling convention for
`__gnu_h2f_ieee` and `__gnu_f2h_ieee`, as described in
https://github.com/ARM-software/abi-aa/blob/main/rtabi32/rtabi32.rst#the-floating-point-helper-functions.
2025-05-19 13:09:12 +01:00
jeanPerier
416b7dfaa0
[flang] use DataLayout instead of GEP to compute element size (#140235)
Now that the datalayout is part of codegen, use that to generate type
size constants in codegen instead of generating GEP.
2025-05-19 13:59:09 +02:00
Liam Semeria
d067014f13
[APInt] Added APInt::clearBits() method (#137098)
Added APInt::clearBits(unsigned loBit, unsigned hiBit) that clears bits within a certain range.

Fixes #136550

---------

Co-authored-by: Simon Pilgrim <llvm-dev@redking.me.uk>
2025-05-19 12:41:04 +01:00
Timm Baeder
572add0601
[clang][bytecode] Diagnose failed constexpr assertions differently (#140000)
Adjust to the new way the ast walker is doing it.
2025-05-19 13:29:09 +02:00
Noam Zaks
d0ee35851b
Fix typo in IRDL docs (#140460)
Rename "can has" -> to "has".
And replace a "can have" with a "has" to make it explicit that something is required.
2025-05-19 12:11:52 +01:00
Ramkumar Ramachandra
61d3ad963c
[SCEVPatternMatch] Introduce m_scev_AffineAddRec (#140377)
Introduce m_scev_AffineAddRec to match affine AddRecs, a class_match for
SCEVConstant, and demonstrate their utility in LSR and SCEV. While at
it, rename m_Specific to m_scev_Specific for clarity.
2025-05-19 12:02:07 +01:00
Ming-Yi Lai
c28d6c2f5f
[Clang][RISCV] Add Zicfilp CFI unlabeled scheme preprocessor macros (#109600)
This patch adds preprocessor macros when Zicfilp CFI is enabled. To be
specific:

+ `#define __riscv_landing_pad 1` when `-fcf-protection=[full|branch]`
+ `#define __riscv_landing_pad_unlabeled 1` when
`-fcf-protection=[full|branch] -mcf-branch-label-scheme=unlabeled`

The macros are proposed in riscv-non-isa/riscv-c-api-doc#76 , and the
CLI flags are from riscv-non-isa/riscv-toolchain-conventions#54.
2025-05-19 18:39:31 +08:00
Fraser Cormack
c27e10fa65
[libclc] Mov erf & erfc to CLC library (#140524)
This completes the set of maths builtins.

No attempt to vectorize or optimize this code. The implementation is
licensed to SunPro so will probably need to be replaced at some point in
the future anyway. Calls to other builtins have been replaced with the
CLC equivalents, and some bit-hacking was replaced with the fabs
builtin.
2025-05-19 11:32:35 +01:00
Hubert Tong
cc51cbe278
[clang][Driver][test][NFC] Adjust test for targets with no cc1as (#140490)
Have the test accept use of the toolchain assembler instead of `-cc1as`
as some targets, such as AIX, do not use `-cc1as`.
2025-05-19 06:23:45 -04:00
Matt Arsenault
868e1fc1f9
IR: Remove redundant UseList check in addUse (#138676)
Not sure if this did anything for compile time or not.
2025-05-19 12:19:11 +02:00
Matt Arsenault
1ead4a8a85
IR: Reorder ConstantData enum values (#138638)
This sorts ConstantData to the low values, so we can perform
a hasUseList check in a single compare instead of requiring 2
compares plus an and for the range check.
2025-05-19 12:14:57 +02:00
Timm Baeder
bca39f4e8f
[clang][bytecode] Add a scope to function calls (#140441)
We need a place to destroy the temporaries created for call arguments.
2025-05-19 11:49:27 +02:00
Mel Chen
1b711b27d2
[VPlan] Clean up the function VPInstruction::generate for ComputeReductionResult, nfc (#140245)
When reducing unrolled parts, explicitly check for min/max reductions
using the function RecurrenceDescriptor::isMinMaxRecurrenceKind. Only if
the reduction is not min/max reduction, call
RecurrenceDescriptor::getOpcode() to handle other cases via CreateBinOp.

Based on https://github.com/llvm/llvm-project/pull/140242
Related to https://github.com/llvm/llvm-project/pull/118393
2025-05-19 17:31:23 +08:00
Timm Baeder
172c2817e5
[clang][bytecode] Use a SmallVector for EvalEmitter's locals (#140513)
The offset we return for them are just indices, so we can use a vector
here.
2025-05-19 11:19:35 +02:00
Nikolas Klauser
3a86e0bd29
[libc++] Optimize std::getline (#121346)
```
-----------------------------------------------
Benchmark                   old             new
-----------------------------------------------
BM_getline_string        318 ns         32.4 ns
```
2025-05-19 10:59:36 +02:00
Durgadoss R
2483831617
[MLIR][NVVM] Extend TMA Bulk Copy Op (#140232)
This patch extends the non-tensor TMA Bulk Copy Op 
(from shared_cta to global) with an optional
byte mask operand. This mask helps selectively
copy a particular byte to the destination.

* lit tests are added to verify the lowering to the intrinsics.

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2025-05-19 14:24:34 +05:30
Nikolas Klauser
b060022103 [libc++] Bump GCC_HEAD_VERSION to 16
We need to update or GCC version to be able to upgrade to GCC 15.
2025-05-19 10:50:18 +02:00
Momchil Velikov
38d2306b62
[MLIR] Minor fixes to FoldTransposeBroadcast rewrite (#140083)
This patch contains two minor changes, which I believe were the original
author's intent.

* when folding `transpose(broadcast(x))` emit `broadcast(x)` instead of
`broadcast(broadcast(x))`. The latter causes transient verifier
failures with `mlir-opt --debug` , e.g.
```
mlir-asm-printer: 'func.func' failed to verify and will be printed in generic form
"func.func"() <{function_type = (vector<4x1x1x7xi8>) -> vector<3x2x4x5x6x7xi8>, sym_name = "broadcast_transpose_mixed_example"}> ({
^bb0(%arg0: vector<4x1x1x7xi8>):
  %0 = "vector.broadcast"(%arg0) : (vector<4x1x1x7xi8>) -> vector<2x3x4x5x6x7xi8>
  %1 = "vector.broadcast"(%0) : (vector<2x3x4x5x6x7xi8>) -> vector<3x2x4x5x6x7xi8>
  "func.return"(%1) : (vector<3x2x4x5x6x7xi8>) -> ()
}) : () -> ()
```

* when checking permutation groups the variable `low` was set just once
to zero, thus checking was quadratic. It looks the intent was for `low`
to track the beginning of each dimension groups. (Nevertheless the check
was correct).
2025-05-19 09:45:41 +01:00
Owen Pan
5ddcd765db
[clang-format][NFC] Upgrade SortIncludes option to a struct (#140497)
This allows adding other suboptions e.g. IgnoreExtension in #137840.
2025-05-19 01:32:17 -07:00
Owen Pan
6da2acf8e9
[clang-format] Merge short inline function in macro definition body (#140366)
Fix #62356
2025-05-19 01:30:42 -07:00
Vlad Serebrennikov
8231182fed
[libclang/python][NFC] Document how null cursors are handled (#140499)
Now that we looked at this aspect closely and fixed things, I think we
can document this.
2025-05-19 12:30:22 +04:00
Owen Pan
0cac25bcf5
[clang-format] Fix the indent of StartOfName after AttributeMacro (#140361)
Fix #139510
2025-05-19 01:29:16 -07:00
Tom Eccles
dc0dcab397
[flang][OpenMP] Allow flush of common block (#139528)
I think this was denied by accident in
68180d8d16.

Flush of a common block is allowed by the standard on my reading. It is
not allowed by classic-flang but is supported by gfortran and ifx.

This doesn't need any lowering changes. The LLVM translation ignores the
flush argument list because the openmp runtime library doesn't support
flushing specific data.

Depends upon https://github.com/llvm/llvm-project/pull/139522. Ignore
the first commit in this PR.
2025-05-19 09:26:52 +01:00
Mel Chen
f594cd0936
[IVDescriptor][LV] Return Instruction::Or for IAnyOf/FAnyOf in getOpcode(), nfc (#140242) 2025-05-19 16:17:04 +08:00
Sven van Haastregt
071987959a
[SPIR-V] Clarify builtin default value handling; NFC (#139691)
- Use a bool in `generateGetQueryInst` and rename the variable to better
convey its purpose.
 - Replace mentions of 0 by `DefaultValue` in comments.
 - Fix typos.
2025-05-19 09:45:52 +02:00
Simon Pilgrim
23e8480536
[X86] IsElementEquivalent - add basic handling for X86ISD::SUBV_BROADCAST_LOAD (#139727)
If we're broadcasting a subvector, then the elements at equal positions within each subvector are the same.
2025-05-19 07:57:47 +01:00
Jim Lin
267e2406a7
[RISCV] Add reusable SelectCC_GPR_riirr multiclass. NFC (#140224)
Add reusable SelectCC_GPR_riirr multiclass. Allow Select_GPR_Using_CC_*
in XCV and Xqci to share a commom multiclass implmentation.
2025-05-19 14:22:24 +08:00
Adam Siemieniuk
c798e19540
[mlir][llvm][x86vector] One-to-one intrinsic op interface (#140055)
Adds an LLVMIR op interface that can used by external operations to
model LLVM intrinsics. Related 'op to llvm.call_intrinsic' rewriter
helper is moved into common LLVM conversion patterns. The x86vector
dialect is refactored to use the new common abstraction.

The one-to-one intrinsic op is tied to LLVM intrinsic call semantics.
Thus, the op interface, previously defined as a part of x86vector
dialect, is moved into the LLVMIR interfaces to allow other low-level
dialects to define operations abstracting specific intrinsic semantics
while minimizing infrastructure duplication.

Related RFC:
https://discourse.llvm.org/t/rfc-simplify-x86-intrinsic-generation/85581/6
2025-05-19 07:42:25 +02:00
Fangrui Song
6e857b49cc MC: Move R_PPC64_TOC case to PowerPCAsmBackend 2025-05-18 22:32:07 -07:00
Jonas Devlieghere
eb467a088b
[lldb-dap] Add unit test for FifoFiles (#140480) 2025-05-18 19:04:59 -07:00
Jim Lin
c78e6bbd83
[RISCV] Add sext_inreg patterns for XAndesPerf nds.bfos instruction (#139714)
Add the patterns sign_extend_inreg i1/i8/i16.
2025-05-19 09:26:46 +08:00
Brad Smith
fbb8a0c9c8
[CMake] Add a linker test for -Bsymbolic-functions to AddLLVM (#79539)
Add a linker test for -Bsymbolic-functions to AddLLVM and remove
the illumos hardcoded bits for its handling. OpenBSD also has a
local patch for linking with the old BFD linker on mips64 and
sparc64.
2025-05-18 21:20:32 -04:00
Kazu Hirata
6d515ce827
[mlir] Use llvm::all_of (NFC) (#140464) 2025-05-18 18:13:49 -07:00
Fangrui Song
c512d95186 MC: Generalize RISCV/LoongArch handleAddSubRelocations and AVR shouldForceRelocation
Introduce MCAsmBackend::addReloc to manage relocation appending.
The default implementation uses shouldForceRelocation to check
unresolved fixups and calls recordRelocation to append a relocation when
needed.

RISCV and LoongArch override addReloc to handle ADD/SUB relocations,
with potential support for RELAX relocations in the future.

AVR overrides addReloc to customize shouldForceRelocation behavior
(#121498).

applyFixup is moved into evaluateFixup.
2025-05-18 18:08:35 -07:00
LLVM GN Syncbot
048788419e [gn build] Port ad673151085c 2025-05-19 00:33:08 +00:00
Jonas Devlieghere
ad67315108
[lldb-dap] Move the command plugins out of the DAP header (#140396)
Move the command plugins out of the DAP header and into their file. This
PR also renames the classes from "RequestHandler" to "Command". Although
they are implemented in terms of sending requests, they are not
"handlers".
2025-05-18 17:32:28 -07:00
Fangrui Song
ec7a509165 ELFObjectWriter: Simplify R_PPC64_TOC special case. NFC 2025-05-18 14:56:55 -07:00
Alexey Bataev
bb8e2a8937 [SLP]Relax assertion to avoid compiler crash
Need to relax the assertion to fix a compiler crash in case if the
reordered compress loads are more profitable than the ordered ones.

Fixes #140334
2025-05-18 14:26:36 -07:00
Fangrui Song
9d3ef8a66f ELFObjectWriter: Simplify 2025-05-18 14:18:20 -07:00
Florian Hahn
35ee462fef
[LAA] Add assert check CanDoRTIFNeeded can be computed w/o RT.Need (NFC)
Add assert to ensure that CanDoRTIfNeeded can be computed w/o
RtCheck.Need, to prepare for adjusting the condition.
2025-05-18 22:12:28 +01:00