545327 Commits

Author SHA1 Message Date
Peter Rong
a9147e64aa
Revert "[DWARFLinker] Use different addresses to distinguish invalid … (#149422)
…DW_AT_LLVM_stmt_sequence offset (#149376)"

This reverts commit b0c6148584854af3d7ed2425034c3b5252f6b769.
2025-07-18 09:11:59 -07:00
Jonathan Peyton
c244c3b2d9
[OpenMP] [NFC] Remove dead code: building task stack (#143589)
This code hasn't been enabled since the first code changes were
introduced. Remove the dead code.
2025-07-18 12:03:12 -04:00
Annu Singh
148fd6ed0a
[DAG] Adding abdu/abds to canCreateUndefOrPoison (#149017)
Fixes #147695 
- [Alive2 test - freeze abdu](https://alive2.llvm.org/ce/z/aafeJs)
- [Alive 2 test - freeze abds](https://alive2.llvm.org/ce/z/XrSmP4)

---------

Co-authored-by: Simon Pilgrim <llvm-dev@redking.me.uk>
2025-07-18 17:00:44 +01:00
Louis Dionne
d737fe2c91
[libc++][NFC] Fix typos in the libc++ 21 release notes (#149536) 2025-07-18 11:54:27 -04:00
lntue
a676ecd83f
[libc][math] Add POSIX math constants to math.h header. (#149150)
https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/math.h.html
2025-07-18 11:28:22 -04:00
quic-areg
ac7ceb3dab
[Hexagon][llvm-objdump] Improve disassembly of Hexagon bundles (#145807)
Hexagon instructions are VLIW "bundles" of up to four instruction words
encoded as a single MCInst with operands for each sub-instruction.
Previously, the disassembler's getInstruction() returned the full
bundle, which made it difficult to work with llvm-objdump.

For example, since all instructions are bundles, and bundles do not
branch, branch targets could not be printed.

This patch modifies the Hexagon disassembler to return individual
sub-instructions instead of entire bundles, enabling correct printing of
branch targets and relocations. It also introduces
`MCDisassembler::getInstructionBundle` for cases where the full bundle
is still needed.

By default, llvm-objdump separates instructions with newlines. However,
this does not work well for Hexagon syntax:

  { inst1
    inst2
    inst3
    inst4 <branch> } :endloop0

Instructions may be followed by a closing brace, a closing brace with
`:endloop`, or a newline. Branches must appear within the braces.

To address this, `PrettyPrinter::getInstructionSeparator()` is added and
overridden for Hexagon.
2025-07-18 10:27:59 -05:00
David Spickett
32f0fc597f
[lldb] Correct spacing of = {...} when depth limit is hit (#149480)
In some places it was printing "= {...}" and some "={...}" with no
space. I think the space looks nicer so do that in both cases.
2025-07-18 16:27:46 +01:00
Brad Smith
5f001294b1
Remove last few bits for Native Client support (#148983) 2025-07-18 11:26:36 -04:00
Kelvin Li
ff5f3ae02a
[flang] convert program name to upper case (NFC) (#149508) 2025-07-18 11:20:00 -04:00
Adam Siemieniuk
e73cb43b44
[mlir][xegpu] Remove unused custom pass declaration (#149278)
Removes unused declaration for pass creation.
Only the create function auto-generated from tablegen should be used.
2025-07-18 17:16:46 +02:00
Alex MacLean
f73e163278
[DAGCombiner] Fold [us]itofp of truncate (#149391) 2025-07-18 08:10:20 -07:00
Louis Dionne
0e40695804
[libc++] Remove unused _LIBCPP_HAS_NO_STD_MODULES macro from __config_site (#148902)
Since 1d6b6132f, that macro isn't used anywhere anymore.
2025-07-18 11:06:27 -04:00
RolandF77
55305db90a
[PowerPC] Update maintainers (#149171)
Update PowerPC BE maintainers.
2025-07-18 11:06:05 -04:00
Corentin Jabot
724cfce580
[Clang] Do not assume a perfect match is a better match than a non-template non-perfect match (#149504)
This fixes a regression introduced by the "perfect match" overload
resolution mechanism introduced in 8c5a307.

[This does regress the performance noticeably (-0.7% for a stage 2
build)](https://llvm-compile-time-tracker.com/compare.php?from=42d2ae1034b287eb60563c370dbf52c59b66db20&to=82303bbc3e003c937ded498ac9f94f49a3fc3d90&stat=instructions:u),
however, the original patch had a +4% performance impact, so we are only
losing some of the gain, and this has
the benefit of being correct and more robust.

Fixes #147374
2025-07-18 17:05:18 +02:00
Kazu Hirata
151fffccf1
[flang] Migrate away from ArrayRef(std::nullopt_t) (#149454)
ArrayRef(std::nullopt_t) has been deprecated.  This patch replaces
std::nullopt with mlir::TypeRange{} or mlir::ValueRange{} as
appropriate.
2025-07-18 08:05:12 -07:00
Kazu Hirata
fdce69a462
[llvm] Improve grammar and punctuation of LLVM Coding Standards (#149463) 2025-07-18 08:03:53 -07:00
Paul Kirth
fd12e9aed8
[libc++][tests] Update XFAIL annotations for some tests on Windows (#149124)
These tests still fail on Windows with clang-22, as reported in #70225.
This started failing due to the version bump to Clang 22.
2025-07-18 11:03:19 -04:00
Pengying Xu
6c705d1136
[lld][elf] Skip BP ordering input sections with null data (#149265) 2025-07-18 08:01:16 -07:00
Nikita Popov
de959569f7 [AddressSanitizer] Generate test checks (NFC) 2025-07-18 17:00:48 +02:00
Shilei Tian
95b69e0e70
[AMDGPU] Add support for v_prng_b32 on gfx1250 (#149450)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin@amd.com>
2025-07-18 10:59:47 -04:00
lntue
37ea9d88a3
[libc] Fix tests' linking flags accidentally modified by #147931. (#149453)
https://github.com/llvm/llvm-project/pull/147931
2025-07-18 10:52:26 -04:00
Paul Walker
44cd5027f8
[LLVM][CodeGen][SVE] List MVTs that are desirable for extending loads. (#149153)
Extend AArch64TargetLowering::isVectorLoadExtDesirable to specify the
set of MVT for which load extension is desirable.

Fixes https://github.com/llvm/llvm-project/issues/148939
2025-07-18 15:34:48 +01:00
bd1976bris
2207664464
[Clang][Test] Add PS5 and WI cases to clang/test/Sema/dllexport.c (#148818)
Windows Itanium and PS5 are both Itanium C++ ABI variants which have the
goal of semantic compatibility with Microsoft C++ code that uses
dllimport/export.

This patch adds Windows Itanium and PS5 triple testing to
clang/test/Sema/dllexport.c. We have this testing in our downstream
toolchain - for some reason it was not added upstream when the work for
supporting dllimport/export was done.
2025-07-18 15:18:20 +01:00
Nikita Popov
5f531827a4
[LSR] Do not consider uses in lifetime intrinsics (#149492)
We should ignore uses of pointers in lifetime intrinsics, as these are
not actually materialized in the final code, so don't affect register
pressure or anything else LSR needs to model.
    
Handling these only results in peculiar rewrites where additional
intermediate GEPs are introduced.
2025-07-18 16:13:00 +02:00
Aiden Grossman
7b541c931e
[Github] Build CI Containers in Stacked PRs (#149346)
Currently the pull_request event on the build CI container workflows are
restricted to main. This prevents building them on stacked PRs. This is
a bit annoying because we do not get the CI to test that everything is
working until all of the base PRs have landed and the target branch
becomes main.
2025-07-18 07:06:49 -07:00
Sergei Barannikov
6112ebde0c
[RISCV] Guard CFI emission code with MF.needsFrameMoves() (#136060)
Currently, AsmPrinter skips CFI instructions created by a backend if
they are not needed. I'd like to change that so that it always
prints/encodes CFI instructions if a backend created them.

This change should slightly (perhaps negligibly) improve compile time as
post-PEI passes no longer need to skip over these instructions in
no-exceptions no-debug builds, and will allow to simplify convoluted
logic in AsmPrinter once other targets stop emitting CFI instructions
when they are not needed (that's my final goal).

The changes in a test seem to be caused by slightly different post-RA
scheduling in the absence of CFI instructions.
2025-07-18 16:49:30 +03:00
Michael Buch
03b7766dba
[lldb][Expression][NFC] Make LoadAddressResolver::m_target a reference (#149490)
The only place that passes a target to `LoadAddressResolver` already
checks for pointer validity. And inside of the resolver we have been
dereferencing the target anyway without nullptr checks. So codify the
non-nullness of `m_target` by making it a reference.
2025-07-18 14:31:12 +01:00
Ross Brunton
311847be4c
[Offload] Allow "tagging" device info entries with offload keys (#147317)
When generating the device info tree, nodes can be marked with an
offload Device Info value. The nodes can also look up children based
on this value.
2025-07-18 14:27:34 +01:00
Shilei Tian
602d43cfd1
[Clang][AMDGPU] Add the missing builtin __builtin_amdgcn_sqrt_bf16 (#149447)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin@amd.com>
2025-07-18 08:43:08 -04:00
Sjoerd Meijer
a9f8143072
[LoopInterchange] Ignore the cost-model, force interchange if legal (#148858)
This is and has been proven useful for testing purposes, to get more
test coverage.
2025-07-18 13:42:25 +01:00
lonely eagle
4c70195634
[mlir][transform] Fix ch2 and additional documentation (#148407)
Fixed error code in example.In addition to this, the content in the documentation has been improved by adding links to the code repository.
2025-07-18 20:28:43 +08:00
LLVM GN Syncbot
8b06814954 [gn build] Port 8f3e78f9715c 2025-07-18 12:12:24 +00:00
Nico Weber
4bbc70ed28 [gn] port d994487db78 (llvm-ir2vec) 2025-07-18 08:11:55 -04:00
Valentin Clement (バレンタイン クレメン)
6c63316ee1
[flang][cuda] Support device component in a pointer or allocatable derived-type (#149418) 2025-07-18 04:17:15 -07:00
Nikita Popov
369f749dc4 [SLP] Remove lifetime.start on null pointer in test (NFC) 2025-07-18 12:47:49 +02:00
Jeremy Morse
c9d8b68676
[DebugInfo] Suppress lots of users of DbgValueInst (#149476)
This is another prune of dead code -- we never generate debug intrinsics
nowadays, therefore there's no need for these codepaths to run.

---------

Co-authored-by: Nikita Popov <github@npopov.com>
2025-07-18 11:31:52 +01:00
Phoebe Wang
4fbe88fc46
[NFC] Add parentheses around arithmetic operand (#149489) 2025-07-18 18:23:46 +08:00
Antonio Frighetto
9e0c06d708 [clang][CodeGen] Set dead_on_return when passing arguments indirectly
Let Clang emit `dead_on_return` attribute on pointer arguments
that are passed indirectly, namely, large aggregates that the
ABI mandates be passed by value; thus, the parameter is destroyed
within the callee. Writes to such arguments are not observable by
the caller after the callee returns.

This should desirably enable further MemCpyOpt/DSE optimizations.

Previous discussion: https://discourse.llvm.org/t/rfc-add-dead-on-return-attribute/86871.
2025-07-18 11:50:18 +02:00
Lucas Ramirez
ee8756e855
[LLVM] Make MachineBlockFrequencyInfo's constructor arguments const (NFC) (#149279)
This avoids having to call `MachineBlockFrequencyInfo::calculate`
manually if one of the parameters is const.
2025-07-18 11:28:13 +02:00
Nicholas Guy
b5e3fffd20
[LoopVectorizer][NFC] Require asserts on maxbandwidth-regpressure.ll (#149484)
Fix for buildbot failure:
https://lab.llvm.org/buildbot/#/builders/11/builds/19837
2025-07-18 10:21:21 +01:00
Timm Baeder
b7660a5415
[clang][bytecode] Fix const-in-mutable fields (#149286)
For mutable and const fields, we have two bits in InlineDescriptor,
which both get inherited down the hierarchy. When a field is both const
and mutable, we CAN read from it if it is a mutable-in-const field, but
we _can't_ read from it if it is a const-in-mutable field. We need
another bit to distinguish the two cases.
2025-07-18 11:20:48 +02:00
Timm Baeder
3bb4355bb8
[clang][bytecode] Report mutable reads when copying unions (#149320) 2025-07-18 11:10:57 +02:00
Matt Arsenault
0b7a95a6fd Partially Reapply "RuntimeLibcalls: Add methods to recognize libcall names (#149001)"
This partially reverts commit a96121089b9c94e08c6632f91f2dffc73c0ffa28.

Drop the IRSymtab changes for now
2025-07-18 18:06:26 +09:00
Michael Buch
3121cc31ba [lldb][test] TestNSDictionarySynthetic.py: adjust ptr depth in test
Fixes failure after we introduced a default limit in
https://github.com/llvm/llvm-project/pull/149282

We already did this test change on the Apple fork.
2025-07-18 10:05:18 +01:00
Ross Brunton
df9a864b04
[Offload] Implement event sync in amdgpu (#149300) 2025-07-18 09:56:17 +01:00
Nicholas Guy
534b9cdddd
[LoopVectorizer][NFC] Update comment regarding VF register pressure. (#149478) 2025-07-18 09:55:00 +01:00
Matt Arsenault
d883d5fecf AMDGPU: Add testcase with bad regalloc behavior
This demonstrates poor allocation due to not ordering
AV classes relative to the A and V classes
2025-07-18 17:46:54 +09:00
Jeremy Morse
28208c8e27
[DebugInfo] Remove debug-intrinsic coroutine codepaths (#149068)
There are a few duplicate paths/facilities in the coroutine code to deal
with both intrinsics and debug-records; we can now delete the intrinsic
version.
2025-07-18 09:44:01 +01:00
Simon Tatham
3ce06b8c21
[Clang][Driver] Expose relocation model as multilib flags (#149132)
If a multilib collection contains libraries built for different methods
of accessing global data (via absolute address, or via a GOT in -fPIC
style, or as an offset from a fixed register in Arm -frwpi style), then
`multilib.yaml` will need to know which relocation model an application
is using in order to select the right library.

Even if a multilib collection only supports one relocation model, it's
still useful for `multilib.yaml` to be able to tell if the user has
selected the right one, so as to give a useful error message if they
haven't, instead of silently selecting a library that won't work.

In this commit we determine the PIC / ROPI / RWPI status using the
existing logic in `ParsePICArgs`, and translate it back into a canonical
set of multilib selection flags.
2025-07-18 09:34:42 +01:00
David Spickett
88721d63d4 [lldb][test] Fix PDB UdtLayoutTest
https://github.com/llvm/llvm-project/pull/149282 changed
the max children depth and that caused one part of the
output to become `{...}`.

The original PR set a higher limit for a different test,
so I'm doing the same here.
2025-07-18 08:26:00 +00:00