29235 Commits

Author SHA1 Message Date
Florian Hahn
88e9c56990
[LV] Don't adjust name of recurrence phi in scalar loop (NFC).
Adjusting the name of the recurrence phi in the scalar loop is a bit
inconsistent, as we do not adjust any other names in the scalar loops
(including other phis).

Remove this adjustment in preparation for
https://github.com/llvm/llvm-project/pull/94760/ and as discussed there.
2024-07-10 18:37:35 +01:00
Teresa Johnson
8c1bd67dee
[MemProf] Optionally print or record the profiled sizes of allocations (#98248)
This is the first step in being able to track the total profiled sizes
of allocations successfully marked as cold.

Under a new option -memprof-report-hinted-sizes:
- For unambiguous (non-context-sensitive) allocations, print the
  profiled size and the allocation coldness, along with a hash of the
  allocation's location (to allow for deduplication across modules or
  inline instances).
- For context sensitive allocations, add the size as a 3rd operand on
  the MIB metadata. A follow on patch will propagate this through to the
  thin link where the sizes will be reported for each context after
  cloning.
2024-07-10 09:41:36 -07:00
Alex Bradbury
f8dbe1d09d
Revert "[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default" (#98328)
Reverts llvm/llvm-project#89927 while we investigate performance
regressions reported by @dtcxzyw
2024-07-10 15:33:20 +01:00
Florian Hahn
b841e2eca3
Recommit "[VPlan] First step towards VPlan cost modeling. (#92555)"
This reverts commit 6f538f6a2d3224efda985e9eb09012fa4275ea92.

A number of crashes have been fixed by separate fixes, including
ttps://github.com/llvm/llvm-project/pull/96622. This version of the
PR also pre-computes the costs for branches (except the latch) instead
of computing their costs as part of costing of replicate regions, as
there may not be a direct correspondence between original branches and
number of replicate regions.

Original message:
This adds a new interface to compute the cost of recipes, VPBasicBlocks,
VPRegionBlocks and VPlan, initially falling back to the legacy cost model
for all recipes. Follow-up patches will gradually migrate recipes to
compute their own costs step-by-step.

It also adds getBestPlan function to LVP which computes the cost of all
VPlans and picks the most profitable one together with the most
profitable VF.

The VPlan selected by the VPlan cost model is executed and there is an
assert to catch cases where the VPlan cost model and the legacy cost
model disagree. Even though I checked a number of different build
configurations on AArch64 and X86, there may be some differences
that have been missed.

Additional discussions and context can be found in @arcbbb's
https://github.com/llvm/llvm-project/pull/67647 and
https://github.com/llvm/llvm-project/pull/67934 which is an earlier
version of the current PR.

PR: https://github.com/llvm/llvm-project/pull/92555
2024-07-10 14:22:21 +01:00
DianQK
62b3e68d33
[MemCpyOpt] Fixes test6_memcpy test (NFC)
We should forward `src` to `dest`.
2024-07-10 21:10:28 +08:00
Alex Bradbury
4f0ebe01a4 [PreISelIntrinsicLowering][test] Test that the expanded memset.inline doesn't drop volatile flag
As suggested in the discussion for #98281.
2024-07-10 14:06:18 +01:00
Simon Pilgrim
3ef2805dcf [PhaseOrdering][X86] Fix cut+paste typo in blendv test 2024-07-10 13:35:48 +01:00
Alex Bradbury
af47a4ec50
[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default (#89927)
This avoids some cases where LSR produces results that lead to very poor
codegen. There's a chance we'll see minor degradations for some inputs
in the case that our metrics say the found solution is worse, but in
reality it's better than the starting point.

Per the review thread, at least one vendor has been enabling this by
defualt for some time and found overall it's an improvement. As such,
we'll enable by default and aim to fix any as-yet-unknown regressions
in-tree.
2024-07-10 13:23:31 +01:00
Sudharsan Veeravalli
27d4877ca4
[DebugInfo][SimplifyIndVar] Missing debug location updates for overflow/saturation instructions (#97987)
Fixes #97986
2024-07-10 13:02:58 +01:00
Alexey Bataev
3742c2a83c [SLP]Use stored signedness after minbitwidth analysis.
Need to used stored signedness info for the root node instead of
recalculating it after the vectorization, which may lead to a compiler
crash.
2024-07-10 03:58:00 -07:00
Daniel Kiss
1782810b84 [Clang][ARM][AArch64] Alway emit protection attributes for functions. (#82819)
So far branch protection, sign return address, guarded control stack
attributes are
only emitted as module flags to indicate the functions need to be
generated with
those features.
The problem is in case of an LTO build the module flags are merged with
the `min`
rule which means if one of the module is not build with sign return
address then the features
will be turned off for all functions. Due to the functions take the
branch-protection and
sign-return-address features from the module flags. The
sign-return-address is
function level option therefore it is expected functions from files that
is
compiled with -mbranch-protection=pac-ret to be protected.
The inliner might inline functions with different set of flags as it
doesn't consider
the module flags.

This patch adds the attributes to all functions and drops the checking
of the module flags
for the code generation.
Module flag is still used for generating the ELF markers.
Also drops the "true"/"false" values from the
branch-protection-enforcement,
branch-protection-pauth-lr, guarded-control-stack attributes as presence
of the
attribute means it is on absence means off and no other option.

Releand with test fixes.
2024-07-10 11:32:41 +02:00
Alex Bradbury
b7a457e5e6 [PreISelIntrinsicLowering][test] Demonstrate volatile flag for memset.inline is preserved
Equivalent change ot the one requested in the review for #98281.
2024-07-10 09:45:16 +01:00
Daniel Kiss
4b2daeccc7
Revert "[Clang][ARM][AArch64] Alway emit protection attributes for functions." (#98284)
Reverts llvm/llvm-project#82819
2024-07-10 10:22:38 +02:00
Daniel Kiss
e15d67cfc2
[Clang][ARM][AArch64] Alway emit protection attributes for functions. (#82819)
So far branch protection, sign return address, guarded control stack
attributes are
only emitted as module flags to indicate the functions need to be
generated with
those features.
The problem is in case of an LTO build the module flags are merged with
the `min`
rule which means if one of the module is not build with sign return
address then the features
will be turned off for all functions. Due to the functions take the
branch-protection and
sign-return-address features from the module flags. The
sign-return-address is
function level option therefore it is expected functions from files that
is
compiled with -mbranch-protection=pac-ret to be protected.
The inliner might inline functions with different set of flags as it
doesn't consider
the module flags.
 
This patch adds the attributes to all functions and drops the checking
of the module flags
for the code generation.
Module flag is still used for generating the ELF markers.
Also drops the "true"/"false" values from the
branch-protection-enforcement,
branch-protection-pauth-lr, guarded-control-stack attributes as presence
of the
attribute means it is on absence means off and no other option.
2024-07-10 10:06:14 +02:00
Alex Bradbury
4d052a7618
[Intrinsics][PreISelIntrinsicLowering] llvm.memset.inline length no longer needs to be constant (#95397)
As requested in
https://discourse.llvm.org/t/rfc-introducing-an-llvm-memset-pattern-inline-intrinsic/79496
this patch removes the requirement that the length of llvm.memset.inline
is a constant, and adjusts PreISelIntrinsicLowering so it supports
expanding such the intrinsic in the case it has a non-constant length.
2024-07-10 07:58:52 +01:00
Yingwei Zheng
6f619c98ae
[InstSimplify] Only handle canonical forms in simplifyAndOrOfFCmps. NFC. (#98136)
This patch avoids calling `isKnownNeverNaN` in `simplifyAndOrOfFCmps`
since `fcmp ord/uno X, NNAN` will be canonicalized into `fcmp ord/uno X,
0.0` in InstCombine.
2024-07-10 12:59:27 +08:00
Alex MacLean
8e9d50cdd1
[InstSimplify] fold uno/ord comparison if fpclass is always NaN (#97763)
In InstSimplify we already fold `fcmp ord/uno` to a constant when both
operands are known to be non-NaN. This change slightly generalizes this
to also handle the case where either of the operands is known to always
be NaN.

Proof: https://alive2.llvm.org/ce/z/AhCmJN
2024-07-09 14:44:48 -07:00
Alexey Bataev
af21bc1917 [SLP]Fix a crash on attempt to revectorize vectorized phi.
If the PHI node is vectorized during vectorization of its operands, no
need to try to vectorize its operands once again.
2024-07-09 14:11:08 -07:00
Florian Hahn
ef89e3efa9
[VPlan] Collect ephemeral values for VPlan.
Port collectEphemeralValues to VPlan as collectEphemeralRecipesForVPlan,
use it in willGenerateVectors. This fixes a regression caused by
29b8b72117 for loops where the only vector values are ephemeral.
2024-07-09 21:34:49 +01:00
Florian Hahn
5b927130b0
[ConstraintElim] Use cond from header as upper bound on IV in exit BB. (#94610)
For loops, we can use the condition in the loop header as upper bound on
the compared induction in the unique exit block, if it exists. This can
be done even if there are multiple in-loop edges to the unique exit
block, as any other exit may only exit earlier.

More generally, we could add the OR of all exit conditions to the exit,
but that's a possible future extension.

PR: https://github.com/llvm/llvm-project/pull/94610
2024-07-09 19:37:38 +01:00
Alexey Bataev
a988821123
[SLP]Keep the original order in the reductions.
The patch tries to keep the original order of the instruction in the
reductions. Previously, two first instructions were switched, giving
reverse order.
The first step to support of the ordered reductions.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/98025
2024-07-09 12:26:42 -04:00
Florian Hahn
7346e7cc47
[VPlan] Update HCFG builder after 72937203dd3b to fix leak.
Update buildPlainCFG to re-use the vector and latch VPBBs created as
part of the initial skeleton in 72937203dd3b.

This should fix the leak sanitizer failure discovered by
https://lab.llvm.org/buildbot/#/builders/52/builds/619.
2024-07-09 15:28:43 +01:00
Benjamin Kramer
d1fbdde9d4
[NaryReassociate] Check to avoid introducing poison when reusing SCEVs (#98156)
Drop the poison flags if possible or skip the candidate if it's not.
Otherwise we'd introduce poison in places where it previously wasn't,
leading to miscompiles.
2024-07-09 16:14:16 +02:00
Yingwei Zheng
722151664e
[InstCombine] Fix typo in adjustKnownBitsForSelectArm (#98155)
Fixes https://github.com/llvm/llvm-project/issues/98139.
2024-07-09 22:04:55 +08:00
Alexey Bataev
2cba218ca5 [SLP]Fix PR98133: Inserting PHI after debug-records!
The phi-node-to-be-deleted still should be inserted as the first
instruction in the block to avoid random compiler crashes.

Fixes https://github.com/llvm/llvm-project/issues/98133
2024-07-09 05:44:45 -07:00
Simon Pilgrim
ef5b1ec0dd [VectorCombine] foldShuffleToIdentity - ensure casts have the same source type 2024-07-09 13:10:11 +01:00
Nikita Popov
6b76c1e64c
[SCCP] Add support for vectors (#98026)
Add preliminary support for vectors of integers by using the
`ValueLatticeElement::asConstantRange()` helper instead of a custom
implementation, and relxing various integer type checks.

This enables just the part that works automatically, e.g. icmps with a
constant vector operand aren't supported yet.

The change in ssa.copy handling is because asConstantRange() returns an
unknown LV for empty range, while SCCP's getConstantRange() returned a
full range. I've made the change to preserve the existing behavior.
2024-07-09 12:25:53 +02:00
v01dXYZ
cff8d716bd
[SCEV] forgetValue: support (with-overflow-inst op0, op1) (#98015)
The use-def walk in forgetValue() was skipping instructions with
non-SCEVable types. However, SCEV may look past with.overflow
intrinsics returning aggregates.

Fixes #97586.
2024-07-09 09:14:33 +02:00
Yingwei Zheng
be7239e5a6
[Inline] Remove bitcast handling in CallAnalyzer::stripAndComputeInBoundsConstantOffsets (#97988)
As we are now using opaque pointers, bitcast handling is no longer
needed.

Closes https://github.com/llvm/llvm-project/issues/97590.
2024-07-09 15:08:04 +08:00
Alexey Bataev
f5ee07a1b5
[SLP]Improve instruction reordering mode detection.
The "instruction" reordering mode should be selected only if there are
compatible instructions in other operands, which can be reordered.
Otherwise, better to select splat reordering mode.

Metric: size..text

Program                                                                                                                                                size..text
                                                                                                                                                       results     results0    diff

test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12383340.00 12383324.00 -0.0%

Some 4x operations get replaced by 8x.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/97485
2024-07-08 16:01:55 -04:00
Hari Limaye
ea39f97727
Revert "[LoopIdiom] Support 'shift until less-than' idiom (#95002)" (#98065)
Reverts #95002 while I investigate buildbot failure.

This reverts commit 83b01aaf51072a07261ee2e5fc14102f71273bc0.
2024-07-08 20:02:31 +01:00
Florian Hahn
0577cdaa32
[LV] Split checking if tail-folding is possible, collecting masked ops. (#77612)
Introduce new canFoldTail helper which only checks if tail-folding is
possible, but without modifying MaskedOps.

Just because tail-folding is possible doesn't mean the tail will be
folded; that's up to the cost-model to decide. Separating the check if
tail-folding is possible and preparing for tail-folding makes sure that
MaskedOps is only populated when tail-folding is actually selected.

PR: https://github.com/llvm/llvm-project/pull/77612
2024-07-08 16:34:42 +01:00
Alexey Bataev
385118644c [SLP]Remove operands upon marking instruction for deletion.
If the instruction is marked for deletion, better to drop all its
operands and mark them for deletion too (if allowed). It allows to have
more vectorizable patterns and generate less useless extractelement
instructions.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/97409
2024-07-08 07:56:48 -07:00
Simon Pilgrim
7e054c33d4 [VectorCombine] foldShuffleOfCastops - don't restrict to oneuse but compare total costs instead
Some casts (especially bitcasts but others as well) are incredibly cheap (or free), so don't limit the shuffle(cast(x),cast(y)) -> cast(shuffle(x,y)) to oneuse cases, but instead compare the total before/after costs of possibly repeating some casts.
2024-07-08 14:57:51 +01:00
Hari Limaye
83b01aaf51
[LoopIdiom] Support 'shift until less-than' idiom (#95002)
The current loop idiom code for recognising and inserting a CTLZ
intrinsic does not support loops where the loopback control is based on
an unsigned less-than condition. This patch adds support for recognising
these loops and inserting a CTLZ intrinsic.

Fixes the missed optimization cases in #51064

---------

Co-authored-by: David Sherwood <david.sherwood@arm.com>
2024-07-08 14:32:08 +01:00
Alexey Bataev
4c47b41771
[SLP]Allow matching and shuffling of extractelement vector operands with different VF.
Allows better codegen with the free resizing of small VF vector operands
and then regular shuffling of the operands of the same size and
simplifies the code.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/97414
2024-07-08 09:27:08 -04:00
Florian Hahn
27ccc8835e
[LV] Add tests with ephemeral values that are widened.
Add tests with loops with ephemeral values that are widened.
After 29b8b72117, @ephemeral_load_and_compare_another_load_used_outside
is vectorized even though the only vector values that are generated are
ephemeral.
2024-07-08 13:15:39 +01:00
Shan Huang
431b9965f5
[DebugInfo][SpeculativeExecution] Drop the debug location of the hoisted instruction (#97384)
Fix #97375 .
2024-07-08 11:05:00 +08:00
Florian Hahn
29b8b72117
[LV] Move check if any vector insts will be generated to VPlan. (#96622)
This patch moves the check if any vector instructions will be generated
from getInstructionCost to be based on VPlan. This simplifies
getInstructionCost, is more accurate as we check the final result and
also allows us to exit early once we visit a recipe that generates
vector instructions.

The helper can then be re-used by the VPlan-based cost model to match
the legacy selectVectorizationFactor behavior, this fixing a crash and
paving the way to recommit
https://github.com/llvm/llvm-project/pull/92555.

PR: https://github.com/llvm/llvm-project/pull/96622
2024-07-07 20:08:01 +01:00
Florian Hahn
ac03ae30cf
[LV] Preserve LAA in LoopVectorize (NFCI).
LoopVectorize already always preserves DT, LI and SCEV. If any changes
get made to the CFG, cached LAA info for loops are cleared.

LoopAccessAnalysis also implements ::invalidate to clear the analysis if
SE, DT or LI gets invalidated. Hence it should be safe to preserve LAA
and save a small amount of compile-time.
2024-07-05 21:41:31 +01:00
Simon Pilgrim
6c1c97c5b6 [InstCombine][X86] Peek through bitcast+shuffle+bitcast sequence when folding BLENDV to SELECT
Mentioned on #96882
2024-07-05 16:53:06 +01:00
Simon Pilgrim
0488f210d9 [InstCombine][X86] Add test showing failure to peek through bitcast+shuffle+bitcast sequence to fold BLENDV to SELECT
Mentioned on #96882
2024-07-05 16:50:34 +01:00
Ramkumar Ramachandra
344930316f
LDist/test: clean up and modernize (NFC) (#97822)
Clean up unused triple/datalayout lines, strengthen RUN lines to include
-verify-loop-info/-verify-dom-info, and regenerate tests with
UpdateTestChecks where appropriate.
2024-07-05 16:44:31 +01:00
Nikita Popov
130f0f526d [LVI][CVP] Add support for vector comparisons 2024-07-05 17:02:03 +02:00
Nikita Popov
4339d2edf6 [CVP] Add missing CHECK lines in test (NFC) 2024-07-05 16:57:08 +02:00
Florian Hahn
959ff45bda
[LV] Regenerate test checks for zero_unroll.ll (NFC).
Regenerate test checks to better show impact of
https://github.com/llvm/llvm-project/pull/96622.
2024-07-05 11:37:13 +01:00
YAMAMOTO Takashi
5d79110959
[Pipelines] Perform mergefunc after constmerge (#92498)
Constmerge can fold switch jump tables, possibly making functions
identical again. It can help mergefunc.
On the other hand, the opposite seems unlikely.

Fixes https://github.com/llvm/llvm-project/issues/92201.
2024-07-05 12:28:03 +02:00
Florian Hahn
99d6c6d936
[VPlan] Model branch cond to enter scalar epilogue in VPlan. (#92651)
This patch moves branch condition creation to enter the scalar epilogue
loop to VPlan. Modeling the branch in the middle block also requires
modeling the successor blocks. This is done using the recently
introduced VPIRBasicBlock.

Note that the middle.block is still created as part of the skeleton and
then patched in during VPlan execution. Unfortunately the skeleton needs
to create the middle.block early on, as it is also used for induction
resume value creation and is also needed to properly update the
dominator tree during skeleton creation.

After this patch lands, I plan to move induction resume value and phi
node creation in the scalar preheader to VPlan. Once that is done, we
should be able to create the middle.block in VPlan directly.

This is a re-worked version based on the earlier
https://reviews.llvm.org/D150398 and the main change is the use of
VPIRBasicBlock.

Depends on https://github.com/llvm/llvm-project/pull/92525

PR: https://github.com/llvm/llvm-project/pull/92651
2024-07-05 10:08:42 +01:00
Simon Pilgrim
b546096d94
[VectorCombine] foldShuffleToIdentity - handle bitcasts with equal element counts (#97731)
Basic initial patch for #96884 that just handles case where we bitcast between float/integers of the same element width
2024-07-05 09:47:42 +01:00
Shan Huang
7c4dbad550
[DebugInfo][SimplifyCFGPass] Fix the missing debug location update for the new br instruction (#97389)
Fix #97388 .
2024-07-05 14:10:04 +08:00