383086 Commits

Author SHA1 Message Date
Daniel Kiss
c1940aac99 Revert "[AArch64][compiler-rt] Strip PAC from the link register."
This reverts commit ad40453fc425ee8e1fe43c7bb6e3c1c3afa9cc3b.
2021-03-18 22:01:50 +01:00
Jonas Devlieghere
36335fe753 [lldb] Move Apple simulators test targets under API
Move the Apple simulators test targets as they only matter for the API
tests.

Differential revision: https://reviews.llvm.org/D98880
2021-03-18 13:55:37 -07:00
Eugene Zhulenev
32a744ab20 [mlir] Add linalg.fill bufferization conversion
`BufferizeAnyLinalgOp` fails because `FillOp` is not a `LinalgGenericOp` and it fails while reading operand sizes attribute.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D98671
2021-03-18 13:41:16 -07:00
Zequan Wu
1c740b29fa [clang-cl] make -ffile-compilation-dir a CoreOption.
Let clang-cl accepts `-ffile-compilation-dir` flag.

Differential Revision: https://reviews.llvm.org/D98887
2021-03-18 13:20:47 -07:00
thomasraoux
1a572f4509 [mlir] Add vector op support to cuda-runner including vector.print
Differential Revision: https://reviews.llvm.org/D97346
2021-03-18 13:03:08 -07:00
Pavel Labath
0c208d1f42 [lldb] Fix flakyness in TestGdbRemote_vContThreads
The cause is the non-async-signal-safety printf function (et al.). If
the test managed to interrupt the process and inject a signal before the
printf("@started") call returned (but after it has actually written the
output), that string could end up being printed twice (presumably,
because the function did not manage the clear the userspace buffer, and
so the print call in the signal handler would print it once again).

This patch fixes the issue by replacing the printf call in the signal
handler with a sprintf+write combo, which should not suffer from that
problem (though I wouldn't go as far as to call it async signal safe).
2021-03-18 20:41:55 +01:00
Sanjay Patel
92068d6c31 [SimplifyCFG] add tests for branch cond merging with prof metadata; NFC
See PR49336.
2021-03-18 15:39:50 -04:00
thomasraoux
16947650d5 [mlir][linalg] Extend linalg vectorization to support non-identity input maps
This propagates the affine map to transfer_read op in case it is not a
minor identity map.

Differential Revision: https://reviews.llvm.org/D98523
2021-03-18 12:32:35 -07:00
Mehdi Amini
3614df3537 Revert "[VPlan] Add plain text (not DOT's digraph) dumps"
This reverts commit 6b053c9867a3ede32e51cef3ed972d5ce5b38bc0.
The build is broken:

ld.lld: error: undefined symbol: llvm::VPlan::printDOT(llvm::raw_ostream&) const
>>> referenced by LoopVectorize.cpp
>>>               LoopVectorize.cpp.o:(llvm::LoopVectorizationPlanner::printPlans(llvm::raw_ostream&)) in archive lib/libLLVMVectorize.a
2021-03-18 19:20:39 +00:00
Muiez Ahmed
f6af5efcec [SystemZ][z/OS] vasprintf fix libc++
The aim is to use the correct vasprintf implementation for z/OS libc++, where a copy of va_list ap is needed. In particular, it avoids the potential that the initial internal call to vsnprintf will modify ap and the subsequent call to vsnprintf will use that modified ap.

Differential Revision: https://reviews.llvm.org/D97473
2021-03-18 15:00:57 -04:00
Andrei Elovikov
6b053c9867 [VPlan] Add plain text (not DOT's digraph) dumps
I foresee two uses for this:
1) It's easier to use those in debugger.
2) Once we start implementing more VPlan-to-VPlan transformations (especially
   inner loop massaging stuff), using the vectorized LLVM IR as CHECK targets in
   LIT test would become too obscure. I can imagine that we'd want to CHECK
   against VPlan dumps after multiple transformations instead. That would be
   easier with plain text dumps than with DOT format.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D96628
2021-03-18 11:33:39 -07:00
Thomas Lively
f5764a8654 [WebAssembly] Finalize SIMD names and opcodes
Updates the names (e.g. widen => extend, saturate => sat) and opcodes of all
SIMD instructions to match the finalized SIMD spec. Deliberately does not change
the public interface in wasm_simd128.h yet; that will require more care.

Depends on D98466.

Differential Revision: https://reviews.llvm.org/D98676
2021-03-18 11:21:25 -07:00
Thomas Lively
2f2ae08da9 [WebAssembly] Remove experimental SIMD instructions
Removes the instruction definitions, intrinsics, and builtins for qfma/qfms,
signselect, and prefetch instructions, which were not included in the final
WebAssembly SIMD spec.

Depends on D98457.

Differential Revision: https://reviews.llvm.org/D98466
2021-03-18 11:21:24 -07:00
peter klausler
0d8331c06b [flang] Refine symbol sorting
Replace semantics::SymbolSet with alternatives that clarify
whether the set should order its contents by source position
or not.  This matters because positionally-ordered sets must
not be used for Symbols that might be subjected to name
replacement during name resolution, and address-ordered
sets must not be used (without sorting) in circumstances
where the order of their contents affects the output of the
compiler.

All set<> and map<> instances in the compiler that are keyed
by Symbols now have explicit Compare types in their template
instantiations.  Symbol::operator< is no more.

Differential Revision: https://reviews.llvm.org/D98878
2021-03-18 11:18:14 -07:00
lorenzo chelini
4c782a24d9 [mlir] Fix typo in SCF.cpp (NFC) 2021-03-18 19:15:33 +01:00
Jorg Brown
858ca7c174
Fix typo: char should be TS 2021-03-18 11:00:07 -07:00
Markus Böck
6359049c35 [CMake][runtimes] Add file level dependency to merge_archives commands
Both libc++ and libc++abi have options of merging with another archive. In the case of libc++abi, libunwind can be merged into it and in the case of libc++, libc++abi can be merged into it.

This is realized using add_custom_command with POST_BUILD and the usage of the CMake generator expression TARGET_LINKER_FILE in the arguments. For such generator expressions CMake doc states: "This target-level dependency does NOT add a file-level dependency that would cause the custom command to re-run whenever the executable is recompiled" [1]

This patch adds a DEPENDS argument to both add_custom_command invocations so that the archives also have a file-level dependency on the target they are merging with. That way, changes in say, libunwind source code, will be updated in the libc++abi and/or libc++ static libraries as well.

[1] https://cmake.org/cmake/help/v3.20/command/add_custom_command.html

Differential Revision: https://reviews.llvm.org/D98129
2021-03-18 18:51:10 +01:00
Arthur O'Dwyer
eb37d3546c [libc++] Future-proof generate_feature_test_macro_components.py against long names.
`__cpp_lib_default_template_type_for_algorithm_values` is 52 characters long,
which is enough to reduce the multiplier to less-than-zero, producing an empty
string between the name of the macro and its numeric value. Ensure there's
always a space between the name of the macro and its value.

Differential Revision: https://reviews.llvm.org/D98869
2021-03-18 13:35:28 -04:00
Kristof Beyls
64bb3759dd [docs] Document regular LLVM sync-ups
This documents current regular LLVM sync-ups that are happening in the
Getting Involved section.

I hope this gives a bit more visibility to regular sync-ups that are
happening in the LLVM community, documenting another way communication
in the community happens.
Of course the downside is that this is another location that sync-up
metadata needs to be maintained. That being said, the structure as
proposed means that no changes are needed once a new sync-up is added,
apart from maybe removing the entry once it becomes clear that that
particular sync-up series is completely cancelled.

Documenting a few pointers on how current sync-ups happen may also
encourage others to organize useful sync-ups on specific topics.

I've started with adding the sync-ups I'm aware of. There's a good
chance I've missed some.

If most sync-ups end up having a public google calendar, we could also
create and maintain a public google calendar that shows all events
happening in the LLVM community, including dev meetings, sync-ups,
socials, etc - assuming that would be valuable.

Differential Revision: https://reviews.llvm.org/D98797
2021-03-18 18:32:27 +01:00
Louis Dionne
6a9e7b117b [libc++] Remove the Docker files for BuildBot
We don't use them anymore since we're using the BuildKite setup.

Differential Revision: https://reviews.llvm.org/D97779
2021-03-18 10:24:48 -07:00
Thomas Lively
8638c897f4 [WebAssembly] Remove unimplemented-simd target feature
Now that the WebAssembly SIMD specification is finalized and engines are
generally up-to-date, there is no need for a separate target feature for gating
SIMD instructions that engines have not implemented. With this change,
v128.const is now enabled by default with the simd128 target feature.

Differential Revision: https://reviews.llvm.org/D98457
2021-03-18 10:23:12 -07:00
Peter Waller
0d6482a76a [llvm][AArch64][SVE] Lower fixed length vector fabs
Seemingly striaghtforward.

Differential Revision: https://reviews.llvm.org/D98434
2021-03-18 17:20:08 +00:00
Fangrui Song
16c30c3c23 [ELF] Change --shuffle-sections=<seed> to --shuffle-sections=<section-glob>=<seed>
`--shuffle-sections=<seed>` applies to all sections.  The new
`--shuffle-sections=<section-glob>=<seed>` makes shuffling selective.  To the
best of my knowledge, the option is only used as debugging, so just drop the
original form.

`--shuffle-sections '.init_array*=-1'` `--shuffle-sections '.fini_array*=-1'`.
reverses static constructors/destructors of the same priority.
Useful to detect some static initialization order fiasco.

`--shuffle-sections '.data*=-1'`
reverses `.data*` sections. Useful to detect unfunded pointer comparison results
of two unrelated objects.

If certain sections have an intrinsic order, the old form cannot be used.

Differential Revision: https://reviews.llvm.org/D98679
2021-03-18 10:18:19 -07:00
Christopher Di Bella
580416d573 [libcxx] updates the feature-test macro generator
D97015 didn't correctly update `generate_feature_test_macro_components.py`.

Reviewed By: ldionne, Quuxplusone, #libc, Mordante

Differential Revision: https://reviews.llvm.org/D97904
2021-03-18 17:08:10 +00:00
Jon Chesterfield
626a31de15 [libomptarget] Add register usage info to kernel metadata
Add register usage information to the runtime metadata so that it can be used during kernel launch (that change will be in a different commit). Add this information to the kernel trace.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D98829
2021-03-18 17:00:42 +00:00
Stanislav Mekhanoshin
961e4384f4 [AMDGPU] Support SCC on buffer atomics
Differential Revision: https://reviews.llvm.org/D98731
2021-03-18 09:56:14 -07:00
Wei Mi
14756b70ee [SampleFDO] Don't mix up the existing indirect call value profile with the new
value profile annotated after inlining.

In https://reviews.llvm.org/D96806 and https://reviews.llvm.org/D97350, we
use the magic number -1 in the value profile to avoid repeated indirect call
promotion to the same target for an indirect call. Function updateIDTMetaData
is used to mark an target as being promoted in the value profile with the
magic number. updateIDTMetaData is also used to update the value profile
when an indirect call is inlined and new inline instance profile should be
applied. For the second case, currently updateIDTMetaData mixes up the
existing value profile of the indirect call with the new profile, leading
to the problematic senario that a target count is larger than the total count
in the value profile.

The patch fixes the problem. When updateIDTMetaData is used to update the
value profile after inlining, all the values in the existing value profile
will be dropped except the values with the magic number counts.

Differential Revision: https://reviews.llvm.org/D98835
2021-03-18 09:54:34 -07:00
Mircea Trofin
92ccc6cb17 Reapply "[NPM][CGSCC] FunctionAnalysisManagerCGSCCProxy: do not clear immutable function passes"
This reverts commit 11b70b9e3a7458b5b78c30020b56e8ca563a4801.

The bot failure was due to ArgumentPromotion deleting functions
without deleting their analyses. This was separately fixed in 4b1c807.
2021-03-18 09:44:34 -07:00
Ricky Taylor
6dad34454d Test commit
This is a test commit to verify my access.
2021-03-18 16:29:21 +00:00
Mircea Trofin
4b1c8070bb [NFC][ArgumentPromotion] Clear FAM cached results of erased function.
Not doing it here can lead to subtle bugs - the analysis results are
associated by the Function object's address. Nothing stops the memory
allocator from allocating new functions at the same address.
2021-03-18 09:17:32 -07:00
Mike Rice
c2f8e158f5 [OPENMP51]Support for the 'destroy' clause with interop variable.
Added basic parsing/sema/serialization support to extend the
existing 'destroy' clause for use with the 'interop' directive.

Differential Revision: https://reviews.llvm.org/D98834
2021-03-18 09:12:56 -07:00
Chris Lattner
ced7256778 [libsupport] Silence a bogus valgrind warning.
Valgrind is reporting this bogus warning because it doesn't model
pthread_sigmask fully accurately.  This is a valgrind bug, but
silencing it has effectively no cost, so just do it.

==73662== Syscall param __pthread_sigmask(set) points to uninitialised byte(s)
==73662==    at 0x101E9D4C2: __pthread_sigmask (in /usr/lib/system/libsystem_kernel.dylib)
==73662==    by 0x101EFB5EA: pthread_sigmask (in /usr/lib/system/libsystem_pthread.dylib)
==73662==    by 0x1000D9F6D: llvm::sys::Process::SafelyCloseFileDescriptor(int) (in /Users/chrisl/Projects/circt/build/bin/firtool)
==73662==    by 0x100072795: llvm::ErrorOr<std::__1::unique_ptr<llvm::MemoryBuffer, std::__1::default_delete<llvm::MemoryBuffer> > > getFileAux<llvm::MemoryBuffer>(llvm::Twine const&, long long, unsigned long long, unsigned long long, bool, bool) (in /Users/chrisl/Projects/circt/build/bin/firtool)
==73662==    by 0x100072573: llvm::MemoryBuffer::getFileOrSTDIN(llvm::Twine const&, long long, bool) (in /Users/chrisl/Projects/circt/build/bin/firtool)
==73662==    by 0x100282C25: mlir::openInputFile(llvm::StringRef, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> >*) (in /Users/chrisl/Projects/circt/build/bin

Differential Revision: https://reviews.llvm.org/D98830
2021-03-18 09:09:20 -07:00
Stanislav Mekhanoshin
3f37c28230 [AMDGPU] Remove unused template parameters of MUBUF_Real_AllAddr_vi
Differential Revision: https://reviews.llvm.org/D98804
2021-03-18 09:02:38 -07:00
Jon Chesterfield
253f804deb [amdgpu] Update med3 combine to skip i64
[amdgpu] Update med3 combine to skip i64

Fixes an assumption that a type which is not i32 will be i16. This asserts
when trying to sign/zero extend an i64 to i32.

Test case was cut down from an openmp application. Variations on it are hit by
other combines before reaching the problematic one, e.g. replacing the
immediate values with other function arguments changes the codegen path and
misses this combine.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D98872
2021-03-18 15:56:41 +00:00
Asher Mancinelli
168b206cd8 [flang] Unittests for runtime terminator
Create test fixture for runtime tests which enables verification
of failure cases. Test some runtime IO APIs for failure cases.
Support testing efforts in D98303. Expand on effort discussed
in D98601.

Reviewed By: awarzynski

Differential Revision: https://reviews.llvm.org/D98652
2021-03-18 15:54:48 +00:00
Nigel Perks
1a6ab32f33 [XCore] Remove XFAIL: xcore from passing test.
The pass can be seen on staging buildbot clang-xcore-ubuntu-20-x64.

Differential Revision: https://reviews.llvm.org/D98352
2021-03-18 15:46:24 +00:00
Simon Pilgrim
1ba5c550d4 [DAG] Improve folding (sext_in_reg (*_extend_vector_inreg x)) -> (sext_vector_inreg x)
Extend this to support ComputeNumSignBits of the (used) source vector elements so that we can handle more than just the case where we're sext_in_reg from the source element signbit.

Noticed while investigating the poor codegen in D98587.
2021-03-18 15:34:53 +00:00
Alexander Belyaev
283799157e [mlir][linalg] Add support for memref inputs/outputs for linalg.tiled_loop.
Also use `ArrayAttr` to pass iterator pass to the TiledLoopOp builder.

Differential Revision: https://reviews.llvm.org/D98871
2021-03-18 16:11:03 +01:00
Sid Manning
c539be1dcb [Hexagon] Add support for named registers cs0 and cs1
Allow inline assembly code to referece cs0 and cs1.
2021-03-18 09:53:22 -05:00
LLVM GN Syncbot
6333ee2184 [gn build] Port ed8bff13dcaa 2021-03-18 14:39:37 +00:00
caoming.roy
ed8bff13dc [lld-macho] implement options -map
Implement command-line options -map

Reviewed By: int3, #lld-macho

Differential Revision: https://reviews.llvm.org/D98323
2021-03-18 10:39:19 -04:00
Pavel Labath
68bb51acd5 [lldb] Fix TestAutoInstallMainExecutable.py
Fix the test to account for recent test infrastructure changes, and make
it run locally to increase the chances of it continuing to work in the
future.
2021-03-18 15:20:44 +01:00
Andrzej Warzynski
eefda605fe [flang][driver] Add support for -fget-symbols-sources
Adds support for `-fget-symbols-sources` in the new Flang driver. All
relevant tests are updated to use the new driver when
`FLANG_BUILD_NEW_DRIVER` is set.

`RUN` lines in tests are updated so `-fsyntax-only`
comes before `-fget-symbols-sources`. That's because:
  * both `-fsyntax-only` and `-fget-symbols-sources` are
    action flags, and
  * the new driver, flang-new, will only consider the right-most
    action flag.
In other words, this change is needed so that the tests work with both
`f18` (requires both flags) and `flang-new` (only considers the last
action flag).

Differential Revision: https://reviews.llvm.org/D98191
2021-03-18 14:13:24 +00:00
Andrew Savonichev
e6ce0db378 [MCA] Ensure that writes occur in-order
Delay the issue of a new instruction if that leads to out-of-order
commits of writes.

This patch fixes the problem described in:
https://bugs.llvm.org/show_bug.cgi?id=41796#c3

Differential Revision: https://reviews.llvm.org/D98604
2021-03-18 17:10:20 +03:00
Jay Foad
078b338ba6 [AMDGPU] Add some gfx1010 test coverage. NFC. 2021-03-18 14:00:07 +00:00
David Truby
de155f4af2 [MLIR][OpenMP] Pretty printer and parser for omp.wsloop
Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D92327
2021-03-18 13:37:01 +00:00
Simon Pilgrim
758efce346 [X86][SSE] Regenerate PR18054 test case 2021-03-18 13:31:33 +00:00
Matt Arsenault
b9a0384983 GlobalISel: Preserve source value information for outgoing byval args
Pass through the original argument IR value in order to preserve the
aliasing information in the memcpy memory operands.
2021-03-18 09:16:54 -04:00
Matt Arsenault
61f834cc09 GlobalISel: Insert memcpy for outgoing byval arguments
byval requires an implicit copy between the caller and callee such
that the callee may write into the stack area without it modifying the
value in the parent. Previously, this was passing through the raw
pointer value which would break if the callee wrote into it.

Most of the time, this copy can be optimized out (however we don't
have the optimization SelectionDAG does yet).

This will trigger more fallbacks for AMDGPU now, since we don't have
legalization for memcpy yet (although we should stop using byval
anyway).
2021-03-18 09:16:54 -04:00
Alexey Bataev
b3ced9852c [SLP]Fix crash on extending scheduling region.
If SLP vectorizer tries to extend the scheduling region and runs out of
the budget too early, but still extends the region to the new ending
instructions (i.e., it was able to extend the region for the first
instruction in the bundle, but not for the second), the compiler need to
recalculate dependecies in full, just like if the extending was
successfull. Without it, the schedule data chunks may end up with the
wrong number of (unscheduled) dependecies and it may end up with the
incorrect function, where the vectorized instruction does not dominate
on the extractelement instruction.

Differential Revision: https://reviews.llvm.org/D98531
2021-03-18 06:11:08 -07:00