12322 Commits

Author SHA1 Message Date
Reid Kleckner
6695f1d97f
[docs] Add exception to AI tool policy for Bazel build fixer (#183408)
The Bazel RFC concluded earlier this month:
https://discourse.llvm.org/t/rfc-ai-assisted-bazel-fixer-bot/89178/93

I felt the best way to document this decision was to incorporate it into
this policy document.
2026-03-05 13:53:44 -08:00
Fangrui Song
1f53da098f
[llvm-objdump] Default --symbolize-operands for BPF (#184043)
BPF users expect to see basic block labels (e.g. <L0>, <L1>) in
disassembly output

(https://github.com/llvm/llvm-project/pull/95103#issuecomment-3771234810).
Default --symbolize-operands to on for BPF targets when neither
--symbolize-operands nor --no-symbolize-operands is explicitly
specified.

Add --no-symbolize-operands to allow users to opt out.
2026-03-05 08:55:51 +00:00
Roy Shi
d8e86a5cc0
[dsymutil] Add option to filter debug map objects by allow/disallow-list (#182083)
# Motivation

When using `dsymutil` to generate dSYM for large binaries, sometimes we
want to keep only some of the object files. This has the benefits of
reduced dSYM size and improved performance of LLDB and other tools which
consume the dSYM.

The current way to achieve this is to use YAML input (the `dsymutil -y`
option). However, it doesn't really solve the problem:
1. The whole debug map has to be parsed somewhere else first, before
filtered down to the wanted parts.
2. Said info is written then read by `dsymutil`. The I/O is redundant.

# Change

This patch propose a new way, by adding new options (`dsymutil --allow
<path>` and `--disallow <path>`), which will only process object files
that pass the allow/disallow list.

Important details:
* The input file is YAML. See test files for format.
* Currently, only object files are filtered. The design allows to extend
the filtering to other aspects of the debug map in the future (e.g.
functions).
* If `--oso-prepend-path` is specified, it applies to the entries in the
input file. I.e. Entries in the input file should exact match that of
N_OSO entries.
2026-03-04 12:56:58 -08:00
Mirko Brkušanin
d0f50d5574
[AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (#182107)
Add `DX10ClampAndIEEEMode` feature and set it for every subtarget prior
to gfx1170
2026-03-04 12:16:41 +01:00
Florian Mayer
0c04d019f0
[NFC] [Doc] Fix text codeblock being declared llvm (#184461) 2026-03-03 23:35:14 +00:00
Florian Mayer
0c9734f120
[NFC] [doc] fix invalid comment syntax in IR (#184457) 2026-03-03 23:20:31 +00:00
Finn Plummer
899080a87a
[Analysis][DXILResource] Correct bound computation (#184198)
The range is an unsigned integer where a value of `UINT32_MAX` denotes
an unbounded range

The current implementation implied that any size interpreted as a signed
integer that is negative was unbounded, which is incorrect.

Adds a note to the docs
2026-03-03 19:34:50 +00:00
Srinivasa Ravi
b4fffcd8e4
[NFC][Docs] Add documentation for NVPTX conversion intrinsics (#175536)
This change adds documentation for the NVPTX narrow floating-point
conversion intrinsics.

PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
2026-03-03 15:39:20 +05:30
Nikita Popov
5d8c6c198d
[LangRef] Mention allocation elision (#177592)
allockind / alloc-family enable allocation elision, but this was not
previously mentioned by LangRef.

Related discussion:
https://discourse.llvm.org/t/rfc-clarifying-semantic-assumptions-for-custom-allocators/89469

The semantics here are specified in terms of allowed transforms.
Making the semantics operational is tracked in #184102.
2026-03-03 10:51:38 +01:00
Igor Kudrin
a4d786630c
[lldb][ARM] Support thread local variables on ARM Linux (#181315)
Currently, `DynamicLoaderPOSIXDYLD::GetThreadLocalData()` only supports
the TLS memory layout where the thread pointer register points to the
start of the `pthread` structure, and the address of the DTV pointer can
be calculated by adding the offset of the `dtv` field to `tp`. On ARM
(and AArch64), the thread pointer points directly to `dtv`. The patch
improves the detection of the actual memory layout in the method and
adjusts the calculations for the new case, thus adding support for
thread-local variables on ARM Linux.
2026-03-02 12:50:43 -08:00
Nick Sarnie
bc0af9901b
[TableGen] Allow specification of underlying type for GenericEnum (#183769)
Allow specification of the underlying C++ data type for `GenericEnum`.

I ran into this because I was trying to use a TableGen-genered enum in
`DenseSet` which requires the underlying type be specified.

Signed-off-by: Nick Sarnie <nick.sarnie@intel.com>
2026-03-02 15:09:23 +00:00
Shaojie Zhu
4a907a526d
[CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (#183439)
This PR introduces a new opt-in CMake option
`LLVM_ENABLE_WARNING_SUPPRESSIONS` (default `ON`) to toggle warning
suppressions

Previously, several compiler warnings were explicitly disabled using
`-wd` (for MSVC) or `-Wno-...` (for GCC/Clang) flags by default.
However, this causes validation failures with strict compliance scanners
like BinSkim, which require builds to run without any warning
suppressions to meet SDL compliance standards.

This change introduces an opt-in `LLVM_ENABLE_WARNING_SUPPRESSIONS`
option (default ON). When explicitly disabled (OFF), it selectively
filters out the `-wd` flags for MSVC and removes all `-Wno-...` flags
for GCC/Clang in HandleLLVMOptions.cmake. This ensures all compiler
warnings are exposed as intended for static analysis tools while
preserving the default noise-free build experience for regular users.

The option has also been exported to `LLVMConfig.cmake.in` and
documented in `CMake.rst`.

Signed-off-by: Zhu, Shaojie <shaojie.zhu@intel.com>
2026-03-02 14:44:04 +01:00
Nikita Popov
3ad43f2d1c
[LangRef] Clarify nsz semantics (#180906)
The current LangRef wording says that the sign of a zero argument or
result is "insignificant", which is not really clear on what this means.

Alive2 models this as non-deterministically flipping the zero sign bits
for both inputs and outputs.

This PR proposes to specify this flag as non-deterministically flipping
inputs only. A consequence of this is that fabs is guaranteed to have an
unset sign bit even if the input is zero (that is,
https://alive2.llvm.org/ce/z/irCftQ is no longer a valid transform), and
that the copysign result sign only depends on the second operand (that
is, https://alive2.llvm.org/ce/z/VnHdfh is no longer a valid transform).

These rules are still more liberal than we'd really like them to be, but
at least avoid some of the issues with nsz.

This is based on the discussion in:
https://discourse.llvm.org/t/rfc-clarify-the-behavior-of-fp-operations-on-bit-strings-with-nsz-flag/85981
2026-03-02 10:53:07 +01:00
Minsoo Choo
4a602c03ea
[lldb][Process/FreeBSDKernelCore] Add riscv64 support (#180670)
This is LLDB version of
https://cgit.freebsd.org/ports/tree/devel/gdb/files/kgdb/riscv-fbsd-kern.c.
This enables selecting riscv64 and reading registers from PCB structure
on core dump and live kenrel debugging while trapframe unwinding support
will be implemented in future. Test files using core dump from riscv64
will be implemented once other kernel debugging improvements are done.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
2026-02-28 15:59:16 -05:00
Minsoo Choo
2430410b7d
[lldb][Process/FreeBSDKernelCore] Add ppc64le support (#180669)
This is LLDB version of
https://cgit.freebsd.org/ports/tree/devel/gdb/files/kgdb/ppcfbsd-kern.c.
This enables selecting ppc64le and reading registers from PCB structure
on core dump and live kernel debugging. FPU registers aren't supported
yet due to pcb structure issue, but this change still achieves feature
parity with KGDB. Trapframe unwinding support will be implemented in
future. Test files using core dump from ppc64le will be implemented once
other kernel debugging improvements are done.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
2026-02-28 10:49:32 -05:00
Minsoo Choo
ef05d06109
[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (#183553)
Implement `ProcessFreeBSDKernelCore::DoWriteMemory()` to write data on
kernel crash dump or `/dev/mem`. Due to safety reasons (e.g. writing
wrong value on `/dev/mem` can trigger kernel panic), this feature is
only enabled when `plugin.process.freebsd-kernel-core.read-only` is set
to false (true by default).

Since 85a1fe6 (#183237) was reverted as it was prematurely merged, I'm
committing changes again with corrections here.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
2026-02-27 10:44:48 -05:00
Luke Lau
4d169f38ca
[LangRef] Clarify in vscale_range that vscale is a power-of-two without the attribute (#183689)
Previously vscale_range used to add the constraint that vscale is a
power-of-two, but after #183080 it's already a power-of-two to begin
with.

This clarifies the sentence about assumptions when there is no attribute
2026-02-27 19:21:24 +08:00
yasmincs
dbaa4d117a
[NVPTX] Support intrinsics for reserved shared memory special registers (#182354)
Added reserved_smem_offset_{begin|end|cap|0} intrinsics to expose shared
memory special registers and NVPTX TableGen support for these
intrinsics.
2026-02-26 14:34:59 -08:00
Lidong Yan
bbaf723d86
[llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (#181863)
The `HowToSetUpLLVMStyleRTTI.rst` document contained a TODO requesting
documentation for advanced RTTI usage, such as the `isa_impl` and
`simplify_type` templates. This patch resolves and removes that TODO by
adding the relevant usage introductions for `simplify_type`.

Since `isa_impl` will be moved to `namespace detail` in the future we
are not including it in the documentation.

CC: @nikic @zwuis

Signed-off-by: Lidong Yan <yldhome2d2@gmail.com>
2026-02-26 23:46:10 +08:00
David Stuttard
cd68939326
[AMDGPU] Add attribute for FWD_PROGRESS (#181675)
Added an attribute for FWD_PROGRESS that allows it to be
turned off for some shaders.
2026-02-26 11:35:36 +00:00
David Spickett
850b0457b2
Revert "[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory()" (#183485)
Reverts llvm/llvm-project#183237

This was landed without addressing review comments.
2026-02-26 10:06:13 +00:00
Wang Yaduo
b7c2dda501
[RISCV] Add processor definitions for XuanTie C910V2 and C920V2 (#174056)
XuanTie C910V2 and C920V2 are 64-bit superscalar out-of-order CPUs:
https://www.xrvm.com/community/download?id=4530178488929423360
C910V2 is a C920V2 version without vector, zvfbfmin, zvfbfwma, zvfh and
xtheadvdot extensions.

Scheduling model will be added in a further PR.
2026-02-26 14:35:48 +08:00
Stanislav Mekhanoshin
33fd75f55d
[AMDGPU] Add gfx12-5-generic subtarget (#183381)
This is functionally equivalent to gfx1250.
2026-02-25 13:34:48 -08:00
Minsoo Choo
85a1fe692c
[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (#183237)
Implement `ProcessFreeBSDKernelCore::DoWriteMemory()` to write data on
kernel dump or `/dev/mem`. Due to security concerns (e.g. writing wrong
value on `/dev/mem` can trigger kernel panic), this feature is only
enabled when `plugin.process.freebsd-kernel-core.read-only` is set to
false (true by default).

---------

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
2026-02-25 14:34:51 -05:00
Craig Topper
118f64ad20
[RISCV] Remove -riscv-enable-p-ext-simd-codegen (#183156)
All known crashes have been fixed.

We do still need to work out how fixed length vectors are handled when V
and P are both enabled, but I don't think this option is the solution
for that.
2026-02-25 08:43:55 -08:00
Minsoo Choo
3d251288df
[lldb][Process/FreeBSDKernel] Add arm support (#180674)
This is LLDB version of
https://cgit.freebsd.org/ports/tree/devel/gdb/files/kgdb/arm-fbsd-kern.c.
This enables selecting arm and reading registers from PCB structure on
core dump and live kernel debugging while trapframe unwinding support
will be implemented in future. Test files using core dump from arm will
be implemented once other kernel debugging improvements are done.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
2026-02-25 10:48:46 -05:00
Matt Arsenault
9d5574dda6
llvm: Delete bugpoint (#182320)
For crash reduction, I don't think it does anything that llvm-reduce
can't. Pass pipeline reduction also has a separate reduction script.
The main thing there isn't a replacement tool is the miscompilation
reducer, but I'm not sure that's actually functioned for years.

There are still some references to bugpoint in various comments
and pieces of documentation that don't all necessarily make sense
to replace or remove. In particular there are a few passes documented
as "only for bugpoint", but I've left those alone in case they are
useful for manual reductions.
2026-02-25 08:47:28 +01:00
Paul Walker
59661a2955
[LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (#183080)
There is no known requirement to support non-power-of-two
values of vscale and yet said support is leading to unnecessary
complexity within LLVM.
2026-02-24 17:41:18 +00:00
Minsoo Choo
1c11f94550
[lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (#182878)
There are two different ways to debug FreeBSD's kernel: core and remote
debugging. Remote debugging is done through `gdb-remote` plugin while
kernel dump and live core debugging is done through `freebsd-kernel`.
The name `freebsd-kernel` is vague for this reason, and following
`elf-core` and `mach-core`'s example, it would be clearer if this plugin
is renamed to `freebsd-kernel-core`.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
2026-02-24 11:37:04 -05:00
Aiden Grossman
8854dd05b4
[IR] Specify alloca with poison element count (#183072)
An alloca with a poison element count is undefined behavior.

This matches existing behavior of optimizations. This also matches the
behavior of llubui for `poison`, but llubi currently does not report
immediate UB for `undef` element counts. A future patch will fix that.
2026-02-24 07:34:08 -08:00
Brandon Wu
03bb370602
[RISCV][llvm] Rename zvqdotq to zvdot4a8i (#179393)
The renaming PR is here:
https://github.com/riscv/riscv-isa-manual/pull/2576
Note that this also update the version number.
2026-02-24 04:44:07 +00:00
Igor Kudrin
5d3c4511f2
[lldb][ARM] Support reading the thread pointer register on ARM Linux (#182438)
This implements reading the TPIDRURO register, which serves as the
thread pointer register on ARM Linux. Note that the register is not
displayed for core files because it is not included in the dump.
2026-02-23 09:39:27 -08:00
Louis Dionne
d7170f6235
[llvm] Remove the docs for the (now removed) LLVM test-suite Makefiles (#179288)
The LLVM test suite used to provide a Makefile-based suite, which had
been deprecated and mostly unmaintained for many years. As explained in
https://discourse.llvm.org/t/llvm-test-suite-removing-the-deprecated-makefiles,
we recently got consensus to remove that test suite, which was done in
llvm/llvm-test-suite#320. This patch cleans up the related
documentation.
2026-02-22 08:10:42 -07:00
Minsoo Choo
9d9c7fc00b
[lldb][Process/FreeBSDKernel] Print unread message buffer on start (#178027)
This is equivalent of kgdb_dmesg() in fbsd-kvm.c in FreeBSD kgdb(1)
port. Unread kernel messages is only printed in interactive mode (i.e.
not in batch mode) to mimic KGDB's behaviour.

Example output:
```
➜ sudo ./build/bin/lldb /boot/kernel/kernel -c /var/crash/vmcore.last
(lldb) target create "/boot/kernel/kernel" --core "/var/crash/vmcore.last"

Unread portion of the kernel message buffer:
panic: kdb_sysctl_panic
cpuid = 1
time = 1769364579
KDB: stack backtrace:
db_trace_self_wrapper() at db_trace_self_wrapper+0x2b/frame 0xfffffe01b435fa20
vpanic() at vpanic+0x136/frame 0xfffffe01b435fb50
panic() at panic+0x43/frame 0xfffffe01b435fbb0
kdb_sysctl_panic() at kdb_sysctl_panic+0x63/frame 0xfffffe01b435fbe0
sysctl_root_handler_locked() at sysctl_root_handler_locked+0x9c/frame 0xfffffe01b435fc30
sysctl_root() at sysctl_root+0x22f/frame 0xfffffe01b435fcb0
userland_sysctl() at userland_sysctl+0x196/frame 0xfffffe01b435fd50
sys___sysctl() at sys___sysctl+0x65/frame 0xfffffe01b435fe00
amd64_syscall() at amd64_syscall+0x169/frame 0xfffffe01b435ff30
fast_syscall_common() at fast_syscall_common+0xf8/frame 0xfffffe01b435ff30
--- syscall (202, FreeBSD ELF64, __sysctl), rip = 0x3f67cad1c8da, rsp = 0x3f67c80261d8, rbp = 0x3f67c8026220 ---
KDB: enter: panic

Core file '/var/crash/vmcore.last' (x86_64) was loaded.
(lldb)
```

---------

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
2026-02-21 18:46:17 -05:00
Folkert de Vries
f1bfed10ad
[ARM] support r14 as an alias for lr in inline assembly (#179740)
In rustc (and I suspect Clang and Zig) there is some special logic to
rewrite `r14` into `lr` when used in inline assembly. LLVM should
probably support `r14` directly.


https://developer.arm.com/documentation/ddi0211/i/programmer-s-model/registers/the-arm-state-register-set

> You can treat r14 as a general-purpose register at all other times.

This heavily suggests that we should be able to use it as a clobber and
read its value.

This is the arm analogue to
https://github.com/llvm/llvm-project/pull/167783.
2026-02-21 14:16:14 +01:00
Peter Collingbourne
943504eb08
IR: Add prefalign attribute for function definitions.
The prefalign attribute determines the function's preferred alignment.
By default, the function's preferred alignment is set in a target-specific
way, but it may be overridden with this attribute.

The backend logic will be added in followup patches.

Part of this RFC:
https://discourse.llvm.org/t/rfc-enhancing-function-alignment-attributes/88019

Reviewers: efriedma-quic, nikic, arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/155527
2026-02-20 10:54:01 -08:00
Matt Arsenault
e411619dd2
tools: Restore PluginLoader to llc (#182455)
This half reverts commit 6fdbcf68ba214725444103ff99668d78240562ea.

This is actually tested.
2026-02-20 09:21:48 +00:00
Prabhu Rajasekaran
84661b3826
Reland "[llvm-readobj] Dump callgraph section info for ELF" (#176260)
This patch is a reland of #157499

Introduce a new flag --call-graph-info which outputs call graph
information in the ELF call graph section in JSON or LLVM style.
2026-02-20 01:38:28 +00:00
Zachary Yedidia
f6c86bd69d
[LFI] Add MCLFIRewriter infrastructure (#172906)
This is the second patch in the LFI series, adding the following
features:

* `MCLFIRewriter` class, which will be used to perform LFI rewrites on a
per-architecture basis. Each architecture where LFI is supported will
implement a subclass (for example,
`Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp`) that will
implement the `rewriteInst` function to perform the actual rewriting
(the AArch64 version will be added in the next PR). The generic rewriter
class provides some instruction info utilities (`mayLoad`, `mayStore`)
and is used to call `rewriteInst` during instruction emission. It also
provides `onLabel` which allows the rewriter to know possible branch
targets, making certain optimizations like guard elimination possible.
* LFI streamer initialization that marks object files with a NOTE
section to indicate that the object file is using LFI.
* A basic LFI assembly parser that introduces the `.lfi_rewrite_disable`
and `.lfi_rewrite_enable` directives that can be used to control whether
rewriting is enabled or not in hand-written assembly.
2026-02-19 14:45:28 -08:00
Konstantin Zhuravlyov
ea4bbfbf5b
AMDGPU/Docs: Reserve 0x060 and 0x070 ELF MACH (e_flags) (#182341) 2026-02-19 14:06:02 -05:00
Minsoo Choo
a8cd1ac705
[lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (#181283)
Due to libfbsdvmcore, adding new features requires modifying both
`ProcessFreeBSDKernelFVC` and `ProcessFreeBSDKernelKVM` which also
requires testing on both. This is highly inefficient while the user base
of fvc is currently invisible since most package manager don't ship
libfbsdvmcore with LLDB.

There is still demand for cross-platform kernel dump debugging. This
will be implemented in future either by cloning and embedding kvm
interface into LLDB or unifying dump formats to ELF core with
minidump-to-elf conversion tool on FreeBSD side.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122@proton.me>
2026-02-19 13:14:27 -05:00
Matt Arsenault
c3745fe4ea
docs: Delete incorrect code generation section of HowToSubmitABug (#182315)
I've never used this. Based on the description here, I'm assuming
it relied on the C backend, which was removed in 2012.
2026-02-19 18:21:24 +01:00
Matt Arsenault
6fdbcf68ba
tools: Remove untested PluginLoader includes (#117644)
As far as I can tell there are 2 parallel plugin mechanisms.
opt -load=plugin does not work, and is ignored. opt -load-pass-plugin
does work. PluginLoader.h forces a static definition of the "load"
cl::opt into included TUs. Delete the cases with no tests.
2026-02-19 18:20:47 +01:00
Matt Arsenault
b3b6fff8b9
docs: Update HowToSubmitABug to use llvm-reduce instead of bugpoint (#182310)
Convert the crash section to recommend llvm-reduce, and stop mentioning
bugpoint. The miscompilation section still uses bugpoint.
2026-02-19 16:26:41 +00:00
Jonathan Thackray
04914f1e5f
[AArch64][llvm] Remove +d128 gating on sysp, msrr and mrrs instructions (#178912)
Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions.

We removed gating for `sys`, `mrs` and `mrs` instructions previously,
on the basis that it doesn't add value, as it doesn't indicate that
any particular system registers or system instructions are available.

Therefore, remove `+d128` gating for these instructions too.

(In upcoming change #178913, some `tlbip` instructions, which are `sysp`
aliases are allowed to be used with either `+d128` or `tlbid`. If we don't
remove this gating, then it would require some ugly work-arounds in the
code to support the relaxation mandated by the 2025 MemSys specification.

In this change, retain `+d128` gating for all `tlbip` instructions, which
will then be loosened to either `+d128` or `+tlbid` in a subsequent
change)
2026-02-19 16:13:20 +00:00
Pierre van Houtryve
c30879ea91
[AMDGPU][Doc] Small fix for GFX12 release atomic memory model doc (#182241)
That row goes for both generic/global but it only said global.
2026-02-19 11:38:05 +01:00
Sergei Barannikov
b881949ee4
[lldb] Drop incomplete non-8-bit bytes support (#182025)
This was originally introduced to support kalimba DSPs featuring 24-bit
bytes by f03e6d84 and also c928de3e, but the kalimba support was mostly
removed by f8819bd5. This change removes the rest of the support, which
was far from complete.
2026-02-19 13:01:02 +03:00
Rahul Joshi
88872a7cf8
[CodeGen] Refactor register operand parsing in MI parser (#181748)
- Refactor register operand parsing to eliminate duplicated LLT parsing
code.
- Additionally, fix the register operand syntax in MI LangRef to match
what the parser supports.
2026-02-18 06:48:06 -08:00
Chris Cotter
a591a44653
[tsan] Introduce Adaptive Delay Scheduling to TSAN (#178836)
This commit introduces an "adaptive delay" feature to the
ThreadSanitizer runtime to improve race detection by perturbing thread
schedules. At various synchronization points (atomic operations,
mutexes, and thread lifecycle events), the runtime may inject small
delays (spin loops, yields, or sleeps) to explore different thread
interleavings and expose data races that would otherwise occur only in
rare execution orders.

This change is inspired by prior work, which is discussed in more detail
on

https://discourse.llvm.org/t/rfc-tsan-implementing-a-fuzz-scheduler-for-tsan/80969.
In short, https://reviews.llvm.org/D65383 was an earlier unmerged
attempt at adding a random delays. Feedback on the RFC led to the
version in this commit, aiming to limit the amount of delay.

The adaptive delay feature uses a configurable time budget and tiered
sampling strategy to balance race exposure against performance impact.
It prioritizes high-value synchronization points with clear
happens-before relationships: relaxed atomics receive lightweight spin
delays with low sampling, synchronizing atomics (acquire / release /
seq_cst) receive moderate delays with higher sampling, and mutex and
thread lifecycle operations receive the longest delays with highest
sampling.

The feature is disabled by default and incurs minimal overhead when not
enabled. Nearly all checks are guarded by an inline check on a global
variable that is only set when enable_adaptive_delay=1. Microbenchmarks
with tight loops of atomic operations showed no meaningful performance
difference between an unmodified TSAN runtime and this version when
running with empty TSAN_OPTIONS.

An LLM assisted in writing portions of the adaptive delay logic,
including the TimeBudget class, tiering concept, address sampler, and
per-thread quota system. I reviewed the output and made amendments to
reduce duplication and simplify the behavior. I also replaced the LLM's
original double-based calculation logic with the integer-based Percent
class. The LLM also helped write unit test cases for Percent.

cc @dvyukov 

## Examples

I used the delay scheduler to find novel bugs that rarely or never
occurred with the unmodified TSAN runtime. Some of the bugs below were
found with earlier versions of the delay scheduler that I iterated on,
but with this most recent implementation in this PR, I can still find
the bugs far more reliably than with the standard TSAN runtime.

- A use-after-free in the
[BlazingMQ](https://github.com/bloomberg/blazingmq) broker during
ungraceful producer disconnect.
 - Race in stdexec: https://github.com/NVIDIA/stdexec/pull/1395
- Race in stdexec's MPSC queue:
https://github.com/NVIDIA/stdexec/pull/1812
- A few races in [BDE](https://github.com/bloomberg/bde) thread enabled
data structures/algorithms.
- The "Data race on variable a" test from
https://ceur-ws.org/Vol-2344/paper9.pdf is more reliably reproduced with
more aggressive adaptive scheduler options

# Outstanding work

- The
[RFC](https://discourse.llvm.org/t/rfc-tsan-implementing-a-fuzz-scheduler-for-tsan/80969)
suggests moving the scheduler to sanitizer_common, so that ASAN can
leverage this. This should be done (should it be done in this PR?).
 - Missing interceptors for libdispatch
2026-02-16 12:20:40 +01:00
Shilei Tian
70905e0afa
[RFC][IR] Remove Constant::isZeroValue (#181521)
`Constant::isZeroValue` currently behaves same as
`Constant::isNullValue` for all types except floating-point, where it
additionally returns true for negative zero (`-0.0`). However, in
practice, almost all callers operate on integer/pointer types where the
two are equivalent, and the few FP-relevant callers have no meaningful
dependence on the `-0.0` behavior.

This PR removes `isZeroValue` to eliminate the confusing API. All
callers are changed to `isNullValue` with no test failures.

`isZeroValue` will be reintroduced in a future change with clearer
semantics: when null pointers may have non-zero bit patterns,
`isZeroValue` will check for bitwise-all-zeros, while `isNullValue` will
check for the semantic null (which
may be non-zero).
2026-02-15 12:06:42 -05:00