293145 Commits

Author SHA1 Message Date
Philip Pfaffe
d71493cb06 [polly-acc] change cl_get_* return types to 32/64bit
Summary:
This patch changes the return types for ocl_get_* functions during SPIR code generation. Because these functions return size_t types, the return type needs to be changed to the actual size of size_t on the device.

Based on work by Michal Babej and Pekka Jääskeläinen

Patch by: Alain Denzler

Reviewers: grosser, philip.pfaffe, bollu

Reviewed By: grosser, philip.pfaffe

Subscribers: nemanjai, kbarton, llvm-commits

Differential Revision: https://reviews.llvm.org/D48774

llvm-svn: 336080
2018-07-02 07:40:47 +00:00
Sander de Smalen
0325e304b9 Reapply r334980 and r334983.
These patches were previously reverted as they led to 
buildbot time-outs caused by large switch statement in
printAliasInstr when using UBSan and O3.  The issue has
been addressed with a workaround (r335525).

llvm-svn: 336079
2018-07-02 07:34:52 +00:00
Max Kazantsev
66da390506 [NFC] Test that shows unprofitability of instcombine with bit ranges
llvm-svn: 336078
2018-07-02 06:55:00 +00:00
Craig Topper
e06dabd3ca [X86] Put some cases in switch statements back on one line to be more compact and make it easier to see the similarities. NFC
It looks like someone ran clang-format over this entire file which reformatted these switches into a multiline form. But I think the single line form is more useful here.

llvm-svn: 336077
2018-07-02 06:42:42 +00:00
Clement Courbet
a53349251c [llvm-exegesis][NFC] Cleanup useless braces.
llvm-svn: 336076
2018-07-02 06:39:55 +00:00
Craig Topper
0661f67296 [X86] Remove FMA3Info DenseMap. Break into sorted tables that we can binary search.
I separated out the rounding and broadcast groups into their own tables because it made the ordering in the main table easier.

Further splitting of the tables might make it possible to directly index using bits from the TSFlags, but its probably not worth it right now.

llvm-svn: 336075
2018-07-02 06:23:39 +00:00
QingShan Zhang
3b2aa2b4b4 [PowerPC] Don't make it as pre-inc candidate if displacement isn't 4's multiple for i64 pre-inc load/store
For the below case, pre-inc prep think it's a good candidate to use pre-inc for the bucket, but 64bit integer load/store update (pre-inc) instruction on Power requires the displacement field should be DS-form (4's multiple). Since it can't satisfy the constraint, we have to do some fix ups later. As below, the original load/stores could be well-form, it makes things worse.

unsigned long long result = 0;
unsigned long long foo(char *p, unsigned long long n) {
  for (unsigned long long i = 0; i < n; i++) {
    unsigned long long x1 = *(unsigned long long *)(p - 50000 + i);
    unsigned long long x2 = *(unsigned long long *)(p - 61024 + i);
    unsigned long long x3 = *(unsigned long long *)(p - 62048 + i);
    unsigned long long x4 = *(unsigned long long *)(p - 64096 + i);
    result *= x1 * x2 * x3 * x4;
  }
  return result;
}

Patch by jedilyn(Kewen Lin).

Differential Revision: https://reviews.llvm.org/D48813 
--This line, and  those below, will be ignored--

M    lib/Target/PowerPC/PPCLoopPreIncPrep.cpp
A    test/CodeGen/PowerPC/preincprep-i64-check.ll

llvm-svn: 336074
2018-07-02 05:46:09 +00:00
Piotr Padlewski
5b3db45e8f Implement strip.invariant.group
Summary:
This patch introduce new intrinsic -
strip.invariant.group that was described in the
RFC: Devirtualization v2

Reviewers: rsmith, hfinkel, nlopes, sanjoy, amharc, kuhar

Subscribers: arsenm, nhaehnle, JDevlieghere, hiraditya, xbolva00, llvm-commits

Differential Revision: https://reviews.llvm.org/D47103

Co-authored-by: Krzysztof Pszeniczny <krzysztof.pszeniczny@gmail.com>
llvm-svn: 336073
2018-07-02 04:49:30 +00:00
Eric Christopher
53054141a7 Add an entry for rodata constant merge sections to the default
section flags in the ELF assembler. This matches the defaults
given in the rest of MC.

Fixes PR37997 where we couldn't assemble our own assembly output
without warnings.

llvm-svn: 336072
2018-07-02 00:16:39 +00:00
Craig Topper
df99cdb95b [X86] Fix a few test names in avx512-intrinsics-fast-isel.ll to match their clang intrinsic names.
I thought I fixed these yesterday, but I guess I missed a few.

llvm-svn: 336071
2018-07-01 23:49:06 +00:00
Craig Topper
c004aa6c5f [X86] Remove the places that return nullptr from X86InstrInfo::commuteInstructionImpl.
findCommutedOpIndices does the pre-checking for whether commuting is possible. There should be no reason left to fail in commuteInstructionImpl. There was a missing pre-check that I've added there and changed the check to an assert in commuteInstructionImpl.

llvm-svn: 336070
2018-07-01 23:27:41 +00:00
Simon Pilgrim
3dafb553d9 [SLPVectorizer] Call InstructionsState.isOpcodeOrAlt with Instruction instead of an opcode. NFCI.
llvm-svn: 336069
2018-07-01 20:22:46 +00:00
Simon Pilgrim
ef9c97c343 [SLPVectorizer] Replace sameOpcodeOrAlt with InstructionsState.isOpcodeOrAlt helper. NFCI.
This is a basic step towards matching more general instructions types than just opcodes.

llvm-svn: 336068
2018-07-01 20:07:30 +00:00
Fangrui Song
5f27e0c021 [asan] Fix deadlock issue on FreeBSD, caused by use of .preinit_array in rL325240
Summary:
Without this patch,
clang -fsanitize=address -xc =(printf 'int main(){}') -o a; ./a => deadlock in __asan_init>AsanInitInternal>AsanTSDInit>...>__getcontextx_size>_rtld_bind>rlock_acquire(rtld_bind_lock, &lockstate)

libexec/rtld-elf/rtld.c
  wlock_acquire(rtld_bind_lock, &lockstate);
  if (obj_main->crt_no_init)
    preinit_main(); // unresolved PLT functions cannot be called here

lib/libthr/thread/thr_rtld.c
  uc_len = __getcontextx_size(); // unresolved PLT function in libthr.so.3

check-xray tests currently rely on .preinit_array so we special case in
xray_init.cc

Subscribers: srhines, kubamracek, krytarowski, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D48806

llvm-svn: 336067
2018-07-01 17:52:41 +00:00
Craig Topper
4d8ec92fb0 [X86][Disassembler] Remove TYPE_BNDR from translateImmediate.
I've check the disassembler tables and this shouldn't be reachable. Which is good since if it was reachable there should have been a 'return' after the addOperand line.

llvm-svn: 336066
2018-07-01 17:50:29 +00:00
Sanjay Patel
279a1a39ad [InstCombine] add abs tests with undef elts; NFC
llvm-svn: 336065
2018-07-01 17:14:37 +00:00
Sanjay Patel
a9fdb9fd37 [PatternMatch] allow undef elements in vectors with m_Neg
This is similar to the m_Not change from D44076.

llvm-svn: 336064
2018-07-01 13:42:57 +00:00
Simon Pilgrim
77d2067677 [SLPVectorizer] Use InstructionsState Op/Alt opcodes directly. NFCI.
llvm-svn: 336063
2018-07-01 13:41:58 +00:00
David Green
963401d2be [UnrollAndJam] New Unroll and Jam pass
This is a simple implementation of the unroll-and-jam classical loop
optimisation.

The basic idea is that we take an outer loop of the form:

  for i..
    ForeBlocks(i)
    for j..
      SubLoopBlocks(i, j)
    AftBlocks(i)

Instead of doing normal inner or outer unrolling, we unroll as follows:

  for i... i+=2
    ForeBlocks(i)
    ForeBlocks(i+1)
    for j..
      SubLoopBlocks(i, j)
      SubLoopBlocks(i+1, j)
    AftBlocks(i)
    AftBlocks(i+1)
  Remainder Loop

So we have unrolled the outer loop, then jammed the two inner loops into
one. This can lead to a simpler inner loop if memory accesses can be shared
between the now jammed loops.

To do this we have to prove that this is all safe, both for the memory
accesses (using dependence analysis) and that ForeBlocks(i+1) can move before
AftBlocks(i) and SubLoopBlocks(i, j).

Differential Revision: https://reviews.llvm.org/D41953

llvm-svn: 336062
2018-07-01 12:47:30 +00:00
Paul Semel
8dabda70af Revert "[llvm-readobj] Fix printing format"
There is a problem with the formatting on windows build.
I need to investigate on this.

llvm-svn: 336061
2018-07-01 11:54:09 +00:00
Simon Pilgrim
84f77ecba9 [SLPVectorizer][X86] Add some alternate tests for cast operators
Alternate opcode handling only supports binary operators, these tests demonstrate missed opportunities to vectorize some sitofp/uitofp and fptosi/fptoui style casts as well as some (successful) float bits manipulations

llvm-svn: 336060
2018-07-01 11:29:46 +00:00
Eugene Leviant
6e4134459b [Evaluator] Improve evaluation of call instruction
Recommit of r335324 after buildbot failure fix

llvm-svn: 336059
2018-07-01 11:02:07 +00:00
Paul Semel
49997adc88 [llvm-readobj] Fix printing format
We were printing every character, even those that weren't printable. It
doesn't really make sense for this option.

The string content was sticked to its address, added two spaces in
between.

Differential Revision: https://reviews.llvm.org/D48271

llvm-svn: 336058
2018-07-01 09:51:59 +00:00
Craig Topper
a2d30b3134 [X86] Remove unnecessary include. NFC
Leftover from when the pass contained a DenseMap before it switched to binary search.

llvm-svn: 336057
2018-07-01 05:54:22 +00:00
Craig Topper
4e78213ae4 [X86] Move the memory unfolding table creation into its own class and make it a ManagedStatic.
Also move the static folding tables, their search functions and the new class into new cpp/h files.

The unfolding table is effectively static data. It's just a different ordering and a subset of the static folding tables.

By putting it in a separate ManagedStatic we ensure we only have one copy instead of one per X86InstrInfo object. This way also makes it only get initialized when really needed.

llvm-svn: 336056
2018-07-01 05:47:49 +00:00
Craig Topper
84199deb17 [X86] Move the X86InstrFMA3Info class into the cpp file. Expose only a getFMA3Group free function. NFCI
The class only exists to hold a DenseMap and is only created as a ManagedStatic. It used to expose a single static method that outside code was expected to use.

This patch moves that static function out of the class and moves it implementation into the cpp file. It can now access the ManagedStatic directly by name without the need for the other static method that accessed the ManagedStatic.

llvm-svn: 336055
2018-06-30 22:38:42 +00:00
Craig Topper
731740744f [X86] Remove the AsmName from the HAX,HDX,HCX,HBX,HSI,HDI,HBP,HSP,HIP artificial registers so they can't be parsed by the assembly parser.
There are no instructions that use them so they weren't causing any bad matches. But they weren't being diagnosed as "invalid register name" if they were used and would instead trigger some form of invalid operand.

llvm-svn: 336054
2018-06-30 22:38:41 +00:00
David Carlier
c33f35ff0f [UBsan] Enable subset of unit tests for OpenBSD
Reviewers: kubamracek, krytarowski

Reviewed By: krytarowski

Differential Revision: https://reviews.llvm.org/D48805

llvm-svn: 336053
2018-06-30 21:35:05 +00:00
Craig Topper
1b7b9b8596 [X86] Use MVT::i8 for scalar shift amounts since that is what they ultimately need to legalize to.
I believe all of these are constants so legalizing them should be pretty trivial, but this saves a step.

In one case it looks like we may have been creating a shift amount larger than the shift input itself.

llvm-svn: 336052
2018-06-30 18:30:31 +00:00
Craig Topper
5f28d50d27 [X86] When combining load to BZHI, make sure we create the shift instruction with an i8 type.
This combine runs pretty late and causes us to introduce a shift after the op legalization phase has run. We need to be sure we create the shift with the proper type for the shift amount. If we don't do this, we will still re-legalize the operation properly, but we won't get a chance to fully optimize the truncate that gets inserted.

So this patch adds the necessary truncate when the shift is created. I've also narrowed the subtract that gets created to always be an i32 type. The truncate would have trigered SimplifyDemandedBits to optimize it anyway. But using a more appropriate VT here is free and saves an optimization step.

llvm-svn: 336051
2018-06-30 17:49:42 +00:00
Sanjay Patel
16a42ca274 [InstCombine] add tests for negate vector with undef elts; NFC
llvm-svn: 336050
2018-06-30 14:11:46 +00:00
Simon Pilgrim
fdca80ddc9 Fix Wdocumentation compiler warning. NFCI.
llvm-svn: 336049
2018-06-30 12:24:23 +00:00
Simon Pilgrim
fae337704e [DAGCombiner] Handle correctly non-splat power of 2 -1 divisor (PR37119)
The combine added in commit 329525 overlooked the case where one, but not all, of the divisor elements is -1, -1 is the only power of two value for which the sdiv expansion recipe breaks.

Thanks to @zvi for the original patch.

Differential Revision: https://reviews.llvm.org/D45806

llvm-svn: 336048
2018-06-30 12:22:55 +00:00
Yaron Keren
14cd1997f1 Add expected fail triple x86_64-pc-windows-gnu to test as x86_64-w64-mingw32 is already there
llvm-svn: 336047
2018-06-30 11:18:44 +00:00
Fangrui Song
da891dc6b4 [asan] Use MADV_NOCORE for use_madv_dontdump on FreeBSD.
Currently in FreeBSD 12.0-CURRENT with trunk clang+compiler-rt, faulty -fsanitize=address executable hangs at 'urdlck' state.

Ka Ho Ng has verified that by backporting this to llvm 6.0.1, with use_madv_dontdump=1, shadow memory is not dumped.

ASAN_OPTIONS=abort_on_error=1:disable_coredump=0:use_madv_dontdump=1 ./a

Reviewers: dimitry, kcc, dvyukov, emaste, khng300

Subscribers: kubamracek, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D48257

llvm-svn: 336046
2018-06-30 08:27:48 +00:00
Craig Topper
50a10ba6e0 [X86] Update some avx512 fast-isel tests to match their real clang IRgen.
Especially of note was the test_mm_mask_set1_epi64 and other set1 tests that were truncating the element to be broadcasted to i8 and broadcasting that instead of a whole 64 bit value.

Some of the others were just correcting mask sizes on parameters due to bugs in the clang test case they were generated from that have now been fixed.

Some were converting i8 to <4 x i1>/<2 x i1> by truncating to i4/i2 and then bitcasting. But the clang codegen is bitcast to <8 x i1>, then extract to <4 x i1>/<2 x i1>. This is likely to incur less trouble from the integer type legalizer in the backend.

llvm-svn: 336045
2018-06-30 07:25:29 +00:00
Craig Topper
db1d7f2b16 [X86] Change some chec-prefixes from X32 to X86 to match the FileCheck command line.
I think this test changed and these test cases were created around the same time and missed the change.

llvm-svn: 336044
2018-06-30 06:45:10 +00:00
Craig Topper
8f6ace5bcd [X86] Remove test cases from avx512vl-intrinsics-fast-isel.ll for intrinsics that don't really exist in clang.
llvm-svn: 336043
2018-06-30 06:45:09 +00:00
Craig Topper
0029470dde [X86] Correct the width of mask arguments in intrinsic headers and tests.
All of these found by grepping through IR from the builtin tests for extra trunc and zext/sext instructions that shouldn't have been there.

Some of these were real bugs where we lost bits from the user input:
_mm512_mask_broadcast_f32x8
_mm512_maskz_broadcast_f32x8
_mm512_mask_broadcast_i32x8
_mm512_maskz_broadcast_i32x8
_mm256_mask_cvtusepi16_storeu_epi8

llvm-svn: 336042
2018-06-30 06:05:17 +00:00
Tom Stellard
eebbfc2809 AMDGPU/GlobalISel: Make IMPLICIT_DEF of all sizes < 512 legal.
Summary:
We could split sizes that are not power of two into smaller sized
G_IMPLICIT_DEF instructions, but this ends up generating
G_MERGE_VALUES instructions which we then have to handle in the instruction
selector.  Since G_IMPLICIT_DEF is really a no-op it's easier just to
keep everything that can fit into a register legal.

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D48777

llvm-svn: 336041
2018-06-30 04:09:44 +00:00
Jessica Paquette
8bda1881ca [MachineOutliner] Add support for target-default outlining.
This adds functionality to the outliner that allows targets to
specify certain functions that should be outlined from by default.

If a target supports default outlining, then it specifies that in
its TargetOptions. In the case that it does, and the user hasn't
specified that they *never* want to outline, the outliner will
be added to the pass pipeline and will run on those default functions.

This is a preliminary patch for turning the outliner on by default
under -Oz for AArch64.

https://reviews.llvm.org/D48776

llvm-svn: 336040
2018-06-30 03:56:03 +00:00
Tom Stellard
345a22d0ba Driver: Add an explicit target to testcase from r336037
llvm-svn: 336039
2018-06-30 03:50:10 +00:00
Tom Stellard
c5fe10f365 Driver: Don't mix system tools with devtoolset tools on RHEL
Summary:
On RHEL, devtoolset provides a more up-to-date toolchain than the base
install, and we want to make sure all the tools use are from the same
toolchain.

Reviewers: rsmith, bruno

Reviewed By: bruno

Subscribers: bruno, cfe-commits

Differential Revision: https://reviews.llvm.org/D34848

llvm-svn: 336037
2018-06-30 02:55:54 +00:00
Craig Topper
0e9de769a0 [X86] Remove masking from the avx512 rotate builtins. Use a select builtin instead.
llvm-svn: 336036
2018-06-30 01:32:14 +00:00
Craig Topper
59f2f38fe0 [X86] Remove masking from avx512 rotate intrinsics. Use select in IR instead.
llvm-svn: 336035
2018-06-30 01:32:04 +00:00
Shoaib Meenai
51d5cc9228 [libc++abi] Look for __config instead of vector
vector is a generic C++ header, whereas __config is libc++-specific, so
we can look for it instead to guarantee we're finding a libc++
installation. This was suggested by Eric in https://reviews.llvm.org/D48694.

This is less important now that we're limiting the header search to the
specified directories (which definitely shouldn't have any other C++
library's headers anyway), but it shouldn't hurt either. There's a
chance some other library could also be providing a __config header, so
there's still a trade-off there. It would be ideal if we could check for
the presence of both __config and vector in the same directory, but
there doesn't seem to be any easy way to do that in CMake.

llvm-svn: 336034
2018-06-30 01:25:47 +00:00
Shoaib Meenai
777ec37659 [libc++abi] Limit libc++ header search to specified paths
Right now, when libc++abi is locating libc++ headers, it specifies
several search locations, but it also doesn't prevent CMake from looking
for those headers in system directories. I don't know if this was
intentional or an oversight, but it has several issues:

* We're looking specifically for the vector header, which could just as
  easily be found in a libstdc++ (or other C++ library) installation.
* No system I know of places their C++ headers directly in system
  include directories (they're always under a C++ subdirectory), so the
  system search will never succeed.
* find_path searches system paths before the user-specified PATHS, so
  if some system does happen to have C++ headers in its system include
  directories, those headers will be preferred, which doesn't seem
  desirable.

It makes sense to me to limit this header search to the explicitly
specified paths (using NO_DEFAULT_PATH, as is done for the other
find_path call in this file), but I'm putting it up for review in case
there's some use case I'm not thinking of.

Differential Revision: https://reviews.llvm.org/D48694

llvm-svn: 336032
2018-06-30 01:04:50 +00:00
Bruno Cardoso Lopes
7dcf23ed83 Add protocol redefinition to the current scope/context
Not doing so causes the AST writter to assert since the decl in question
never gets emitted. This is fine when modules is not used, but otherwise
we need to serialize something other than garbage.

rdar://problem/39844933

Differential Revision: https://reviews.llvm.org/D47297

llvm-svn: 336031
2018-06-30 00:49:27 +00:00
Chandler Carruth
7c557f804d [instsimplify] Move the instsimplify pass to use more obvious file names
and diretory.

Also cleans up all the associated naming to be consistent and removes
the public access to the pass ID which was unused in LLVM.

Also runs clang-format over parts that changed, which generally cleans
up a bunch of formatting.

This is in preparation for doing some internal cleanups to the pass.

Differential Revision: https://reviews.llvm.org/D47352

llvm-svn: 336028
2018-06-29 23:36:03 +00:00
Zachary Turner
d3fe59833f Fix test after S_PROCREF change.
Since the names are being hashed correctly now, enumerating them
returns them in a different order.  Update the test to reflect
that.

llvm-svn: 336027
2018-06-29 22:41:16 +00:00