495344 Commits

Author SHA1 Message Date
Krzysztof Parzyszek
cb994d41c3 Fix build with shared libraries
/usr/bin/ld: CMakeFiles/ClangReplInterpreterTests.dir/InterpreterExtensi
onsTest.cpp.o: undefined reference to symbol '_ZN4llvm14TargetRegistry12
lookupTargetENS_9StringRefERNSt7__cxx1112basic_stringIcSt11char_traitsIc
ESaIcEEE'
/usr/bin/ld: /work/kparzysz/git/llvm.org/b/x86/lib/libLLVMMC.so.19.0git:
 error adding symbols: DSO missing from command line
collect2: error: ld returned 1 exit status

The missing symbol is `llvm::TargetRegistry::lookupTarget`, which
interestingly enough is in MC.

Add `MC` to the list of LLVM dependencies.
2024-03-25 16:51:11 -05:00
Jonas Devlieghere
930f64689c
[lldb] Implement coalescing of disjoint progress events (#84854)
This implements coalescing of progress events using a timeout, as
discussed in the RFC on Discourse [1]. This PR consists of two commits
which, depending on the feedback, I may split up into two PRs. For now,
I think it's easier to review this as a whole.

1. The first commit introduces a new generic `Alarm` class. The class
lets you to schedule a function (callback) to be executed after a given
timeout expires. You can cancel and reset a callback before its
corresponding timeout expires. It achieves this with the help of a
worker thread that sleeps until the next timeout expires. The only
guarantee it provides is that your function is called no sooner than the
requested timeout. Because the callback is called directly from the
worker thread, a long running callback could potentially block the
worker thread. I intentionally kept the implementation as simple as
possible while addressing the needs for the `ProgressManager` use case.
If we want to rely on this somewhere else, we can reassess whether we
need to address those limitations.

2. The second commit uses the Alarm class to coalesce progress events.
To recap the Discourse discussion, when multiple progress events with
the same title execute in close succession, they get broadcast as one to
`eBroadcastBitProgressCategory`. The `ProgressManager` keeps track of
the in-flight progress events and when the refcount hits zero, the Alarm
class is used to schedule broadcasting the event. If a new progress
event comes in before the alarm fires, the alarm is reset (and the
process repeats when the new progress event ends). If no new event comes
in before the timeout expires, the progress event is broadcast.

[1]
https://discourse.llvm.org/t/rfc-improve-lldb-progress-reporting/75717/
2024-03-25 14:50:58 -07:00
Andrei Golubev
bce1703415
[ODS][NFC] Cast range.size() to int32_t in accumulation (#85629)
Using range.size() "as is" means we accumulate 'size_t' values into
'int32_t' variable. This may produce narrowing conversion warnings
(particularly, on MSVC). The surrounding code seems to cast <x>.size()
to 'int32_t' so following this practice seems safe enough.

Co-authored-by: Ovidiu Pintican <ovidiu.pintican@intel.com>
2024-03-25 14:47:39 -07:00
Kazu Hirata
9855134d07
[memprof] Use #ifdef EXPENSIVE_CHECKS (#86585)
This patch replaces:

  #if EXPENSIVE_CHECKS

with:

  #ifdef EXPENSIVE_CHECKS

to follow the existing conventions.
2024-03-25 14:36:03 -07:00
Eric
1880e41a4c
Fix the OSS fuzz build. (#86562)
The OSS fuzz build has been broken for a while because of changes
to the cmake configuration. This patch fixes the issues by defaulting to
libunwind as the default runtime
2024-03-25 17:34:43 -04:00
Craig Topper
d19d8e05b3 [RISCV] Remove unused Constraint template parameter from RISCVInstrInfoZvk.td. NFC 2024-03-25 14:34:05 -07:00
Cyndy Ishida
487720fc13
Reapply "[InstallAPI] Add --extra* and --exclude* cli options for header input (#86522)" (#86574) 2024-03-25 17:32:21 -04:00
Chris B
7c8f754456
Fix failing tests after #86242 (#86572)
PR #86242 introduced a copy-paste error that caused some tests to fail
by mapping the wrong pass name to a pass. This resolves the issue and
fixes the failing tests.
2024-03-25 16:23:23 -05:00
Kazu Hirata
6646fe884c
[memprof] Compute CallStackId when deserializing IndexedAllocationInfo (#86421)
There are two ways to create in-memory instances of
IndexedAllocationInfo -- deserialization of the raw MemProf data and
that of the indexed MemProf data.

With:

  commit 74799f424063a2d751e0f9ea698db1f4efd0d8b2
  Author: Kazu Hirata <kazu@google.com>
  Date:   Sat Mar 23 19:50:15 2024 -0700

we compute CallStackId for each call stack in IndexedAllocationInfo
while deserializing the raw MemProf data.

This patch does the same while deserilizing the indexed MemProf data.

As with the patch above, this patch does not add any use of
CallStackId yet.
2024-03-25 14:21:49 -07:00
Cyndy Ishida
a9d8bf41bf [InstallAPI] Silence unused variable warning, NFC 2024-03-25 17:20:24 -04:00
Justin Fargnoli
36713a47c8
[utils] Use Python3 for bisect-skip-count (#84979) 2024-03-25 14:09:25 -07:00
Balaji V. Iyer
5f1f9cfaa4
[mlir][Vector] Fix an assertion on failing cast in vector-transfer-flatten-patterns (#86030)
When the result is not a vectorType, there is an assert. This patch will
do the check and bail when the result is not a VectorType.
2024-03-25 16:05:09 -05:00
Shilei Tian
0a4299403e
[GlobalISel] Fold G_CTTZ if possible (#86224)
This patch tries to fold `G_CTTZ` if possible.
2024-03-25 16:55:37 -04:00
Craig Topper
0fe0ef4d7f [RISCV] Remove unused tablegen class. NFC 2024-03-25 13:40:26 -07:00
Philip Reames
07ee9bd215 [RISCV] Add fixed vector coverage for sum-absolute-difference (sad) pattern
This builds on the previously added absolute difference cases, and adds
the reduction at the end.  This is mostly interesting for examining
impact of extend placement when changing the abdu lowering.
2024-03-25 13:27:09 -07:00
Philip Reames
4b941ff4b4 [RISCV] Add coverage for abdu and abds (absolute difference)
Test copied from aarch64 with minimal adaption.  We likely need addition
coverage, but this is a reasonable starting point.
2024-03-25 13:27:09 -07:00
Joseph Huber
2cad43c1ba
[Libomptarget] Factor functions out of 'Plugin' interface (#86528)
Summary:
This patch factors common functions out of the `Plugin` interface prior
to its removal in a future patch. This simply temporarily renames it to
`PluginTy` so that we could re-use `Plugin::check` internally as this
needs to be defined statically per plugin now. We can refactor this
later.

The future patch will delete `PluginTy` and `PluginTy::get` entirely.
This simply tries to minimize a few changes to make it easier to land.
2024-03-25 15:24:39 -05:00
Jeffrey Byrnes
b761137049
[AMDGPU] Use correct VGPR threshold for flagging ExcessRP regions in unified register file case (#85860)
`ST.getMaxNumVGPRs(MF)` lowers to `AMDGPUBaseInfo.cpp:getTotalNumVGPRs`
which returns 512 for gfx90a. This is subsequently limited by
`AMDGPUBaseInfo:getAddressableNumVGPRs()`, which also returns 512 for
gfx90a. The ISA states we can have a total of 512 registers, but a
maximum of only 256 of each of AGPR and VGPR (gfx90a 3.6.4).

Therefore, in unified register file case, `ST.getMaxNumVGPRs(MF)`
calculates the maximum number of combined VGPR + AGPR. But, it is
currently used as the limit for accvgpr and as the limit for archvgpr.

This patch uses it as the combined limit, and accounts for the maximum addressable arch/acc VGPRs when calculating the per RegClass limits.

It is not unreasonable to think other clients of getTotalNumVGPRs are
using it in the wrong way.
2024-03-25 13:11:58 -07:00
Christian Sigg
cce18e40c0
[bazel] Fix BUILD after 2eb010ddce2a8e7813a8e289004102011b1138db. 2024-03-25 20:57:22 +01:00
Cyndy Ishida
2d7df3167b Revert "[InstallAPI] Add --extra* and --exclude* cli options for header input (#86522)"
This reverts commit b7d8c6188986f62573b9516fe27fdd0c7df1aaf9. And
This reverts commit 2d40f179124f874aca4cf1145fdbc42fb8fb17f3.

It caused a build failure i'll need to reproduce.
` error: could not convert ‘Rule’ from ‘llvm::Regex’ to ‘llvm::Expected<llvm::Regex>’`
2024-03-25 15:50:46 -04:00
Craig Topper
6ee39fb4c1 [RISCV] Remove unused forceMergeOpRead from SchedTernary class. NFC
Ternary operations cannot have a merge op in addition to their 3 sources
so there is no need for this option.
2024-03-25 12:50:05 -07:00
Keith Smiley
2eb010ddce
[bazel] Restrict libpfm to linux (#86565)
This target doesn't build on macOS (even with the upstream make based
build system) so this encodes that in the build without requiring
non-linux users to disable it manually with the starlark flag. The flag
is still respected for linux users.
2024-03-25 12:47:16 -07:00
Keith Smiley
540bbe15e6
[bazel] Add td_library target for OptParser.td (#86363)
This allows downstream consumers to depend on this file. Without this
target the include paths to this are mangled by bazel.
2024-03-25 12:47:01 -07:00
Cyndy Ishida
b7d8c61889 [TextAPI] Add missing include for Expected type 2024-03-25 15:45:25 -04:00
Keith Smiley
f530eee448
[bazel] Fix minor buildifier warnings (NFC) (#86566) 2024-03-25 12:44:58 -07:00
Craig Topper
25bcdab478 [RISCV] Fix indentation and 80 columns in RISCVInstrInfoZvk.td. NFC
I didn't fix all the 80 column errors just the ones in template
arguments.
2024-03-25 12:42:07 -07:00
Cyndy Ishida
2d40f17912
[InstallAPI] Add --extra* and --exclude* cli options for header input (#86522)
InstallAPI takes a json list of headers that is typically generated from
a build system like Xcode based on a project's attributes. Sometimes,
maintainers may want to alter this for tapi input. Using e.g.
`--extra-public-headers`, users can manipulate what headers will be used
for TBD file generation.
2024-03-25 15:38:27 -04:00
Job Henandez Lara
3e3f0c3175
[libc][math][c23] add c23 floating point fmaximum and fminimum functions. (#86016)
Fixes https://github.com/llvm/llvm-project/issues/85496.

---------

Co-authored-by: Job Hernandez <h93@protonmail.com>
2024-03-25 15:19:10 -04:00
Valentin Clement (バレンタイン クレメン)
4e6745cc4d
[flang][cuda] Lower simple host to device data transfer (#85960)
In CUDA Fortran data transfer can be done via assignment statements
between host and device variables.

This patch introduces a `fir.cuda_data_transfer` operation that
materialized the data transfer between two memory references.

Simple transfer not involving descriptors from host to device are also
lowered in this patch. When the rhs is an expression that required an
evaluation, a temporary is created. The evaluation is done on the host
and then the transfer is initiated.

Implicit transfer when device symbol are present on the rhs is not part
of this patch. Transfer from device to host is not part of this patch.
2024-03-25 11:53:39 -07:00
Michael Maitland
8b9c3b57b1 Revert "[RISCV][GISEL] Add instruction select tests for G_VSCALE"
This reverts commit c00a5ab8c4be14f63735ec61c5c9245c233cbcfc. It is not
consistent with SelectionDAG.
2024-03-25 11:50:57 -07:00
Michael Maitland
668687f8a8 Revert "[RISCV][GISEL] Add regbankselect tests for G_VSCALE"
This reverts commit a2476c99b745381380eab245fc9499a4ecf0b39e. It is not
consistent with SelectionDAG
2024-03-25 11:50:21 -07:00
Michael Maitland
9056ce8804 Revert "[RISCV][GISEL] Legalize G_VSCALE"
This reverts commit 47681506ded30fada68f180b5e80f740bc76abcd. It is not
consistent with SelectionDAG.
2024-03-25 11:46:02 -07:00
Justin Bogner
6ac54105ad
[DirectX] disable experimental debuginfo iterators in debug-info test (#86538)
We'll need to address this differently long term, but for now just
revert to the old behaviour to keep this test from failing.

Fixes #85884
2024-03-25 11:42:09 -07:00
Vitaly Buka
c8d70e94c4
[LangRef] Fix spelling mistakes (#86013) 2024-03-25 11:24:44 -07:00
Daniil Kovalev
bc547028dc
[llvm-readobj,test] Test R_AARCH64_AUTH_{ABS64,RELATIVE} (#86511)
Add missing tests for AUTH relocs defined in #74874
2024-03-25 21:23:28 +03:00
Simon Pilgrim
3dcf62b5ee [X86] HSW/BDW - vector splat shifts don't use Port5 when loading the shift amount
Noticed while trying to compare splat vs per-element shift perf stats for #39424

Confirmed with uops.info
2024-03-25 18:22:29 +00:00
Aaron Ballman
edfa97a8fb [C99] Claim conformance to "new block scopes for selection and iteration statements"
I was unable to definitively locate a document number for this, but it
is potentially WG14 N759 based on the description in the C99 rationale
document.

We do implement the C89 and C99 scope rules for iteration and selection
statements, so claiming conformance here.
2024-03-25 14:20:45 -04:00
Craig Topper
ce37a7131f
[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison. (#84693)
Integer RISCVISD::SELECT_CC doesn't create poison. If none of the,
operands are poison, the result is not poison.

This allows ISD::FREEZE to be hoisted above RISCVISD::SELECT_CC.
2024-03-25 11:10:58 -07:00
Mark de Wever
3cf169ca16
[libc++][CI] Updates the documentation. (#85264)
The documentation mentions manually pushing Docker images to the CI. The
preferred way is to use the proper GitHub action. This updates the
documentation.

---------

Co-authored-by: Will Hawkins <whh8b@obs.cr>
2024-03-25 18:53:55 +01:00
Aaron Ballman
32466e55b1 Add a triple to this test
Amends d99cfa053998483e7283e91ff204fbe117345685

This should address a failure found by post commit CI:
https://lab.llvm.org/buildbot/#/builders/245/builds/22321
2024-03-25 13:50:10 -04:00
Michael Maitland
3305f5a980 [RISCV][GISEL] Check for legal element count in typeIsLegalBoolVec
https://github.com/llvm/llvm-project/pull/84553 added
typeIsLegalBoolVec but it was missing a check for minimum element count.
This patch adds that.
2024-03-25 10:49:41 -07:00
Aaron Ballman
bd4086f046 [C99] Claim conformance to "additional predefined macro names"
This feature is listed in the C99 front matter as one of the changes to
C99, but there was no associated document with that title (or anything
close to it).

I eventually tracked this down to a new requirement in C99 that
implementations defining their own pedefined macros should not name
them with a __STDC_ prefix. Clang does not do this, but there's no
tests that would demonstrate we properly "implement" this feature. So
claiming full conformance without additional test coverage.
2024-03-25 13:47:46 -04:00
Nico Weber
6187f271d1 [gn] port fa3d789df15b more (tblgen restructure)
I had missed that both tblgens still both need a bunch of identical
cpp files. Let's just reintroduce the source_set() for them, even
though the CMake build removed the object library for them in favor
of duplicating the file list for some reason.
2024-03-25 13:46:46 -04:00
Michael Maitland
c00a5ab8c4 [RISCV][GISEL] Add instruction select tests for G_VSCALE 2024-03-25 10:44:59 -07:00
Michael Maitland
a2476c99b7 [RISCV][GISEL] Add regbankselect tests for G_VSCALE 2024-03-25 10:44:59 -07:00
Michael Maitland
47681506de [RISCV][GISEL] Legalize G_VSCALE
G_VSCALE should be lowered using VLENB.
2024-03-25 10:44:58 -07:00
Schrodinger ZHU Yifan
05dc5d927b
[libc] add statvfs/fstatvfs (#86169)
fixes #86449
2024-03-25 13:37:50 -04:00
Michael Maitland
05840c8714 [RISCV][GISEL] Instruction select for scalable G_SELECT
SelectionDAG has SELECT and VSELECT

SELECT restricts the condition operand to an i1 and the true and false operands
can be vectors. The result of a SELECT has the same type as the true and
false operands.

VSELECT has a vector condition operand and the true and false operands
must be vectors. The result of a VSELECT has a vector result.

GlobalISel has G_SELECT which has condition operand that is an i1 if the
true and false operands are scalar and a vector type with i1 elements if
the true and false operands are vector.

A G_SELECT acts like a ISD::SELECT when the operands are all scalar, and
an ISD::VSELECT when the operands are are scalar. A G_SELECT cannot act
like a ISD::SELECT with an i1 condition and vector operands because the
type system.

In this patch, we would like to take advantage of the patterns written
for SELECT and VSELECT, so we mark G_SELECT equivalent to both SELECT
and VSELECT to reuse the patterns. Since we cannot write a `G_SELECT (s1),
(vector-ty), (vector-ty)`, we don't have to worry about accidently
matching the SDAG patterns of that nature.

We will probably need a way to represent an i1 condition with vector
true and false operands in the future. That can be the topic of another
patch.
2024-03-25 10:35:22 -07:00
Michael Maitland
973e9dbd57 [RISCV][GISEL] Regbank select for scalable G_SELECT 2024-03-25 10:35:21 -07:00
Michael Maitland
8c51ac9ddb [RISCV][GISEL] Legalize G_SELECT for scalable vectors 2024-03-25 10:35:21 -07:00