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Author SHA1 Message Date
Reid Spencer
ef599b0786 Implement isMaxValueMinusOne in terms of APInt instead of uint64_t. 
Patch by Sheng Zhou.

llvm-svn: 35188
 2007-03-19 21:10:28 +00:00
Reid Spencer
3b93db72b4 Implement isMinValuePlusOne using facilities of APInt instead of uint64_t 
Patch by Zhou Sheng.

llvm-svn: 35187
 2007-03-19 21:08:07 +00:00
Reid Spencer
129a86792d Implement isOneBitSet in terms of APInt::countPopulation. 
llvm-svn: 35186
 2007-03-19 21:04:43 +00:00
Reid Spencer
450434ed65 1. Use APInt::getSignBit to reduce clutter (patch by Sheng Zhou) 
2. Replace uses of the "isPositive" utility function with APInt::isPositive

llvm-svn: 35185
 2007-03-19 20:58:18 +00:00
Reid Spencer
03c31d5bb0 Remove a redundant clause in an if statement. 
Patch by Sheng Zhou.

llvm-svn: 35184
 2007-03-19 20:47:50 +00:00
Reid Spencer
a7bed60ab3 Regenerate. 
llvm-svn: 35183
 2007-03-19 20:40:51 +00:00
Reid Spencer
363fd46199 Fix test/Assembler/2007-03-19-NegValue.ll by using the new "isSigned" 
parameter on ConstantInt::get to indicate the signedness of the intended
value.

llvm-svn: 35182
 2007-03-19 20:40:22 +00:00
Reid Spencer
362fb29d80 Allow ConstantInt::get(Ty, uint64_t) to interpret the 64-bit values as a 
negative number. This is needed to fix test/Assembler/2007-03-19-NegValue.ll

llvm-svn: 35181
 2007-03-19 20:39:08 +00:00
Reid Spencer
6fae35acd3 Implement extension of sign bits for negative values in the uint64_t 
constructor. This helps to fix test/Assembler/2007-03-19-NegValue.ll

llvm-svn: 35180
 2007-03-19 20:37:47 +00:00
Reid Spencer
568b8b54dc Add an indication of signedness to the uint64_t constructor so sign bits 
can be extended. This helps fix test/Assembler/2007-03-19-NegValue.ll

llvm-svn: 35179
 2007-03-19 20:36:48 +00:00
Reid Spencer
732f0a838e Test case noticed by Sheng that fails because negative values that are 
greater than 64-bits don't have the sign bits extended on construction of
the APInt.

llvm-svn: 35178
 2007-03-19 20:35:26 +00:00
Anton Korobeynikov
2946e07557 Fix mingw32 build 
llvm-svn: 35177
 2007-03-19 20:19:08 +00:00
Duncan Sands
cbf49a803c Test handling of ARRAY_REF when the component type is of unknown size. 
llvm-svn: 35176
 2007-03-19 19:56:18 +00:00
Reid Spencer
37f629a953 For PR1258: 
Test that invalid numbered value references get an error message.

llvm-svn: 35175
 2007-03-19 18:41:37 +00:00
Reid Spencer
d0e8d382db Regenerate. 
llvm-svn: 35174
 2007-03-19 18:40:50 +00:00
Reid Spencer
fe65ae88fe For PR1248: 
Eliminate support for type planes in numbered values. This simplifies the
data structures involved in managing forward definitions, etc. Instead of
requiring maps from type to value, we can now just use a vector of values.
These changes also required rewrites of some support functions such as
InsertValue, getBBVal, and ResolveDefinitions. Some other cosmetic changes
were made as well.

llvm-svn: 35173
 2007-03-19 18:39:36 +00:00
Reid Spencer
49bd921f08 Add and Operator== method to ValID so equality can be done properly for 
named or numbered ValIDs.

llvm-svn: 35172
 2007-03-19 18:34:28 +00:00
Reid Spencer
508167861d For PR1258: 
Radically simplify the SlotMachine. There is no need to keep Value planes
around any more. This change causes slot numbering to number all un-named,
non-void values starting at 0 and incrementing monotonically through the
function, regardless of type (including BasicBlocks). Getting slot numbers
is now a single lookup operation instead of a double lookup.

llvm-svn: 35171
 2007-03-19 18:32:53 +00:00
Reid Spencer
7953b683fc For PR1258: 
Revise numeric value references to accommodate collapsed type planes.

llvm-svn: 35170
 2007-03-19 18:27:35 +00:00
Chris Lattner
9c62db7c8c fix ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll 
llvm-svn: 35169
 2007-03-19 18:25:57 +00:00
Reid Spencer
175296cd1b Use opt instead of gccas. 
llvm-svn: 35168
 2007-03-19 18:25:55 +00:00
Chris Lattner
50fce05a21 add a testcase the resent patches fail on. 
llvm-svn: 35167
 2007-03-19 18:25:48 +00:00
Reid Spencer
104b47041a Don't upgrade these. 
llvm-svn: 35166
 2007-03-19 18:08:42 +00:00
Evan Cheng
25d00d545d Remove -reduce-joining-phys-regs options. Make it on by default. 
llvm-svn: 35165
 2007-03-19 18:08:26 +00:00
Duncan Sands
5a040c510b Fix obvious typo in comment. 
llvm-svn: 35164
 2007-03-19 14:25:02 +00:00
Evan Cheng
9bb01c9f4f Fix naming inconsistencies. 
llvm-svn: 35163
 2007-03-19 07:48:02 +00:00
Evan Cheng
ee2763f76f Special LDR instructions to load from non-pc-relative constantpools. These are 
rematerializable. Only used for constant generation for now.

llvm-svn: 35162
 2007-03-19 07:20:03 +00:00
Evan Cheng
5be3e09a30 Constant generation instructions are re-materializable. 
llvm-svn: 35161
 2007-03-19 07:09:02 +00:00
Evan Cheng
461c964d3d Added isReMaterializable. 
llvm-svn: 35160
 2007-03-19 06:22:07 +00:00
Evan Cheng
9d7d130835 Recognize target instruction flag 'isReMaterializable'. 
llvm-svn: 35159
 2007-03-19 06:20:37 +00:00
Evan Cheng
0420161130 Add a TargetInstrDescriptor flag to mark an instruction as "re-materializable". 
It means the instruction can be easily re-materialized at any point. e.g.
constant generation, load from constantpool.

llvm-svn: 35158
 2007-03-19 06:19:16 +00:00
Zhou Sheng
f89ea5068f Add isStrictPositive() to APInt to determine if this APInt Value > 0. 
llvm-svn: 35156
 2007-03-19 05:22:18 +00:00
Evan Cheng
c5e74f6404 Minor bug fix. 
llvm-svn: 35153
 2007-03-19 04:22:35 +00:00
Chris Lattner
f01f87bc63 fix a warning 
llvm-svn: 35152
 2007-03-19 00:39:32 +00:00
Chris Lattner
23dd31a3af add PR# 
llvm-svn: 35151
 2007-03-19 00:17:19 +00:00
Chris Lattner
877a3b424d implement the next chunk of SROA with memset/memcpy's of aggregates. This 
implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll

llvm-svn: 35150
 2007-03-19 00:16:43 +00:00
Chris Lattner
dcd44dbbb0 add pr# 
llvm-svn: 35149
 2007-03-19 00:15:43 +00:00
Chris Lattner
ee3c5d1b78 new testcase 
llvm-svn: 35148
 2007-03-19 00:11:30 +00:00
Chris Lattner
2c0f36bc39 testcase for SROA with memset etc 
llvm-svn: 35147
 2007-03-19 00:09:00 +00:00
Nick Lewycky
db204ecfbc Clean up this code and fix subtract miscompile. 
llvm-svn: 35146
 2007-03-18 22:58:46 +00:00
Chris Lattner
0741842b3b Implement InstCombine/and-xor-merge.ll:test[12]. 
Rearrange some code to simplify it now that shifts are binops

llvm-svn: 35145
 2007-03-18 22:51:34 +00:00
Chris Lattner
1ada0693ab new testcase 
llvm-svn: 35144
 2007-03-18 22:50:57 +00:00
Chris Lattner
9b3e2b4ad9 minor updates 
llvm-svn: 35143
 2007-03-18 22:41:33 +00:00
Nick Lewycky
f764441977 This is implemented. We now generate: 
entry:
        icmp ugt i32 %x, 4              ; <i1>:0 [#uses=1]
        br i1 %0, label %cond_true, label %cond_false

cond_true:              ; preds = %entry
        %tmp1 = tail call i32 (...)* @bar( i32 12 )             ; <i32> [#uses=0]
        ret void

cond_false:             ; preds = %entry
        switch i32 %x, label %cond_true15 [
                 i32 4, label %cond_true3
                 i32 3, label %cond_true7
                 i32 2, label %cond_true11
                 i32 0, label %cond_false17
        ]

...

llvm-svn: 35142
 2007-03-18 14:37:20 +00:00
Evan Cheng
d8f2e4fe4c - Merge UsedBlocks info after two virtual registers are coalesced. 
- Use distance to closest use to determine whether to abort coalescing.

llvm-svn: 35141
 2007-03-18 09:05:55 +00:00
Evan Cheng
5382426577 Keep UsedBlocks info accurate. 
llvm-svn: 35140
 2007-03-18 09:02:31 +00:00
Evan Cheng
fd43be8532 Fix comment. 
llvm-svn: 35139
 2007-03-18 03:26:04 +00:00
Nick Lewycky
17d20fd41e Propagate ValueRanges across equality. 
Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0.

llvm-svn: 35138
 2007-03-18 01:09:32 +00:00
Anton Korobeynikov
22f436da42 Silence warning 
llvm-svn: 35137
 2007-03-17 14:48:06 +00:00
Evan Cheng
f6f043332f Track the BB's where each virtual register is used. 
llvm-svn: 35135
 2007-03-17 09:29:54 +00:00