563289 Commits

Author SHA1 Message Date
Teresa Johnson
fd402bb2df
[MemProf] Fix callee guid for non-leaf frame (#172502)
When matching callsite profile info, we synthesize VP metadata for
matched indirect calls from the CalleeGuids recorded with the CallSite
profile info. However, those are the callee guids of the leaf-most frame
in the callsite. In cases where we match to a portion of the frames, not
including the leaf, the callee guid should instead be synthesized from
the next leaf-most frame in the list.

This addresses the case where indirect call promotion was applied in the
profiled binary during SamplePGO matching in a ThinLTO backend, where we
didn't have VP metadata.
2025-12-19 08:24:59 -08:00
hev
99d63c64f8
[LoongArch] Fix assertion when combining SETCC with wide constants (#172975)
Fixes #172964
2025-12-20 00:21:17 +08:00
Babak
ba55ef32ef
[mlir][IR] Fix RewriterBase::replaceUsesWithIf(ValueRange) in dialect conversion (#172883)
`ConversionPatternRewriter::replaceUsesWithIf` does not support the
`allUsesReplaced` flag and asserts that it's not set. However the
`ValueRange` overload of `RewriterBase::replaceUsesWithIf` always passes
this flag when calling the virtual overload of `replaceUsesWithIf`. This
means calls made to `RewriterBase::replaceUsesWithIf` from a
`ConversionPattern` crash, whether the `allUsesReplaced` flag is set or
not.

This change tweaks `RewriterBase::replaceUsesWithIf` to only pass that
flag if the callee has set it.
2025-12-19 17:19:37 +01:00
Maksim Levental
35e068cbd1
[MLIR] fix name of APFloat helper (#173029)
Some downstreams depend on our libraries having the uniform prefix.
2025-12-19 16:13:29 +00:00
陈子昂
00e6eca227
[AArch64] Fix assertion failure during promotion of EXTEND_VECTOR_INREG. (#171619)
This fixes an assertion failure in `SelectionDAG::getNode` on AArch64
during Type Legalization.

The crash is triggered by an `ANY_EXTEND_VECTOR_INREG` operation
involving small vector types (e.g., v16i1).

The crash occurs when the Type Legalizer processes a vector extend
operation where the input vector uses small elements, specifically in
the case of a ShuffleVector that generates a mask vector.

1. **Original Node**: `any_extend_vector_inreg (v16i1) -> v2i16`. (This
is physically valid: 16 bits < 32 bits).
2. **Promotion Issue**: When both the input and result types are
promoted for legality:
* The **Result** (`v2i16`) is promoted to a larger legal type, e.g.,
`v2i32` (**64 bits**).
* The **Input** (`v16i1`) is promoted to `v16i8` (**128 bits**) due to
the necessary scalar promotion of `i1` to `i8`.
3. The legalizer then attempts to create the new node:
`any_extend_vector_inreg (v16i8) -> v2i32`.
4. Since $128 \text{ bits} > 64 \text{ bits}$, the physical constraint
of the `EXTEND_VECTOR_INREG` operation is violated, causing the
assertion to fail.

### Solution

In `DAGTypeLegalizer::PromoteIntRes_EXTEND_VECTOR_INREG`, when the size
of the promoted input vector (`Promoted`) is found to be greater than
the size of the promoted result vector (`NVT`):

We explicitly truncates the promoted input to the size of the result
type (`NVT`), ensuring the final `*_EXTEND_VECTOR_INREG` node satisfies
the size constraint before it is created.

This behavior aligns with the fact that `*_EXTEND_VECTOR_INREG`
typically only requires the low-order lanes of the input vector.

**Test Added**: `llvm/test/CodeGen/AArch64/issue-171032.ll`

Fixes: #171032
2025-12-19 17:05:35 +01:00
Nikita Popov
4fbbdb4f6b
[lld] Adjust compressed-debug-level test for s390x with DFLTCC (#172972)
After enabling DFLTCC in zlib-ng for s390x this test starts failing,
because slightly better compression is produced at level 1. Add 1c as a
permissible output.
2025-12-19 17:02:24 +01:00
Joshua Rodriguez
ed4e7d92e4
[AArch64][GlobalISel] Add support for neon right shifts (#170832)
Many neon right shift intrinsics were not supported by GlobalISel, mainly due to a lack of legalisation logic. This logic has now been implemented.

Some intrinsics involving a narrow lower to two separate GI nodes, which may then be re-combined later into a single assembly instruction.
2025-12-19 16:01:25 +00:00
Nikita Popov
0809a9927d [LSR] Add another test case for implicit truncation (NFC)
From https://github.com/llvm/llvm-project/pull/171456#issuecomment-3675488354.
2025-12-19 16:34:17 +01:00
Shafik Yaghmour
33c85e9a1b
[NFC][Clang] Apply Rule of Three to BuildLockset (#172908)
Static analysis flagged BuildLockset as not following the Rule of Three,
so I just added deleted copy ctor and copy assignment.
2025-12-19 07:31:03 -08:00
yronglin
d2e62d9024
[C++20][Modules] Implement P1857R3 Modules Dependency Discovery (#107168)
This PR implement the following papers:
[P1857R3 Modules Dependency Discovery](https://wg21.link/p1857r3).
[P3034R1 Module Declarations Shouldn’t be
Macros](https://wg21.link/P3034R1).
[CWG2947](https://cplusplus.github.io/CWG/issues/2947.html).

At the start of phase 4 an import or module token is treated as starting
a directive and are converted to their respective keywords iff:

 - After skipping horizontal whitespace are
    - at the start of a logical line, or
    - preceded by an export at the start of the logical line.
- Are followed by an identifier pp token (before macro expansion), or
    - <, ", or : (but not ::) pp tokens for import, or
    - ; for module
Otherwise the token is treated as an identifier.

Additionally:

- The entire import or module directive (including the closing ;) must
be on a single logical line and for module must not come from an
#include.
- The expansion of macros must not result in an import or module
directive introducer that was not there prior to macro expansion.
- A module directive may only appear as the first preprocessing tokens
in a file (excluding the global module fragment.)
- Preprocessor conditionals shall not span a module declaration.

After this patch, we handle C++ module-import and module-declaration as
a real pp-directive in preprocessor. Additionally, we refactor module
name lexing, remove the complex state machine and read full module name
during module/import directive handling. Possibly we can introduce a
tok::annot_module_name token in the future, avoid duplicatly parsing
module name in both preprocessor and parser, but it's makes error
recovery much diffcult(eg. import a; import b; in same line).

This patch also introduce 2 new keyword `__preprocessed_module` and
`__preprocessed_import`. These 2 keyword was generated during `-E` mode.
This is useful to avoid confusion with `module` and `import` keyword in
preprocessed output:
```cpp
export module m;
struct import {};
#define EMPTY
EMPTY import foo;
```

Fixes https://github.com/llvm/llvm-project/issues/54047

---------

Signed-off-by: yronglin <yronglin777@gmail.com>
Signed-off-by: Wang, Yihan <yronglin777@gmail.com>
2025-12-19 23:29:17 +08:00
Krzysztof Parzyszek
469e524598
[OpenMP] Restore alphabetical order to clause definitions, NFC (#173008) 2025-12-19 09:13:53 -06:00
Jeremy Kun
197704a636
[mlir][Presburger] make IntegerRelation::iterVarKind const (#172958)
`iterVarKind` is effectively const but not marked as such.

Co-authored-by: Jeremy Kun <j2kun@users.noreply.github.com>
2025-12-19 07:08:14 -08:00
Jacques Pienaar
d1fe3be429
[mlir][bytecode] Add support for deferred attribute/type parsing (#172901)
Add ability to defer parsing and re-enqueueing oneself. This enables
changing CallSiteLoc parsing to not recurse as deeply: previously this
could fail (especially on large inputs in debug mode the recursion could
overflow). Add a default depth cutoff, this could be a parameter later
if needed.

Roll-forward of #170993 with relatively direct change such that if
processing while not resolving/when parsing property it eagerly
resolves.
2025-12-19 17:03:01 +02:00
Michael Buch
15a63d4e32
[llvm][ADT] Add llvm::StringRef::consume_front(char) overload (#172832)
This patch adds support for consuming a `char` from the front of a
`StringRef`. Most of the time a user wanting to consume a single
character off the front can just wrap the character in a string literal
(i.e., `consume_front("a")`). But this doesn't work if we don't have a
`char` literal, but instead a variable of type `char`. I.e., `char c =
'a'; str.consume_front(c)`. There's at least one helper in LLDB that
does this. Also there's plenty of example of `consume_front` being
passed a single character via string literal. This patch adds the `char`
overload. We already have a `starts_with(char)` overload, so there's at
least some related precedent.
2025-12-19 14:58:24 +00:00
Anatoly Trosinenko
038dca1b11
[AArch64][PAC] Factor out printing real AUT/PAC/BLRA encodings (NFC) (#160901)
Separate the low-level emission of the appropriate variants of `AUT*`,
`PAC*` and `B(L)RA*` instructions from the high-level logic of pseudo
instruction expansion.

Introduce `getBranchOpcodeForKey` helper function by analogy to
`get(AUT|PAC)OpcodeForKey`.
2025-12-19 17:23:52 +03:00
R
d1eed8d144
[X86] Check displacement range for Intel syntax too (#172956)
Previously, while gas syntax had checks for offsets which do not fit
within 32 bits, Intel syntax did not and would silently truncate without
warning.

Apply the same checks in both modes.
2025-12-19 14:17:46 +00:00
Aleksei Nurmukhametov
326c647053
[mlir][math] Propagate fast math attrs in AlgebraicSimplification (#166802)
Fix missing propagation of fast-math flags in algebraic simplification
patterns of the MLIR math dialect.
2025-12-19 09:12:52 -05:00
nerix
50001bb4de
[LLDB] Run MSVC STL unordered tests with PDB (#172731)
The unordered containers re-use the formatters for `std::list` which
were fixed for PDB with #166953.

This should be the last fix for PDB in MSVC STL tests. Unfortunately,
the type names here are very long, because the types of keys/values are
repeated in the template (for hash/eq/allocator).
2025-12-19 15:09:19 +01:00
Alex MacLean
61c6724bbd
[NVPTX] Add missing type suffixes for barrier.cta.red (#172945) 2025-12-19 05:53:49 -08:00
Hansang Bae
b037451654
[Offload] Make sure error is consumed (#172924) 2025-12-19 07:50:49 -06:00
Anatoly Trosinenko
e73fe7b7fe
[AArch64][PAC] Refactor discriminator emission in AsmPrinter (NFC) (#160900)
Refactor the discriminator emission in `AArch64AsmPrinter`:
* factor out ad-hoc "X16 or X17 or not isX16X17Safer" checks into a
  dedicated `isPtrauthRegSafe` function
* assert that `Disc` is uint16 once in `emitPtrauthDiscriminator`
  instead of in all its callers
* update the comments and assertions for readability
* rename `MayUseAddrAsScratch` argument to `MayClobberAddrDisc`, as it
  better reflects the intention
2025-12-19 16:28:05 +03:00
R
2cdb88698d
[X86] Convert mov moffs64 to movabs automatically (#172954)
Opcodes 0xA0-0xA3 can access a 64-bit absolute address. Before this
change, LLVM would require this to be written as `movabs`, and writing
it as `mov` would silently truncate the address.

After this change, if `mov moffset` is used with a constant expression
which evaluates to a value that doesn't fit in 32 bits, the instruction
will automatically be changed to `movabs`. This should match the
behavior of more recent versions of gas.

The one existing test which expected a silent truncation + sign-extend
is removed.

This change does not affect `mov` opcodes that reference an external
symbol. Using `mov` will continue to generate a 32-bit address and
reloc_signed_4byte, and `movabs` is required to specify a 64-bit
address.

Fixes #73481
2025-12-19 13:27:54 +00:00
Sjoerd Meijer
ca78b6ed21
[LoopInterchange] Add loop names to debug messages. NFC (#172855)
The debug messages are difficult to follow, because it is not printing
which loops it is dealing with. This adds loop names to various debug
messages so it's easier to see which loops it is accepting, rejecting,
etc.
2025-12-19 13:17:58 +00:00
Simon Pilgrim
0d586e4eaf
[X86] combineConcatVectorOps - add handling for FNEG vector ops (#172996) 2025-12-19 13:00:08 +00:00
Simi Pallipurath
e4169e7bc1
[Clang][Driver] Fix the missing Target-Triple-Level include path resolution in Baremetal Driver (#165321)
The current baremetal driver implementation does not have a way to
derive the target-triple-level include path within the sysroot.

This feature is especially useful in setups where header paths deviate
from the default bare-metal assumptions. For example, when headers are
shared across target triples, it becomes necessary to organise them
under target-triple-specific directories to ensure correct resolution..
2025-12-19 12:56:40 +00:00
Paschalis Mpeis
242fcb3556
[BOLT][AArch64] Treat undefined symbols as errors in tests (#172689)
Add `-Wl,-z,defs` in `%cflags` to make linking more consistent across
distros. Aims to catch typos in handwritten assembly tests. If
intentional, individual tests can override this with: `-Wl,-z,undefs`

Tests changed:
- bolt/test/AArch64/bf_min_alignment.s: fixed a typo
- bolt/test/AArch64/tls.c: overriding behaviour in all clang
invocations, making the test more consistent.
- Overrides to allow undefined symbols in:
  - bolt/test/AArch64/epilogue-determination.s
  - bolt/test/AArch64/exceptions-plt.cpp
  - bolt/test/AArch64/ifunc.test
  - bolt/test/AArch64/plt-call.test
  - bolt/test/AArch64/text-data.c
  - bolt/test/AArch64/unsupported-passes.test
  - bolt/test/AArch64/unsupported-passes.test
2025-12-19 12:28:30 +00:00
Amina Chabane
070a72e370
[MCA][AArch64] Fix Neoverse N2 pair-load RThroughput (#171853)
As per the SWOG for [Neoverse
N2](https://developer.arm.com/documentation/109914/latest/), throughput
is 1.5.

- Treat LDPXi/LDNPXi/LDPXpost/LDPXpre as dual loads so they now reserve
two N2Write_4c_1L
resources
- Update relevant tests to reflect new RThroughput
2025-12-19 12:10:42 +00:00
Ebuka Ezike
4160320225
[lldb-dap] Do not show warnings on Completions request. (#172917)
Why typing a command that happens to start with a variable, there are
warnings complaining about the ambiguous expression.
2025-12-19 12:04:27 +00:00
Simon Pilgrim
b9984f564b
[X86] combineConcatVectorOps - add handling for FMA/FMSUB/FNMSUB/FNMADD vector ops (#172989)
This involves some analysis of the operands to ensure we don't concat more subvectors than before the fold
2025-12-19 11:57:26 +00:00
Paul Walker
a135e45d37
[LLVM][CodeGen] Use VSELECT to implement "merging" INSERT_SUBVECTORs. (#172850)
When widening the subvector of INSERT_SUBVECTOR(vec, subvec, 0) to the
same type as its result, we're effectively turning the operation into a
merge that can be implement with a VSELECT whose mask is based on the
original subvector's element count.
2025-12-19 11:36:43 +00:00
Simon Pilgrim
f91657dbd5
[X86] Add tests showing failure to concat matching fma with a repeated vector op (#172985) 2025-12-19 11:19:19 +00:00
Ebuka Ezike
d07f237cde
[lldb-dap] Document stopOnEntry when attaching. (#172927)
We have always supported it but it was undocumented. It shows a warning
unknown key when added in vscode attach configuration.
2025-12-19 11:16:51 +00:00
Ebuka Ezike
556eb902ce
[lldb][API] Make SB-API functions const if possible. (#172687)
Only applied to functions that were added after 22.x tag.
2025-12-19 10:59:20 +00:00
Ben Dunbobbin
60043897ff
[DTLTO] Add DTLTO time traces (and llvm-lto2 time tracing to test) (#171600)
The primary goal of this patch is to add a comprehensive set of DTLTO time traces.

I also have implemented support for time traces in llvm-lto2, to allow for adding a test via Lit.
2025-12-19 10:57:13 +00:00
Cullen Rhodes
3300a7f198
[AArch64] Mark Armv8.4-a LDAPUR* instructions as mayLoad (#171142)
Thanks to @cofibrant for spotting.
2025-12-19 10:31:18 +00:00
Benjamin Maxwell
db075a8ff7
[AArch64] Enable the new SME ABI lowering (-aarch64-new-sme-abi) by default (#172642)
The previous SelectionDAG lowering is still available via
`-aarch64-new-sme-abi=false` (this will stay around until at least LLVM
23).

In tests that contained `CHECK-NEWLOWERING` the checks have been updated
so:

* `CHECK-NEWLOWERING` -> `CHECK` (the new default)
* `CHECK` -> `CHECK-SDAG` (the old SelectionDAG lowering)

But otherwise, the check lines have not changed.

Tests that were not explicitly checking the SME lowering have been
updated to match the new default lowering.

Those tests are:

* llvm/test/CodeGen/AArch64/O0-pipeline.ll
* llvm/test/CodeGen/AArch64/O3-pipeline.ll
* llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
* llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
* llvm/test/CodeGen/AArch64/stack-hazard.ll
2025-12-19 10:19:02 +00:00
Gergely Bálint
b6d188a7e2
[BOLT] Add missing system-linux requirements to tests (#172968)
Several lit tests are failing on macOS, as they are linux-specific,
but not using the "REQUIRES: system-linux" setting.

This patch adds the missing requirements to tests failing on macOS.
2025-12-19 11:16:18 +01:00
LLVM GN Syncbot
43bd2e064f [gn build] Port ef190061d342 2025-12-19 10:02:39 +00:00
Kevin Per
fc1fd1065b
[AutoUpgrade]: Fixed assertion by considering number of args (#172911)
The assertion was violated because the intrinsic had too many arguments.
In that case, fall back to the default handling.

Closes https://github.com/llvm/llvm-project/issues/172817
2025-12-19 10:02:20 +00:00
Janet Cobb
ef190061d3
[libc++][concepts] P2404R3: Move-only types for equality_comparable_with, totally_ordered_with, and three_way_comparable_with (#99420)
This implements all of [P2404R3](https://wg21.link/p2404r3)'s concept
changes.

---------

Co-authored-by: A. Jiang <de34@live.cn>
Co-authored-by: Louis Dionne <ldionne.2@gmail.com>
2025-12-19 17:56:32 +08:00
Brad Smith
5099c07fa0
[compiler-rt][sanitizer] some additional Haiku build fixes (#172773)
- Correct field type for cookie variable
- Use proper type for __sanitizer_sigset_t on 64-bit archs
2025-12-19 04:46:59 -05:00
Alexis Engelke
f24c0ec412 [LLVM] Fix back-end plugin test for AIX 2025-12-19 09:45:30 +00:00
Martin Storsjö
ad66b67fc5
[RuntimeLibcalls] Fix stack probes for aarch64 mingw (#172973)
Before bb993a89a873ee832d063fb566c889ca3d0c2b72, the stack probes on
aarch64 windows unconditionally called "__chkstk"; after this
refactoring, it only got "__chkstk" for MSVC environments, and no stack
probe at all for other environments.

Simplify RuntimeLibcalls.td to do the same for aarch64 as for arm,
simply adding "__chkstk" for all Windows variants, and add a test to
cover this case.
2025-12-19 11:36:33 +02:00
Ricardo Jesus
e8391d4619
[AArch64] Set default schedule of load-acquire RCpc instructions. (#172881)
This patch sets the default schedule of RCpc load-acquires to WriteLD,
same as it's done for rcpc-immo load-acquires.
2025-12-19 09:25:34 +00:00
Cullen Rhodes
64d4d10875
[InstCombine] Add more freeze PHI tests (NFC) (#172842)
Adds a number of test cases where we have to be careful when pushing
freeze around. These first two tests are taken from #157678 which failed
to land to due compile-time issues. The last two tests were reduced from
llvm-opt-benchmark workloads on #171435 which was an attempt at
addressing underlying cause of the hangs.
2025-12-19 09:16:57 +00:00
Matt Arsenault
0db4393762
AMDGPU: Add baseline tests for f64 rsq pattern handling (#172052) 2025-12-19 10:12:25 +01:00
Nikita Popov
8c93254dfc [LSR] Add test for implicit truncation on icmp immediate (NFC)
Test case for:
https://github.com/llvm/llvm-project/pull/171456#issuecomment-3670755137
2025-12-19 10:07:50 +01:00
Nikita Popov
0182c859f1
[OCaml] Remove deprecated const_nuw_neg and build_nuw_neg APIs (#171466)
I think we usually remove deprecated C API functions from the OCaml
bindings right away. These two at least should be essentially useless.
2025-12-19 09:49:33 +01:00
Nikita Popov
a22d1b5d43
[ConstantInt] Add ImplicitTrunc parameter to getSigned() (NFC) (#172875)
For consistency with `ConstantInt::get()`, add an ImplicitTrunc
parameter to `ConstantInt::getSigned()` as well. It currently defaults
to true and will be flipped to false in the future (by #171456).
2025-12-19 09:48:26 +01:00
Chuanqi Xu
8994d399fa [NFC] [C++20] [Modules] Add a test for issue 149404
Close https://github.com/llvm/llvm-project/issues/149404 and add its
reproducer
2025-12-19 16:47:19 +08:00