26035 Commits

Author SHA1 Message Date
Chuanqi Xu
b6f30623af [Coroutines] Store the index for final suspend point in the exception path
Try to address part of
https://github.com/llvm/llvm-project/issues/61900.

It is not completely addressed since the original reproducer is not
fixed due to the final suspend point is optimized out in its special
case. But that is a relatively independent issue.
2023-06-20 18:38:05 +08:00
Zhongyunde
cb353dc74e [LV] Add cost model for simd vector select instructions of type float
For simd vector selects, use cmeq + bsl for v2f32/v4f32/v2f64, so their cost are cheep.
Fix https://github.com/llvm/llvm-project/issues/63082

Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D152523
2023-06-20 13:12:19 +08:00
Florian Hahn
dae5cd73cb
Recommit "[LSR] Consider post-inc form when creating extends/truncates."
This reverts the revert commit 1797ab36efc9c90c921cd725831f8c3f6a7125a2.

The recommitted version now checks the PostIncLoopSets for all fixups
and returns nullptr if the result doesn't match for all fixups.
2023-06-19 17:57:06 +01:00
Nikita Popov
7cfc82f331 [CVP] Use simpler urem expansion when LHS >= RHS (PR63330)
In this case we don't need to emit the comparison and select.

This is papering over a weakness in CVP in that newly added
instructions don't get revisited. If they were revisited, the
icmp would be folded at that point.

However, even without that it makes sense to handle this explicitly,
because it avoids the need to insert freeze, which may prevent
further analysis of the operation by LVI.

Proofs: https://alive2.llvm.org/ce/z/quyBxp

Fixes https://github.com/llvm/llvm-project/issues/63330.
2023-06-19 17:16:49 +02:00
Nikita Popov
bb4f4a3efe [CVP] Add additional tests for PR63330 (NFC) 2023-06-19 17:16:49 +02:00
Florian Hahn
798b6419bc
[LSR] Add test for for issue leading to revert of abfeda5af329b5.
Add unit test triggering an assertion with abfeda5af329b5.
2023-06-19 15:35:48 +01:00
Nikita Popov
90b55f2bba [CVP] Don't freeze value if guaranteed non-undef
Avoid inserting the freeze if not necessary, as this allows LVI
to continue reasoning about the expression.
2023-06-19 15:44:51 +02:00
Nikita Popov
cbd9585ba2 [CVP] Add test for PR63330 (NFC) 2023-06-19 15:44:51 +02:00
Alexandros Lamprineas
ce9d3f09b4 [FuncSpec] Promote stack values before specialization.
After each iteration of the function specializer, constant stack values
are promoted to constant globals in order to enable recursive function
specialization. This should also be done once before running the
specializer. Enables specialization of _QMbrute_forcePdigits_2 from
SPEC2017:548.exchange2_r.

Differential Revision: https://reviews.llvm.org/D152799
2023-06-19 14:32:41 +01:00
Dmitry Makogon
d46d9689f7 [BBUtils] Don't add 'then' block to a loop if it's terminated with unreachable
SplitBlockAndInsertIfThen utility creates two new blocks,
they're called ThenBlock and Tail (true and false destinations of a conditional
branch correspondingly). The function has a bool parameter Unreachable,
and if it's set, then ThenBlock is terminated with an unreachable.
At the end of the function the new blocks are added to the loop of the split
block. However, in case ThenBlock is terminated with an unreachable,
it cannot belong to any loop.

Differential Revision: https://reviews.llvm.org/D152434
2023-06-19 20:24:30 +07:00
Nikita Popov
664b7a4cd5 [SCCP] Fix conversion of range to constant for vectors (PR63380)
The ConstantRange specifies the range of the scalar elements in the
vector. When converting into a Constant, we need to create a vector
splat with the correct type. For that purpose, pass in the expected
type for the constant.

Fixes https://github.com/llvm/llvm-project/issues/63380.
2023-06-19 12:29:44 +02:00
Nikita Popov
f6a8775c5d [InstSimplify] Fold icmp of uadd.sat/usub.sat (PR63381)
Fold uadd.sat(X, Y) uge X and usub.sat(X, Y) ule X to true.

Proof: https://alive2.llvm.org/ce/z/596m9X

Fixes https://github.com/llvm/llvm-project/issues/63381.
2023-06-19 11:49:38 +02:00
Nikita Popov
4511d3c33c [InstSimplify] Add test for icmp of uadd.sat/usub.sat (NFC) 2023-06-19 11:49:38 +02:00
luxufan
18eb31c096 [SCCP][NFC] Regenerate test case 2023-06-19 14:15:01 +08:00
luxufan
22224acec8 [SCCP][NFC] Regenerate test case 2023-06-19 14:08:33 +08:00
Yevgeny Rouban
1ebbbf1614 [LoopUnrollRuntime] Allow indirect transition to deopt non-latch exit blocks
Relax condition on runtime trip count unrolling loops with 1 non-latch exit
that leads to a deop block.

There are cases when the deopt blocks are common exits for different loops.
LoopSimplify pass splits such edges to the common deopting blocks to make
sure that all exit nodes of the loop only have predecessors that are inside
of the loop (See simplifyOneLoop()). This breaks the current condition for
unrolling. This patch allows the split transitive blocks that still lead to
the deopting blocks.

Differential Revision: https://reviews.llvm.org/D152639
2023-06-19 11:10:01 +07:00
luxufan
f2d9f84b3f [SCCP][NFC] Regenerate test case 2023-06-18 23:14:20 +08:00
Paul Walker
b7287a82d3 [SVE][AArch64TTI] Fix invalid mla combine that miscomputes the value of inactive lanes.
Consider: add(pg, a, mul_u(pg, b, c))

Although the multiply's inactive lanes are undefined, they don't
contribute to the final result.  The overall result of the inactive
lanes come from "a" and thus the above is another form of mla
rather than mla_u.
2023-06-18 13:07:03 +01:00
Paul Walker
7a8f6a3eaa Increase test coverage of Transforms/InstCombine/AArch64/sve-intrinsic-muladdsub.ll 2023-06-18 13:07:03 +01:00
NAKAMURA Takumi
7400bdc19f pr62660-normalization-failure.ll REQUIRES: asserts (#62660) 2023-06-18 15:24:53 +09:00
Fangrui Song
2cb8d5ca3a [Pseudo Probe] Do not place functions in nodeduplicate COMDATs
For a function not in an IR COMDAT, currently we place it into a nodeduplicate IR
COMDAT so that its text section and its associated .pseudo_probe section will be
in the same section group, which can be retained or discarded by the linker as a
unit. However, the section group wastes space.

After D153189 uses SHF_LINK_ORDER to ensure a .pseudo_probe section will be
discarded when its associated text section is discarded, we can remove the
nodeduplicate IR change.

In the following example, the .pseudo_probe associated with .text.f is discarded as expected.
```
clang -c -ffunction-sections -fpseudo-probe-for-profiling -xc =(printf 'void _start(){} void f(){}') -o a.o
ld.lld --gc-sections --print-gc-sections a.o
```

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D153191
2023-06-17 15:40:20 -07:00
Florian Hahn
8225698212
[LSR] Enable SCEV verification for test from f3a0ad2d and mark as XFAIL
The test fails SCEV verification, which cause the expensive check bots
to fail. Always run verification and mark as XFAIL until fixed.
2023-06-17 21:06:49 +01:00
Florian Hahn
1797ab36ef
Revert "[LSR] Consider post-inc form when creating extends/truncates."
This reverts commit abfeda5af329b5889db709ff74506e20e0b569e9.
and fe19036e1266d2a90b44725c82b898134906e4c3.

The added assertion triggers during clang bootstrap builds. Revert while
I investigate.
2023-06-17 17:58:41 +01:00
Florian Hahn
f3a0ad2d8b
[LSR] Add test for #62660.
Add test for LSR miscompile.
2023-06-17 17:37:25 +01:00
Florian Hahn
abfeda5af3
[LSR] Consider post-inc form when creating extends/truncates.
GenerateTruncates at the moment creates extends/truncates for post-inc
uses of normalized expressions. For example, if an add rec of the form
{1,+,-1} is used outside the loop, the normalized form will use {1,+,-1}
instead of {0,+,-1}. When naively sign-extending the normalized
expression, it will get extended incorrectly to {1,+,-1} for the wider
type, if the backedge-taken count of the loop is 1.

To address this, the patch updates GenerateTruncates to check if the
LSRUse contains any fixups with PostIncLoops. If that's the case, first
de-normalize the expression, then perform the extend/truncate, then
normalize again.

There may be other places where similar checks are needed and the helper
can be generalized for those cases. I'd not be surprised if other subtle
mis-compiles are caused by this.

Fixes #38847.
Fixes #58039.
Fixes #62852.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D153004
2023-06-17 09:58:37 +01:00
Florian Hahn
f63c038af4
[LSR] Add test case for #58039. 2023-06-17 09:57:00 +01:00
Fangrui Song
62d8614223 [Pseudo Probe] Make .pseudo_probe GC-able
* Add the SHF_LINK_ORDER flag so that the .pseudo_probe section is discarded when the associated text section is discarded.
* Add unique ID so that with `clang -ffunction-sections -fno-unique-section-names`, there is one separate .pseudo_probe for each text section (disambiguated by `.section ....,unique,id` in assembly)

The changes allow .pseudo_probe GC even if we don't place instrumented functions
in an IR comdat (see `getOrCreateFunctionComdat` in SampleProfileProbe.cpp).

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D153189
2023-06-16 23:46:36 -07:00
Arthur Eubanks
f4f826bcd4 Revert "Revert "ValueTracking: Fix nan result handling for fmul""
This reverts commit 464dcab8a6c823c9cb462bf4107797b8173de088.

Going to fix forward size regression instead due to more dependent patches needing to be reverted otherwise.
2023-06-16 13:53:32 -07:00
Arthur Eubanks
3e39cfe5b4 Revert "Revert "InstSimplify: Require instruction be parented""
This reverts commit 0c03f48480f69b854f86d31235425b5cb71ac921.

Going to fix forward size regression instead due to more dependent patches needing to be reverted otherwise.
2023-06-16 13:53:31 -07:00
Arthur Eubanks
0c03f48480 Revert "InstSimplify: Require instruction be parented"
This reverts commit 1536e299e63d7788f38117b0212ca50eb76d7a3b.

Causes large binary size regressions, see comments on https://reviews.llvm.org/rG1536e299e63d7788f38117b0212ca50eb76d7a3b.
2023-06-16 11:24:29 -07:00
Arthur Eubanks
464dcab8a6 Revert "ValueTracking: Fix nan result handling for fmul"
This reverts commit a632ca4b00279baf18e72a171ec0ce526e9d80aa.

Dependent commit to be reverted
2023-06-16 11:24:28 -07:00
Alan Zhao
d6b4f6786b Revert "Revert "InstSimplify: Require instruction be parented""
This reverts commit 00264eac4d0938ae8a0826da38e4777be269124c.

Reason: caused a bunch of bots to break
2023-06-16 10:58:54 -07:00
Alan Zhao
00264eac4d Revert "InstSimplify: Require instruction be parented"
This reverts commit 1536e299e63d7788f38117b0212ca50eb76d7a3b.

Reason: causes a regression in the inliner (see https://crbug.com/1454531 and https://reviews.llvm.org/rG1536e299e63d7788f38117b0212ca50eb76d7a3b#1217141)
2023-06-16 10:36:49 -07:00
Jay Foad
84313162bf [AMDGPU] Stop replacing amdgcn.ballot(1) with amdgcn.s.getreg(exec)
Rationale:
- It does not enable any further IR simplifications.
- It does not improve the generated code since the isel lowering of
  ballot also has special cases for 0 and 1.
- getreg is "too powerful" since it can read from many different
  registers, so its intrinsic properties have to be set very
  conservatively.

There is also a correctness problem that getreg can read from exec but
it is currently not marked as convergent.

Differential Revision: https://reviews.llvm.org/D153047
2023-06-16 17:15:52 +01:00
Florian Hahn
0a246a0c72
[LV] Use VPValues when creating GEP with all invariant indices.
Update VPWidenGEPRecipe::execute to use the VPValue operands of the
recipe when creating the GEP instruction.

Fixes #63340.
2023-06-16 16:14:01 +01:00
Nikita Popov
b7bd3a734c [CGP] Fix infinite loop in icmp operand swapping
Don't swap the operands if they're the same. Fixes the issue reported
at https://reviews.llvm.org/D152541#4427017.
2023-06-16 15:50:12 +02:00
Nikita Popov
f9f8517e03 [InstCombine][AArch64] Fix phi insertion point
Fix the issue reported at https://reviews.llvm.org/rG724f4a5bac25#inline-9083,
by specifying the correct insertion point for the new phi.
2023-06-16 14:58:33 +02:00
Nikita Popov
f10103ba59 [InstCombine] Regenerate test checks (NFC) 2023-06-16 14:50:16 +02:00
Carlos Alberto Enciso
c0a986a60f [LICM] Sunk instructions with invalid source location.
Building the given test case with 'clang -O2 -g' the call to
'getInOrder' is sunk out of the loop by LICM, but the source
location is not dropped.

Reviewed By: aprantl, fdeazeve

Differential Revision: https://reviews.llvm.org/D152691
2023-06-16 06:25:27 +01:00
Serguei Katkov
d119c386cd [CGP] Additional tests for removing operand of assume. NFC. 2023-06-16 11:52:46 +07:00
Noah Goldstein
e92a27bcb7 [InstCombine] Verify CmpInst is equality in foldICmpPow2Test; PR63327
When D152728 hoisted the code to a helper function, it moved the call
to the helper outside of `foldICmpEquality`, so an equality check is
needed in the helper.

Reviewed By: nikic, fhahn

Differential Revision: https://reviews.llvm.org/D153041
2023-06-15 12:21:24 -05:00
Matt Arsenault
a632ca4b00 ValueTracking: Fix nan result handling for fmul
This was mishandling maybe 0 * inf.

Fixes issue #63316
2023-06-15 09:35:12 -04:00
Matt Arsenault
9348d83f62 ValueTracking: Add some baseline tests for issue #63316 2023-06-15 09:35:12 -04:00
Mateja Marjanovic
7047cb5203 [AMDGPU] Trim trailing undefs from the end of image and buffer store
Remove undef values from the end of the vector operand in image and
buffer store instructions.
Also instead of call to computeKnownFPClass, use only findScalarElement.

Continuation of: 88421ea973916e Trim zero components from buffer and image stores

Differential Revision: https://reviews.llvm.org/D152440
2023-06-15 15:19:36 +02:00
Nikita Popov
03de1cb715 [InstCombine][CGP] Move swapMayExposeCSEOpportunities() fold
InstCombine tries to swap compare operands to match sub instructions
in order to expose "CSE opportunities". However, it doesn't really
make sense to perform this transform in the middle-end, as we cannot
actually CSE the instructions there.

The backend already performs this fold in
18f5446a45/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (L4236)
on the SDAG level, however this only works within a single basic block.

To handle cross-BB cases, we do need to handle this in the IR layer.
This patch moves the fold from InstCombine to CGP in the backend,
while keeping the same (somewhat dubious) heuristic.

Differential Revision: https://reviews.llvm.org/D152541
2023-06-15 14:17:58 +02:00
Matt Arsenault
c6aaa0b14f AMDGPU: Perform basic folds on llvm.amdgcn.exp2 2023-06-15 07:01:06 -04:00
Matt Arsenault
6e934f2292 AMDGPU: Add baseline tests for llvm.amdgcn.exp2 folds 2023-06-15 07:01:01 -04:00
Florian Hahn
672b35d554
[LSR] Move new test to X86 subdir.
The test added in 1665cb06307 requires the X86 backend, so move it to
the X86 subdirectory.
2023-06-15 11:11:06 +01:00
Florian Hahn
1665cb0630
[LSR] Add test cases showing bad handling of extends of post-inc uses.
Tests from #38847, #62852.
2023-06-15 10:15:12 +01:00
Nikita Popov
0b01fa7930 [InstCombine] Add additional tests for displaced shifts (NFC) 2023-06-15 10:48:43 +02:00