Add a bit to TargetInfo to specify that vectors are element-aligned rather than naturally aligned. This is needed to match DirectX's Data Layout in LLVM. Note that this removes the `Opts.HLSL` early exit from `checkDataLayoutConsistency` so that we actually get these checks when compiling HLSL. This check looks like it was put there because of similarity between OpenCL and HLSL, but it isn't actually necessary. Resolves #123968
212 lines
11 KiB
HLSL
212 lines
11 KiB
HLSL
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -finclude-default-header -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s
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struct S {
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int x;
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float f;
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};
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// CHECK: [[CBLayout:%.*]] = type <{ <{ [1 x <{ float, target("dx.Padding", 12) }>], float }>, target("dx.Padding", 12), [2 x <4 x i32>], <{ [1 x <{ <{ [1 x <{ i32, target("dx.Padding", 12) }>], i32 }>, target("dx.Padding", 12) }>], <{ [1 x <{ i32, target("dx.Padding", 12) }>], i32 }> }>, target("dx.Padding", 12), <{ [1 x <{ %S, target("dx.Padding", 8) }>], %S }> }>
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// CHECK: @CBArrays.cb = global target("dx.CBuffer", [[CBLayout]])
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// CHECK: @c1 = external hidden addrspace(2) global <{ [1 x <{ float, target("dx.Padding", 12) }>], float }>, align 4
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// CHECK: @c2 = external hidden addrspace(2) global [2 x <4 x i32>], align 4
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// CHECK: @c3 = external hidden addrspace(2) global <{ [1 x <{ <{ [1 x <{ i32, target("dx.Padding", 12) }>], i32 }>, target("dx.Padding", 12) }>], <{ [1 x <{ i32, target("dx.Padding", 12) }>], i32 }> }>, align 4
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// CHECK: @c4 = external hidden addrspace(2) global <{ [1 x <{ %S, target("dx.Padding", 8) }>], %S }>, align 1
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cbuffer CBArrays : register(b0) {
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float c1[2];
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int4 c2[2];
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int c3[2][2];
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S c4[2];
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign1
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// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x i32], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 4 [[Arr2]], i8 0, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 8, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign1() {
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int Arr[2] = {0, 1};
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int Arr2[2] = {0, 0};
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Arr = Arr2;
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign2
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// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr3:%.*]] = alloca [2 x i32], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 4 [[Arr2]], i8 0, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr2]], ptr align 4 [[Arr3]], i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 8, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign2() {
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int Arr[2] = {0, 1};
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int Arr2[2] = {0, 0};
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int Arr3[2] = {3, 4};
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Arr = Arr2 = Arr3;
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign3
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// CHECK: [[Arr3:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NEXT: [[Arr4:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr4]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 [[Arr4]], i32 16, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign3() {
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int Arr2[2][2] = {{0, 0}, {1, 1}};
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int Arr3[2][2] = {{1, 1}, {0, 0}};
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Arr2 = Arr3;
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign4
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// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x i32], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 4 [[Arr2]], i8 0, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 8, i1 false)
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// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x i32], ptr [[Arr]], i32 0, i32 0
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// CHECK-NEXT: store i32 6, ptr [[Idx]], align 4
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// CHECK-NEXT: ret void
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void arr_assign4() {
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int Arr[2] = {0, 1};
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int Arr2[2] = {0, 0};
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(Arr = Arr2)[0] = 6;
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign5
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// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr3:%.*]] = alloca [2 x i32], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 4 [[Arr2]], i8 0, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr2]], ptr align 4 [[Arr3]], i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 8, i1 false)
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// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x i32], ptr [[Arr]], i32 0, i32 0
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// CHECK-NEXT: store i32 6, ptr [[Idx]], align 4
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// CHECK-NEXT: ret void
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void arr_assign5() {
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int Arr[2] = {0, 1};
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int Arr2[2] = {0, 0};
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int Arr3[2] = {3, 4};
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(Arr = Arr2 = Arr3)[0] = 6;
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign6
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// CHECK: [[Arr3:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NEXT: [[Arr4:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr4]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 [[Arr4]], i32 16, i1 false)
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// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[Arr3]], i32 0, i32 0
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// CHECK-NEXT: [[Idx2:%.*]] = getelementptr inbounds [2 x i32], ptr [[Idx]], i32 0, i32 0
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// CHECK-NEXT: store i32 6, ptr [[Idx2]], align 4
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// CHECK-NEXT: ret void
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void arr_assign6() {
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int Arr[2][2] = {{0, 0}, {1, 1}};
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int Arr2[2][2] = {{1, 1}, {0, 0}};
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(Arr = Arr2)[0][0] = 6;
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign7
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// CHECK: [[Arr:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr2]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 16, i1 false)
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// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[Arr]], i32 0, i32 0
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// CHECK-NEXT: store i32 6, ptr [[Idx]], align 4
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// CHECK-NEXT: [[Idx2:%.*]] = getelementptr inbounds i32, ptr %arrayidx, i32 1
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// CHECK-NEXT: store i32 6, ptr [[Idx2]], align 4
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// CHECK-NEXT: ret void
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void arr_assign7() {
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int Arr[2][2] = {{0, 1}, {2, 3}};
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int Arr2[2][2] = {{0, 0}, {1, 1}};
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(Arr = Arr2)[0] = {6, 6};
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}
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// Verify you can assign from a cbuffer array
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// CHECK-LABEL: define hidden void {{.*}}arr_assign8
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// CHECK: [[C:%.*]] = alloca [2 x float], align 4
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// CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds [2 x float], ptr [[C]], i32 0
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// CHECK-NEXT: [[L0:%.*]] = load float, ptr addrspace(2) @c1, align 4
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// CHECK-NEXT: store float [[L0]], ptr [[V0]], align 4
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// CHECK-NEXT: [[V1:%.*]] = getelementptr inbounds [2 x float], ptr [[C]], i32 0, i32 1
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// CHECK-NEXT: [[L1:%.*]] = load float, ptr addrspace(2) getelementptr inbounds nuw (i8, ptr addrspace(2) @c1, i32 16), align 4
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// CHECK-NEXT: store float [[L1]], ptr [[V1]], align 4
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// CHECK-NEXT: ret void
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void arr_assign8() {
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float C[2];
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C = c1;
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}
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// TODO: We should be able to just memcpy here.
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// See https://github.com/llvm/wg-hlsl/issues/351
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//
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// CHECK-LABEL: define hidden void {{.*}}arr_assign9
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// CHECK: [[C:%.*]] = alloca [2 x <4 x i32>], align 4
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// CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[C]], i32 0
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// CHECK-NEXT: [[L0:%.*]] = load <4 x i32>, ptr addrspace(2) @c2, align 4
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// CHECK-NEXT: store <4 x i32> [[L0]], ptr [[V0]], align 4
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// CHECK-NEXT: [[V1:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[C]], i32 0, i32 1
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// CHECK-NEXT: [[L1:%.*]] = load <4 x i32>, ptr addrspace(2) getelementptr inbounds nuw (i8, ptr addrspace(2) @c2, i32 16), align 4
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// CHECK-NEXT: store <4 x i32> [[L1]], ptr [[V1]], align 4
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// CHECK-NEXT: ret void
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void arr_assign9() {
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int4 C[2];
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C = c2;
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign10
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// CHECK: [[C:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[C]], i32 0, i32 0, i32 0
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// CHECK-NEXT: [[L0:%.*]] = load i32, ptr addrspace(2) @c3, align 4
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// CHECK-NEXT: store i32 [[L0]], ptr [[V0]], align 4
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// CHECK-NEXT: [[V1:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[C]], i32 0, i32 0, i32 1
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// CHECK-NEXT: [[L1:%.*]] = load i32, ptr addrspace(2) getelementptr inbounds nuw (i8, ptr addrspace(2) @c3, i32 16), align 4
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// CHECK-NEXT: store i32 [[L1]], ptr [[V1]], align 4
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// CHECK-NEXT: [[V2:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[C]], i32 0, i32 1, i32 0
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// CHECK-NEXT: [[L2:%.*]] = load i32, ptr addrspace(2) getelementptr inbounds nuw (i8, ptr addrspace(2) @c3, i32 32), align 4
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// CHECK-NEXT: store i32 [[L2]], ptr [[V2]], align 4
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// CHECK-NEXT: [[V3:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[C]], i32 0, i32 1, i32 1
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// CHECK-NEXT: [[L3:%.*]] = load i32, ptr addrspace(2) getelementptr inbounds nuw (i8, ptr addrspace(2) @c3, i32 48), align 4
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// CHECK-NEXT: store i32 [[L3]], ptr [[V3]], align 4
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// CHECK-NEXT: ret void
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void arr_assign10() {
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int C[2][2];
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C = c3;
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}
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// CHECK-LABEL: define hidden void {{.*}}arr_assign11
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// CHECK: [[C:%.*]] = alloca [2 x %struct.S], align 1
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// CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[C]], i32 0, i32 0, i32 0
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// CHECK-NEXT: [[L0:%.*]] = load i32, ptr addrspace(2) @c4, align 4
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// CHECK-NEXT: store i32 [[L0]], ptr [[V0]], align 4
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// CHECK-NEXT: [[V1:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[C]], i32 0, i32 0, i32 1
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// CHECK-NEXT: [[L1:%.*]] = load float, ptr addrspace(2) getelementptr inbounds nuw (i8, ptr addrspace(2) @c4, i32 4), align 4
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// CHECK-NEXT: store float [[L1]], ptr [[V1]], align 4
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// CHECK-NEXT: [[V2:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[C]], i32 0, i32 1, i32 0
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// CHECK-NEXT: [[L2:%.*]] = load i32, ptr addrspace(2) getelementptr inbounds nuw (i8, ptr addrspace(2) @c4, i32 16), align 4
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// CHECK-NEXT: store i32 [[L2]], ptr [[V2]], align 4
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// CHECK-NEXT: [[V3:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[C]], i32 0, i32 1, i32 1
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// CHECK-NEXT: [[L3:%.*]] = load float, ptr addrspace(2) getelementptr inbounds nuw (i8, ptr addrspace(2) @c4, i32 20), align 4
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// CHECK-NEXT: store float [[L3]], ptr [[V3]], align 4
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// CHECK-NEXT: ret void
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void arr_assign11() {
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S C[2];
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C = c4;
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}
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