llvm-project/llvm/test/CodeGen/AArch64/alloca-load-store-scalable-struct.ll
Benjamin Maxwell ff5fa711b3
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
The main change in this patch is we go from emitting the expression:

  @ cfa - NumBytes - NumScalableBytes * VG

To:

  @ cfa - VG * NumScalableBytes - NumBytes

That is, VG is the first expression. This is for a future patch that
adds an alternative way to resolve VG (which uses the CFA, so it is
convenient for the CFA to be at the top of the stack).

Since doing this is fairly churn-heavy, I took the opportunity to also
save up to 4-bytes per SVE CFI expression. This is done by folding
LEB128 constants to literals when in the range 0 to 31, and using the
offset in `DW_OP_breg*` expressions.
2025-08-06 09:21:57 +01:00

32 lines
1.1 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s | FileCheck %s
target triple = "aarch64-unknown-linux-gnu"
%struct.test = type { <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double> }
define void @test(ptr %addr) #0 {
; CHECK-LABEL: test:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: addvl sp, sp, #-3
; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: ldr z0, [x0]
; CHECK-NEXT: ldr z1, [x0, #2, mul vl]
; CHECK-NEXT: ldr z2, [x0, #1, mul vl]
; CHECK-NEXT: str z0, [sp]
; CHECK-NEXT: str z1, [sp, #2, mul vl]
; CHECK-NEXT: str z2, [sp, #1, mul vl]
; CHECK-NEXT: addvl sp, sp, #3
; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
%ret = alloca %struct.test, align 8
%val = load %struct.test, ptr %addr
store %struct.test %val, ptr %ret, align 8
ret void
}
attributes #0 = { "target-features"="+sve" }