61510b51c3
This reverts commit 9c319d5bb40785c969d2af76535ca62448dfafa7. Some issues were discovered with the bootstrap builds, which seem like they were caused by this commit. I'm reverting to investigate.
274 lines
8.9 KiB
LLVM
274 lines
8.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
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; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
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; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
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; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
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define double @fabs_f64(double %a) {
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; CHECK-LABEL: fabs_f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fabs d0, d0
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; CHECK-NEXT: ret
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entry:
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%c = call double @llvm.fabs.f64(double %a)
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ret double %c
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}
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define float @fabs_f32(float %a) {
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; CHECK-LABEL: fabs_f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fabs s0, s0
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; CHECK-NEXT: ret
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entry:
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%c = call float @llvm.fabs.f32(float %a)
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ret float %c
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}
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define half @fabs_f16(half %a) {
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; CHECK-SD-NOFP16-LABEL: fabs_f16:
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; CHECK-SD-NOFP16: // %bb.0: // %entry
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; CHECK-SD-NOFP16-NEXT: // kill: def $h0 killed $h0 def $s0
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; CHECK-SD-NOFP16-NEXT: fmov w8, s0
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; CHECK-SD-NOFP16-NEXT: and w8, w8, #0x7fff
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; CHECK-SD-NOFP16-NEXT: fmov s0, w8
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; CHECK-SD-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0
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; CHECK-SD-NOFP16-NEXT: ret
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;
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; CHECK-SD-FP16-LABEL: fabs_f16:
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; CHECK-SD-FP16: // %bb.0: // %entry
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; CHECK-SD-FP16-NEXT: fabs h0, h0
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; CHECK-SD-FP16-NEXT: ret
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;
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; CHECK-GI-NOFP16-LABEL: fabs_f16:
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; CHECK-GI-NOFP16: // %bb.0: // %entry
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; CHECK-GI-NOFP16-NEXT: // kill: def $h0 killed $h0 def $s0
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; CHECK-GI-NOFP16-NEXT: fmov w8, s0
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; CHECK-GI-NOFP16-NEXT: and w8, w8, #0x7fff
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; CHECK-GI-NOFP16-NEXT: fmov s0, w8
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; CHECK-GI-NOFP16-NEXT: // kill: def $h0 killed $h0 killed $s0
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; CHECK-GI-NOFP16-NEXT: ret
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;
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; CHECK-GI-FP16-LABEL: fabs_f16:
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; CHECK-GI-FP16: // %bb.0: // %entry
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; CHECK-GI-FP16-NEXT: fabs h0, h0
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; CHECK-GI-FP16-NEXT: ret
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entry:
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%c = call half @llvm.fabs.f16(half %a)
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ret half %c
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}
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define <2 x double> @fabs_v2f64(<2 x double> %a) {
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; CHECK-LABEL: fabs_v2f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fabs v0.2d, v0.2d
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; CHECK-NEXT: ret
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entry:
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%c = call <2 x double> @llvm.fabs.v2f64(<2 x double> %a)
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ret <2 x double> %c
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}
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define <3 x double> @fabs_v3f64(<3 x double> %a) {
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; CHECK-SD-LABEL: fabs_v3f64:
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
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; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-SD-NEXT: fabs v2.2d, v2.2d
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; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
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; CHECK-SD-NEXT: fabs v0.2d, v0.2d
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; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
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; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: fabs_v3f64:
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-GI-NEXT: fabs d2, d2
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; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-GI-NEXT: fabs v0.2d, v0.2d
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; CHECK-GI-NEXT: mov d1, v0.d[1]
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; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-GI-NEXT: ret
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entry:
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%c = call <3 x double> @llvm.fabs.v3f64(<3 x double> %a)
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ret <3 x double> %c
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}
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define <4 x double> @fabs_v4f64(<4 x double> %a) {
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; CHECK-LABEL: fabs_v4f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fabs v0.2d, v0.2d
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; CHECK-NEXT: fabs v1.2d, v1.2d
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; CHECK-NEXT: ret
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entry:
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%c = call <4 x double> @llvm.fabs.v4f64(<4 x double> %a)
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ret <4 x double> %c
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}
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define <2 x float> @fabs_v2f32(<2 x float> %a) {
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; CHECK-LABEL: fabs_v2f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fabs v0.2s, v0.2s
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; CHECK-NEXT: ret
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entry:
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%c = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
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ret <2 x float> %c
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}
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define <3 x float> @fabs_v3f32(<3 x float> %a) {
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; CHECK-LABEL: fabs_v3f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fabs v0.4s, v0.4s
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; CHECK-NEXT: ret
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entry:
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%c = call <3 x float> @llvm.fabs.v3f32(<3 x float> %a)
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ret <3 x float> %c
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}
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define <4 x float> @fabs_v4f32(<4 x float> %a) {
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; CHECK-LABEL: fabs_v4f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fabs v0.4s, v0.4s
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; CHECK-NEXT: ret
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entry:
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%c = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
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ret <4 x float> %c
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}
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define <8 x float> @fabs_v8f32(<8 x float> %a) {
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; CHECK-LABEL: fabs_v8f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fabs v0.4s, v0.4s
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; CHECK-NEXT: fabs v1.4s, v1.4s
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; CHECK-NEXT: ret
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entry:
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%c = call <8 x float> @llvm.fabs.v8f32(<8 x float> %a)
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ret <8 x float> %c
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}
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define <7 x half> @fabs_v7f16(<7 x half> %a) {
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; CHECK-SD-NOFP16-LABEL: fabs_v7f16:
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; CHECK-SD-NOFP16: // %bb.0: // %entry
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; CHECK-SD-NOFP16-NEXT: bic v0.8h, #128, lsl #8
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; CHECK-SD-NOFP16-NEXT: ret
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;
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; CHECK-SD-FP16-LABEL: fabs_v7f16:
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; CHECK-SD-FP16: // %bb.0: // %entry
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; CHECK-SD-FP16-NEXT: fabs v0.8h, v0.8h
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; CHECK-SD-FP16-NEXT: ret
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;
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; CHECK-GI-NOFP16-LABEL: fabs_v7f16:
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; CHECK-GI-NOFP16: // %bb.0: // %entry
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; CHECK-GI-NOFP16-NEXT: mvni v1.8h, #128, lsl #8
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; CHECK-GI-NOFP16-NEXT: and v0.16b, v0.16b, v1.16b
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; CHECK-GI-NOFP16-NEXT: ret
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;
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; CHECK-GI-FP16-LABEL: fabs_v7f16:
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; CHECK-GI-FP16: // %bb.0: // %entry
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; CHECK-GI-FP16-NEXT: fabs v0.8h, v0.8h
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; CHECK-GI-FP16-NEXT: ret
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entry:
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%c = call <7 x half> @llvm.fabs.v7f16(<7 x half> %a)
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ret <7 x half> %c
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}
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define <4 x half> @fabs_v4f16(<4 x half> %a) {
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; CHECK-SD-NOFP16-LABEL: fabs_v4f16:
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; CHECK-SD-NOFP16: // %bb.0: // %entry
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; CHECK-SD-NOFP16-NEXT: bic v0.4h, #128, lsl #8
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; CHECK-SD-NOFP16-NEXT: ret
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;
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; CHECK-SD-FP16-LABEL: fabs_v4f16:
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; CHECK-SD-FP16: // %bb.0: // %entry
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; CHECK-SD-FP16-NEXT: fabs v0.4h, v0.4h
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; CHECK-SD-FP16-NEXT: ret
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;
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; CHECK-GI-NOFP16-LABEL: fabs_v4f16:
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; CHECK-GI-NOFP16: // %bb.0: // %entry
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; CHECK-GI-NOFP16-NEXT: mvni v1.4h, #128, lsl #8
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; CHECK-GI-NOFP16-NEXT: and v0.8b, v0.8b, v1.8b
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; CHECK-GI-NOFP16-NEXT: ret
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;
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; CHECK-GI-FP16-LABEL: fabs_v4f16:
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; CHECK-GI-FP16: // %bb.0: // %entry
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; CHECK-GI-FP16-NEXT: fabs v0.4h, v0.4h
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; CHECK-GI-FP16-NEXT: ret
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entry:
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%c = call <4 x half> @llvm.fabs.v4f16(<4 x half> %a)
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ret <4 x half> %c
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}
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define <8 x half> @fabs_v8f16(<8 x half> %a) {
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; CHECK-SD-NOFP16-LABEL: fabs_v8f16:
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; CHECK-SD-NOFP16: // %bb.0: // %entry
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; CHECK-SD-NOFP16-NEXT: bic v0.8h, #128, lsl #8
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; CHECK-SD-NOFP16-NEXT: ret
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;
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; CHECK-SD-FP16-LABEL: fabs_v8f16:
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; CHECK-SD-FP16: // %bb.0: // %entry
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; CHECK-SD-FP16-NEXT: fabs v0.8h, v0.8h
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; CHECK-SD-FP16-NEXT: ret
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;
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; CHECK-GI-NOFP16-LABEL: fabs_v8f16:
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; CHECK-GI-NOFP16: // %bb.0: // %entry
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; CHECK-GI-NOFP16-NEXT: mvni v1.8h, #128, lsl #8
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; CHECK-GI-NOFP16-NEXT: and v0.16b, v0.16b, v1.16b
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; CHECK-GI-NOFP16-NEXT: ret
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;
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; CHECK-GI-FP16-LABEL: fabs_v8f16:
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; CHECK-GI-FP16: // %bb.0: // %entry
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; CHECK-GI-FP16-NEXT: fabs v0.8h, v0.8h
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; CHECK-GI-FP16-NEXT: ret
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entry:
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%c = call <8 x half> @llvm.fabs.v8f16(<8 x half> %a)
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ret <8 x half> %c
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}
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define <16 x half> @fabs_v16f16(<16 x half> %a) {
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; CHECK-SD-NOFP16-LABEL: fabs_v16f16:
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; CHECK-SD-NOFP16: // %bb.0: // %entry
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; CHECK-SD-NOFP16-NEXT: bic v0.8h, #128, lsl #8
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; CHECK-SD-NOFP16-NEXT: bic v1.8h, #128, lsl #8
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; CHECK-SD-NOFP16-NEXT: ret
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;
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; CHECK-SD-FP16-LABEL: fabs_v16f16:
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; CHECK-SD-FP16: // %bb.0: // %entry
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; CHECK-SD-FP16-NEXT: fabs v0.8h, v0.8h
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; CHECK-SD-FP16-NEXT: fabs v1.8h, v1.8h
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; CHECK-SD-FP16-NEXT: ret
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;
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; CHECK-GI-NOFP16-LABEL: fabs_v16f16:
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; CHECK-GI-NOFP16: // %bb.0: // %entry
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; CHECK-GI-NOFP16-NEXT: mvni v2.8h, #128, lsl #8
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; CHECK-GI-NOFP16-NEXT: and v0.16b, v0.16b, v2.16b
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; CHECK-GI-NOFP16-NEXT: and v1.16b, v1.16b, v2.16b
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; CHECK-GI-NOFP16-NEXT: ret
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;
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; CHECK-GI-FP16-LABEL: fabs_v16f16:
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; CHECK-GI-FP16: // %bb.0: // %entry
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; CHECK-GI-FP16-NEXT: fabs v0.8h, v0.8h
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; CHECK-GI-FP16-NEXT: fabs v1.8h, v1.8h
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; CHECK-GI-FP16-NEXT: ret
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entry:
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%c = call <16 x half> @llvm.fabs.v16f16(<16 x half> %a)
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ret <16 x half> %c
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}
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declare <16 x half> @llvm.fabs.v16f16(<16 x half>)
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declare <2 x double> @llvm.fabs.v2f64(<2 x double>)
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declare <2 x float> @llvm.fabs.v2f32(<2 x float>)
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declare <3 x double> @llvm.fabs.v3f64(<3 x double>)
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declare <3 x float> @llvm.fabs.v3f32(<3 x float>)
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declare <4 x double> @llvm.fabs.v4f64(<4 x double>)
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declare <4 x float> @llvm.fabs.v4f32(<4 x float>)
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declare <4 x half> @llvm.fabs.v4f16(<4 x half>)
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declare <7 x half> @llvm.fabs.v7f16(<7 x half>)
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declare <8 x float> @llvm.fabs.v8f32(<8 x float>)
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declare <8 x half> @llvm.fabs.v8f16(<8 x half>)
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declare double @llvm.fabs.f64(double)
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declare float @llvm.fabs.f32(float)
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declare half @llvm.fabs.f16(half)
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