f92bfca9fc
When building a vector which contains zero elements, the AArch64 ISel replaces those elements with `undef`, if they are right shifted out. However, these elements need to stay zero if the right shift is exact, or otherwise we will be introducing undefined behavior. Should allow https://github.com/llvm/llvm-project/pull/92528 to be recommitted.
36 lines
1.3 KiB
LLVM
36 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s | FileCheck %s
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target triple = "aarch64-linux"
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define <2 x i32> @f(i8 %0, i8 %1) {
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; CHECK-LABEL: f:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: mov v0.b[3], w0
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; CHECK-NEXT: mov v0.b[7], w1
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; CHECK-NEXT: sshr v0.2s, v0.2s, #24
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; CHECK-NEXT: ret
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%3 = insertelement <2 x i8> poison, i8 %0, i64 0
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%4 = insertelement <2 x i8> %3, i8 %1, i64 1
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%5 = shufflevector <2 x i8> %4, <2 x i8> <i8 0, i8 poison>, <8 x i32> <i32 2, i32 2, i32 2, i32 0, i32 2, i32 2, i32 2, i32 1>
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%6 = bitcast <8 x i8> %5 to <2 x i32>
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%7 = ashr exact <2 x i32> %6, <i32 24, i32 24>
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ret <2 x i32> %7
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}
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define <2 x i32> @g(i8 %0, i8 %1) {
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; CHECK-LABEL: g:
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; CHECK: // %bb.0:
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: mov v0.b[3], w0
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; CHECK-NEXT: mov v0.b[7], w1
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; CHECK-NEXT: ushr v0.2s, v0.2s, #24
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; CHECK-NEXT: ret
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%3 = insertelement <2 x i8> poison, i8 %0, i64 0
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%4 = insertelement <2 x i8> %3, i8 %1, i64 1
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%5 = shufflevector <2 x i8> %4, <2 x i8> <i8 0, i8 poison>, <8 x i32> <i32 2, i32 2, i32 2, i32 0, i32 2, i32 2, i32 2, i32 1>
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%6 = bitcast <8 x i8> %5 to <2 x i32>
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%7 = lshr exact <2 x i32> %6, <i32 24, i32 24>
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ret <2 x i32> %7
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}
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