58d70dc62b
Stores can be issued faster if the result is kept in the SIMD/FP registers. The `HasOneUse` guards against creating two floating point conversions, if for example there's some arithmetic done on the converted value as well. Another approach would be to inspect the user instructions during lowering, but I don't see that type of check in the lowering too often.
132 lines
3.1 KiB
LLVM
132 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -verify-machineinstrs -mtriple=aarch64 < %s | FileCheck %s
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define void @f32_to_u8(float %f, ptr %dst) {
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; CHECK-LABEL: f32_to_u8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzu s0, s0
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; CHECK-NEXT: str b0, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptoui float %f to i32
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%trunc = trunc i32 %conv to i8
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store i8 %trunc, ptr %dst
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ret void
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}
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define void @f32_to_s8(float %f, ptr %dst) {
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; CHECK-LABEL: f32_to_s8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzs s0, s0
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; CHECK-NEXT: str b0, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptosi float %f to i32
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%trunc = trunc i32 %conv to i8
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store i8 %trunc, ptr %dst
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ret void
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}
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define void @f32_to_u16(float %f, ptr %dst) {
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; CHECK-LABEL: f32_to_u16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzu s0, s0
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; CHECK-NEXT: str h0, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptoui float %f to i32
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%trunc = trunc i32 %conv to i16
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store i16 %trunc, ptr %dst
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ret void
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}
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define void @f32_to_s16(float %f, ptr %dst) {
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; CHECK-LABEL: f32_to_s16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzs s0, s0
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; CHECK-NEXT: str h0, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptosi float %f to i32
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%trunc = trunc i32 %conv to i16
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store i16 %trunc, ptr %dst
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ret void
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}
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define void @f32_to_u32(float %f, ptr %dst) {
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; CHECK-LABEL: f32_to_u32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzu s0, s0
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; CHECK-NEXT: str s0, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptoui float %f to i32
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store i32 %conv, ptr %dst
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ret void
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}
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define void @f32_to_s32(float %f, ptr %dst) {
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; CHECK-LABEL: f32_to_s32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzs s0, s0
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; CHECK-NEXT: str s0, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptosi float %f to i32
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store i32 %conv, ptr %dst
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ret void
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}
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define void @f32_to_s64(float %f, ptr %dst) {
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; CHECK-LABEL: f32_to_s64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzs w8, s0
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; CHECK-NEXT: sxtw x8, w8
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; CHECK-NEXT: str x8, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptosi float %f to i32
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%ext = sext i32 %conv to i64
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store i64 %ext, ptr %dst
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ret void
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}
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define void @f64_to_u64(double %d, ptr %dst) {
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; CHECK-LABEL: f64_to_u64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzu d0, d0
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; CHECK-NEXT: str d0, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptoui double %d to i64
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store i64 %conv, ptr %dst
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ret void
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}
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define void @f64_to_s64(double %d, ptr %dst) {
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; CHECK-LABEL: f64_to_s64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzs d0, d0
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; CHECK-NEXT: str d0, [x0]
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; CHECK-NEXT: ret
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entry:
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%conv = fptosi double %d to i64
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store i64 %conv, ptr %dst
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ret void
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}
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define i32 @f32_to_i32_multiple_uses(float %f, ptr %dst) {
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; CHECK-LABEL: f32_to_i32_multiple_uses:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzs w8, s0
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; CHECK-NEXT: mov x9, x0
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; CHECK-NEXT: mov w0, w8
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; CHECK-NEXT: strb w8, [x9]
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; CHECK-NEXT: ret
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entry:
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%conv = fptosi float %f to i32
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%trunc = trunc i32 %conv to i8
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store i8 %trunc, ptr %dst
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ret i32 %conv
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}
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