fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
49 lines
2.1 KiB
LLVM
49 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=amdgcn-- < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn-- -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
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; GCN-LABEL: {{^}}extract_vector_elt_v3f64_2:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_load_dwordx2
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; GCN: buffer_store_dwordx2
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define amdgpu_kernel void @extract_vector_elt_v3f64_2(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
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%ld = load volatile <3 x double>, ptr addrspace(1) %in
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%elt = extractelement <3 x double> %ld, i32 2
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store volatile double %elt, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}dyn_extract_vector_elt_v3f64:
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; GCN-NOT: buffer_load
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; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 1
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 2
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN: store_dwordx2 v[{{[0-9:]+}}]
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define amdgpu_kernel void @dyn_extract_vector_elt_v3f64(ptr addrspace(1) %out, <3 x double> %foo, i32 %elt) #0 {
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%dynelt = extractelement <3 x double> %foo, i32 %elt
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store volatile double %dynelt, ptr addrspace(1) %out
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ret void
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}
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; GCN-LABEL: {{^}}dyn_extract_vector_elt_v4f64:
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; GCN-NOT: buffer_load
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; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 1
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 2
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 3
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
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; GCN: store_dwordx2 v[{{[0-9:]+}}]
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define amdgpu_kernel void @dyn_extract_vector_elt_v4f64(ptr addrspace(1) %out, <4 x double> %foo, i32 %elt) #0 {
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%dynelt = extractelement <4 x double> %foo, i32 %elt
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store volatile double %dynelt, ptr addrspace(1) %out
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ret void
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}
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attributes #0 = { nounwind }
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